From 6b0181c5edfb46f8913e61db79d33ff099cb1ea8 Mon Sep 17 00:00:00 2001 From: Devesh Jhunjhunwala Date: Thu, 21 Jan 2016 18:15:51 -0800 Subject: [PATCH] ARM: dts: msm: Enable the MSM GCC clock driver for MSM8996 Enable the GCC clock driver in the MSM8996 device tree and update the uartblsp2dm1 serial node to use the correct clocks. Signed-off-by: Devesh Jhunjhunwala --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index d55b68c687a5..8476a3df593e 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -316,14 +316,13 @@ qcom,pipe-attr-ee; }; - uartblsp2dm1: serial@75b0000 { + uartblsp2dm1: serial@075b0000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x75b0000 0x1000>; interrupts = ; - clocks = <&clock_gcc clk_gcc_blsp1_uart2_apps_clk>, - <&clock_gcc clk_gcc_blsp1_ahb_clk>; - clock-names = "core_clk", "iface_clk"; - status = "okay"; + clocks = <&clock_gcc clk_gcc_blsp2_uart2_apps_clk>, + <&clock_gcc clk_gcc_blsp2_ahb_clk>; + clock-names = "core", "iface"; }; uartblsp1dm1: serial@07570000 { @@ -767,7 +766,6 @@ reg-names = "cc_base"; vdd_dig-supply = <&pm8994_s1_corner>; #clock-cells = <1>; - status="disabled"; }; clock_mmss: qcom,mmsscc@8c0000 {