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power: qpnp-fg-gen3: Add support to configure base termination current

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Add support to configure base termination current which is the
upper boundary at which fuel gauge will signal an end of charge
to the charger during discharging.

Change-Id: Ied2f89fc8e132161d55a9bfbcca6738fef164b20
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
This commit is contained in:
Subbaraman Narayanamurthy 2017-04-04 20:28:03 -07:00
parent 82e30aafda
commit 6c3f86c0af
3 changed files with 36 additions and 0 deletions
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8
Documentation/devicetree/bindings/power/supply/qcom/qpnp-fg-gen3.txt
View file

@ -96,6 +96,14 @@ First Level Node - FG Gen3 device
This value has to be specified in negative values for
the charging current.
- qcom,fg-chg-term-base-current
Usage: optional
Value type: <u32>
Definition: Battery current (in mA) upper boundary at which the fuel
gauge will issue an end of charge during discharging. If
this property is not specified, then the default value used
will be 75mA.
- qcom,fg-delta-soc-thr
Usage: optional
Value type: <u32>

2
drivers/power/supply/qcom/fg-core.h
View file

@ -165,6 +165,7 @@ enum fg_sram_param_id {
FG_SRAM_ESR_PULSE_THRESH,
FG_SRAM_SYS_TERM_CURR,
FG_SRAM_CHG_TERM_CURR,
FG_SRAM_CHG_TERM_BASE_CURR,
FG_SRAM_DELTA_MSOC_THR,
FG_SRAM_DELTA_BSOC_THR,
FG_SRAM_RECHARGE_SOC_THR,
@ -230,6 +231,7 @@ struct fg_dt_props {
int empty_volt_mv;
int vbatt_low_thr_mv;
int chg_term_curr_ma;
int chg_term_base_curr_ma;
int sys_term_curr_ma;
int delta_soc_thr;
int recharge_soc_thr;

26
drivers/power/supply/qcom/qpnp-fg-gen3.c
View file

@ -130,6 +130,7 @@
#define RECHARGE_SOC_THR_v2_WORD 14
#define RECHARGE_SOC_THR_v2_OFFSET 1
#define CHG_TERM_CURR_v2_WORD 15
#define CHG_TERM_BASE_CURR_v2_OFFSET 0
#define CHG_TERM_CURR_v2_OFFSET 1
#define EMPTY_VOLT_v2_WORD 15
#define EMPTY_VOLT_v2_OFFSET 3
@ -275,6 +276,9 @@ static struct fg_sram_param pmi8998_v2_sram_params[] = {
1000000, 122070, 0, fg_encode_current, NULL),
PARAM(CHG_TERM_CURR, CHG_TERM_CURR_v2_WORD, CHG_TERM_CURR_v2_OFFSET, 1,
100000, 390625, 0, fg_encode_current, NULL),
PARAM(CHG_TERM_BASE_CURR, CHG_TERM_CURR_v2_WORD,
CHG_TERM_BASE_CURR_v2_OFFSET, 1, 1024, 1000, 0,
fg_encode_current, NULL),
PARAM(DELTA_MSOC_THR, DELTA_MSOC_THR_v2_WORD, DELTA_MSOC_THR_v2_OFFSET,
1, 2048, 100, 0, fg_encode_default, NULL),
PARAM(DELTA_BSOC_THR, DELTA_BSOC_THR_v2_WORD, DELTA_BSOC_THR_v2_OFFSET,
@ -3145,6 +3149,21 @@ static int fg_hw_init(struct fg_chip *chip)
return rc;
}
if (!(chip->wa_flags & PMI8998_V1_REV_WA)) {
fg_encode(chip->sp, FG_SRAM_CHG_TERM_BASE_CURR,
chip->dt.chg_term_base_curr_ma, buf);
rc = fg_sram_write(chip,
chip->sp[FG_SRAM_CHG_TERM_BASE_CURR].addr_word,
chip->sp[FG_SRAM_CHG_TERM_BASE_CURR].addr_byte,
buf, chip->sp[FG_SRAM_CHG_TERM_BASE_CURR].len,
FG_IMA_DEFAULT);
if (rc < 0) {
pr_err("Error in writing chg_term_base_curr, rc=%d\n",
rc);
return rc;
}
}
if (chip->dt.vbatt_low_thr_mv > 0) {
fg_encode(chip->sp, FG_SRAM_VBATT_LOW,
chip->dt.vbatt_low_thr_mv, buf);
@ -3803,6 +3822,7 @@ static int fg_parse_ki_coefficients(struct fg_chip *chip)
#define DEFAULT_EMPTY_VOLT_MV 2800
#define DEFAULT_RECHARGE_VOLT_MV 4250
#define DEFAULT_CHG_TERM_CURR_MA 100
#define DEFAULT_CHG_TERM_BASE_CURR_MA 75
#define DEFAULT_SYS_TERM_CURR_MA -125
#define DEFAULT_DELTA_SOC_THR 1
#define DEFAULT_RECHARGE_SOC_THR 95
@ -3956,6 +3976,12 @@ static int fg_parse_dt(struct fg_chip *chip)
else
chip->dt.sys_term_curr_ma = temp;
rc = of_property_read_u32(node, "qcom,fg-chg-term-base-current", &temp);
if (rc < 0)
chip->dt.chg_term_base_curr_ma = DEFAULT_CHG_TERM_BASE_CURR_MA;
else
chip->dt.chg_term_base_curr_ma = temp;
rc = of_property_read_u32(node, "qcom,fg-delta-soc-thr", &temp);
if (rc < 0)
chip->dt.delta_soc_thr = DEFAULT_DELTA_SOC_THR;