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ARM: dts: msm: Add nfc device to msmcobalt

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DT changes for nfc are required on msmcobalt describing
the GPIO behavior for the nfc controller chip.

Modified dtsi files for MTP and CDP device.

Change-Id: Id19733e6e075a427c4aa745b5bedc93f29a2dd4f
Signed-off-by: Gaurav Singhal <gsinghal@codeaurora.org>
This commit is contained in:
Gaurav Singhal 2016-05-11 19:30:38 +05:30 • committed by Kyle Yan
parent 05bd41f94e
commit 6ddfbd7d4f
3 changed files with 124 additions and 0 deletions
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31
arch/arm/boot/dts/qcom/msmcobalt-cdp.dtsi
View file

@ -107,6 +107,15 @@
qcom,master-en = <1>;
status = "okay";
};
/* GPIO 21 (NFC_CLK_REQ) */
gpio@d400 {
qcom,mode = <0>;
qcom,vin-sel = <1>;
qcom,src-sel = <0>;
qcom,master-en = <1>;
status = "okay";
};
};
&i2c_5 {
@ -134,6 +143,28 @@
};
};
&i2c_6 { /* BLSP1 QUP6 (NFC) */
status = "okay";
nq@28 {
compatible = "qcom,nq-nci";
reg = <0x28>;
qcom,nq-irq = <&tlmm 92 0x00>;
qcom,nq-ven = <&tlmm 12 0x00>;
qcom,nq-firm = <&tlmm 93 0x00>;
qcom,nq-clkreq = <&pmcobalt_gpios 21 0x00>;
qcom,nq-esepwr = <&tlmm 116 0x00>;
interrupt-parent = <&tlmm>;
qcom,clk-src = "BBCLK3";
interrupts = <92 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
clocks = <&clock_gcc clk_ln_bb_clk3_pin>;
clock-names = "ref_clk";
};
};
&mdss_mdp {
qcom,mdss-pref-prim-intf = "dsi";
};

31
arch/arm/boot/dts/qcom/msmcobalt-mtp.dtsi
View file

@ -107,6 +107,15 @@
qcom,master-en = <1>;
status = "okay";
};
/* GPIO 21 (NFC_CLK_REQ) */
gpio@d400 {
qcom,mode = <0>;
qcom,vin-sel = <1>;
qcom,src-sel = <0>;
qcom,master-en = <1>;
status = "okay";
};
};
&i2c_5 {
@ -134,6 +143,28 @@
};
};
&i2c_6 { /* BLSP1 QUP6 (NFC) */
status = "okay";
nq@28 {
compatible = "qcom,nq-nci";
reg = <0x28>;
qcom,nq-irq = <&tlmm 92 0x00>;
qcom,nq-ven = <&tlmm 12 0x00>;
qcom,nq-firm = <&tlmm 93 0x00>;
qcom,nq-clkreq = <&pmcobalt_gpios 21 0x00>;
qcom,nq-esepwr = <&tlmm 116 0x00>;
interrupt-parent = <&tlmm>;
qcom,clk-src = "BBCLK3";
interrupts = <92 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
clocks = <&clock_gcc clk_ln_bb_clk3_pin>;
clock-names = "ref_clk";
};
};
&pmicobalt_haptics {
status = "okay";
};

62
arch/arm/boot/dts/qcom/msmcobalt-pinctrl.dtsi
View file

@ -218,6 +218,68 @@
};
};
nfc {
nfc_int_active: nfc_int_active {
/* active state */
mux {
/* GPIO 92 NFC Read Interrupt */
pins = "gpio92";
function = "gpio";
};
config {
pins = "gpio92";
drive-strength = <6>; /* 6 MA */
bias-pull-up;
};
};
nfc_int_suspend: nfc_int_suspend {
/* sleep state */
mux {
/* GPIO 92 NFC Read Interrupt */
pins = "gpio92";
function = "gpio";
};
config {
pins = "gpio92";
drive-strength = <6>; /* 6 MA */
bias-pull-up;
};
};
nfc_enable_active: nfc_enable_active {
/* active state */
mux {
/* 12: NFC ENABLE 116:ESE Enable */
pins = "gpio12", "gpio116";
function = "gpio";
};
config {
pins = "gpio12", "gpio116";
drive-strength = <6>; /* 6 MA */
bias-pull-up;
};
};
nfc_enable_suspend: nfc_enable_suspend {
/* sleep state */
mux {
/* 12: NFC ENABLE 116:ESE Enable */
pins = "gpio12", "gpio116";
function = "gpio";
};
config {
pins = "gpio12", "gpio116";
drive-strength = <6>; /* 6 MA */
bias-disable;
};
};
};
i2c_7 {
i2c_7_active: i2c_7_active {
mux {