diff --git a/Documentation/devicetree/bindings/fb/mdss-pll.txt b/Documentation/devicetree/bindings/fb/mdss-pll.txt
index ad06323bfba5..1a8b17579bd0 100644
--- a/Documentation/devicetree/bindings/fb/mdss-pll.txt
+++ b/Documentation/devicetree/bindings/fb/mdss-pll.txt
@@ -5,12 +5,18 @@ are compatable with MIPI display serial interface specification,
 HDMI and edp.
 
 Required properties:
-- compatible:		Compatible name used in the driver
+- compatible:		Compatible name used in the driver. Should be one of:
+			"qcom,mdss_dsi_pll_8916", "qcom,mdss_dsi_pll_8939",
+			"qcom,mdss_dsi_pll_8974", "qcom,mdss_dsi_pll_8994",
+			"qcom,mdss_dsi_pll_8994", "qcom,mdss_dsi_pll_8909",
+			"qcom,mdss_hdmi_pll", "qcom,mdss_hdmi_pll_8994"
 - cell-index:		Specifies the controller used
 - reg:			offset and length of the register set for the device.
 - reg-names :		names to refer to register sets related to this device
 - gdsc-supply:		Phandle for gdsc regulator device node.
 - vddio-supply:		Phandle for vddio regulator device node.
+- clocks:		List of Phandles for clock device nodes
+			needed by the device.
 - clock-names:		List of clock names needed by the device.
 - clock-rate:		List of clock rates in Hz.
 
@@ -36,7 +42,7 @@ Optional properties:
 
 Example:
 	mdss_dsi0_pll: qcom,mdss_dsi_pll@fd922A00 {
-		compatible = "qcom,mdss_dsi_pll";
+		compatible = "qcom,mdss_dsi_pll_8974";
 		label = "MDSS DSI 0 PLL";
 		cell-index = <0>;
 
@@ -47,6 +53,9 @@ Example:
 		vddio-supply = <&pm8941_l12>;
 		vcca-supply = <&pm8941_l28>;
 
+		clocks = <&clock_gcc clk_gcc_mdss_mdp_clk>,
+			 <&clock_gcc clk_gcc_mdss_ahb_clk>,
+			 <&clock_gcc clk_gcc_mdss_axi_clk>;
 		clock-names = "mdp_core_clk", "iface_clk", "bus_clk";
 		clock-rate = <0>, <0>, <0>;
 
diff --git a/drivers/clk/msm/mdss/mdss-dsi-pll-28lpm.c b/drivers/clk/msm/mdss/mdss-dsi-pll-28lpm.c
index 4e998e139943..2c8e93670c80 100644
--- a/drivers/clk/msm/mdss/mdss-dsi-pll-28lpm.c
+++ b/drivers/clk/msm/mdss/mdss-dsi-pll-28lpm.c
@@ -286,7 +286,8 @@ int dsi_pll_clock_register_lpm(struct platform_device *pdev,
 	byte_mux_clk_ops.prepare = dsi_pll_mux_prepare;
 
 	if (pll_res->target_id == MDSS_PLL_TARGET_8916 ||
-		pll_res->target_id == MDSS_PLL_TARGET_8939) {
+		pll_res->target_id == MDSS_PLL_TARGET_8939 ||
+		pll_res->target_id == MDSS_PLL_TARGET_8909) {
 		rc = of_msm_clock_register(pdev->dev.of_node,
 			mdss_dsi_pllcc_8916, ARRAY_SIZE(mdss_dsi_pllcc_8916));
 		if (rc) {
diff --git a/drivers/clk/msm/mdss/mdss-pll.c b/drivers/clk/msm/mdss/mdss-pll.c
index d5119cc548c0..093c93cbf72b 100644
--- a/drivers/clk/msm/mdss/mdss-pll.c
+++ b/drivers/clk/msm/mdss/mdss-pll.c
@@ -133,6 +133,9 @@ static int mdss_pll_resource_parse(struct platform_device *pdev,
 	} else if (!strcmp(compatible_stream, "qcom,mdss_dsi_pll_8939")) {
 		pll_res->pll_interface_type = MDSS_DSI_PLL_LPM;
 		pll_res->target_id = MDSS_PLL_TARGET_8939;
+	} else if (!strcmp(compatible_stream, "qcom,mdss_dsi_pll_8909")) {
+		pll_res->pll_interface_type = MDSS_DSI_PLL_LPM;
+		pll_res->target_id = MDSS_PLL_TARGET_8909;
 	} else if (!strcmp(compatible_stream, "qcom,mdss_dsi_pll_8974")) {
 		pll_res->pll_interface_type = MDSS_DSI_PLL_HPM;
 		pll_res->target_id = MDSS_PLL_TARGET_8974;
@@ -365,6 +368,7 @@ static const struct of_device_id mdss_pll_dt_match[] = {
 	{.compatible = "qcom,mdss_hdmi_pll_8994"},
 	{.compatible = "qcom,mdss_dsi_pll_8916"},
 	{.compatible = "qcom,mdss_dsi_pll_8939"},
+	{.compatible = "qcom,mdss_dsi_pll_8909"},
 	{.compatible = "qcom,mdss_edp_pll"},
 	{.compatible = "qcom,mdss_hdmi_pll"},
 	{}
diff --git a/drivers/clk/msm/mdss/mdss-pll.h b/drivers/clk/msm/mdss/mdss-pll.h
index 20642a9270f0..6092e332ed1d 100644
--- a/drivers/clk/msm/mdss/mdss-pll.h
+++ b/drivers/clk/msm/mdss/mdss-pll.h
@@ -42,6 +42,7 @@ enum {
 	MDSS_PLL_TARGET_8994,
 	MDSS_PLL_TARGET_8916,
 	MDSS_PLL_TARGET_8939,
+	MDSS_PLL_TARGET_8909,
 };
 
 struct mdss_pll_resources {