sh: hd6446x: Convert to sparseirq.
Follows the se7724 change and converts the hd64461 IRQ handling to sparseirq. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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c7a967273a
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2 changed files with 20 additions and 3 deletions
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@ -731,7 +731,7 @@ config GUSA_RB
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config SPARSE_IRQ
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config SPARSE_IRQ
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def_bool y
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def_bool y
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depends on SUPERH32 && !SH_DREAMCAST && !SH_HIGHLANDER && \
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depends on SUPERH32 && !SH_DREAMCAST && !SH_HIGHLANDER && \
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!SH_RTS7751R2D && !HD64461
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!SH_RTS7751R2D
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help
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help
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This enables support for sparse irqs. This is useful in general
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This enables support for sparse irqs. This is useful in general
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as most CPUs have a fairly sparse array of IRQ vectors, which
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as most CPUs have a fairly sparse array of IRQ vectors, which
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@ -73,7 +73,7 @@ static void hd64461_irq_demux(unsigned int irq, struct irq_desc *desc)
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int __init setup_hd64461(void)
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int __init setup_hd64461(void)
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{
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{
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int i;
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int i, nid = cpu_to_node(boot_cpu_data);
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if (!MACH_HD64461)
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if (!MACH_HD64461)
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return 0;
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return 0;
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@ -90,9 +90,26 @@ int __init setup_hd64461(void)
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__raw_writew(0xffff, HD64461_NIMR);
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__raw_writew(0xffff, HD64461_NIMR);
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/* IRQ 80 -> 95 belongs to HD64461 */
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/* IRQ 80 -> 95 belongs to HD64461 */
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for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++)
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for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) {
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unsigned int irq;
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irq = create_irq_nr(i, nid);
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if (unlikely(irq == 0)) {
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pr_err("%s: failed hooking irq %d for HD64461\n",
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__func__, i);
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return -EBUSY;
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}
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if (unlikely(irq != i)) {
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pr_err("%s: got irq %d but wanted %d, bailing.\n",
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__func__, irq, i);
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destroy_irq(irq);
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return -EINVAL;
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}
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set_irq_chip_and_handler(i, &hd64461_irq_chip,
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set_irq_chip_and_handler(i, &hd64461_irq_chip,
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handle_level_irq);
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handle_level_irq);
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}
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set_irq_chained_handler(CONFIG_HD64461_IRQ, hd64461_irq_demux);
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set_irq_chained_handler(CONFIG_HD64461_IRQ, hd64461_irq_demux);
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set_irq_type(CONFIG_HD64461_IRQ, IRQ_TYPE_LEVEL_LOW);
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set_irq_type(CONFIG_HD64461_IRQ, IRQ_TYPE_LEVEL_LOW);
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