From 6ee131307e2ac1ceb2e7b01d772bf1b62e73e6be Mon Sep 17 00:00:00 2001
From: Charan Teja Reddy <charante@codeaurora.org>
Date: Tue, 20 Dec 2016 16:37:21 +0530
Subject: [PATCH] ARM: dts: msm: add bus vote for mmss smmu on msmfalcon

The MMSS SMMU needs a bus vote in order to light the path to DDR.

Change-Id: Ia045cce7573083b080bb578bfc7a8c4c59594146
Signed-off-by: Charan Teja Reddy <charante@codeaurora.org>
---
 arch/arm/boot/dts/qcom/msm-arm-smmu-falcon.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/qcom/msm-arm-smmu-falcon.dtsi b/arch/arm/boot/dts/qcom/msm-arm-smmu-falcon.dtsi
index ff4db75d9aff..c48884e7a008 100644
--- a/arch/arm/boot/dts/qcom/msm-arm-smmu-falcon.dtsi
+++ b/arch/arm/boot/dts/qcom/msm-arm-smmu-falcon.dtsi
@@ -12,6 +12,7 @@
 
 #include <dt-bindings/clock/qcom,gcc-msmfalcon.h>
 #include <dt-bindings/clock/qcom,mmcc-msmfalcon.h>
+#include <dt-bindings/msm/msm-bus-ids.h>
 #include <dt-bindings/clock/qcom,rpmcc.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
@@ -135,6 +136,7 @@
 			      "mmss_bimc_smmu_ahb_clk",
 			      "mmss_bimc_smmu_axi_clk";
 		#clock-cells = <1>;
+		qcom,bus-master-id = <MSM_BUS_MNOC_BIMC_MAS>;
 	};
 
 	kgsl_smmu: arm,smmu-kgsl@5040000 {