evie/android_kernel_oneplus_msm8998
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc

Browse source 
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
  powerpc: Fix 64bit __copy_tofrom_user() regression
  powerpc: Fix 64bit memcpy() regression
  powerpc: Fix load/store float double alignment handler
This commit is contained in:
Linus Torvalds 2009-02-26 10:36:19 -08:00
commit 6fc79d40d3
3 changed files with 64 additions and 29 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

29
arch/powerpc/kernel/align.c
View file

@ -367,27 +367,24 @@ static int emulate_multiple(struct pt_regs *regs, unsigned char __user *addr,
static int emulate_fp_pair(unsigned char __user *addr, unsigned int reg, static int emulate_fp_pair(unsigned char __user *addr, unsigned int reg,
unsigned int flags) unsigned int flags)
{ {
char *ptr = (char *) &current->thread.TS_FPR(reg); char *ptr0 = (char *) &current->thread.TS_FPR(reg);
int i, ret; char *ptr1 = (char *) &current->thread.TS_FPR(reg+1);
int i, ret, sw = 0;
if (!(flags & F)) if (!(flags & F))
return 0; return 0;
if (reg & 1) if (reg & 1)
return 0; /* invalid form: FRS/FRT must be even */ return 0; /* invalid form: FRS/FRT must be even */
if (!(flags & SW)) { if (flags & SW)
/* not byte-swapped - easy */ sw = 7;
if (!(flags & ST)) ret = 0;
ret = __copy_from_user(ptr, addr, 16); for (i = 0; i < 8; ++i) {
else if (!(flags & ST)) {
ret = __copy_to_user(addr, ptr, 16); ret |= __get_user(ptr0[i^sw], addr + i);
} else { ret |= __get_user(ptr1[i^sw], addr + i + 8);
/* each FPR value is byte-swapped separately */ } else {
ret = 0; ret |= __put_user(ptr0[i^sw], addr + i);
for (i = 0; i < 16; ++i) { ret |= __put_user(ptr1[i^sw], addr + i + 8);
if (!(flags & ST))
ret |= __get_user(ptr[i^7], addr + i);
else
ret |= __put_user(ptr[i^7], addr + i);
} }
} }
if (ret) if (ret)

38
arch/powerpc/lib/copyuser_64.S
View file

@ -62,18 +62,19 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
72: std r8,8(r3) 72: std r8,8(r3)
beq+ 3f beq+ 3f
addi r3,r3,16 addi r3,r3,16
23: ld r9,8(r4)
.Ldo_tail: .Ldo_tail:
bf cr7*4+1,1f bf cr7*4+1,1f
rotldi r9,r9,32 23: lwz r9,8(r4)
addi r4,r4,4
73: stw r9,0(r3) 73: stw r9,0(r3)
addi r3,r3,4 addi r3,r3,4
1: bf cr7*4+2,2f 1: bf cr7*4+2,2f
rotldi r9,r9,16 44: lhz r9,8(r4)
addi r4,r4,2
74: sth r9,0(r3) 74: sth r9,0(r3)
addi r3,r3,2 addi r3,r3,2
2: bf cr7*4+3,3f 2: bf cr7*4+3,3f
rotldi r9,r9,8 45: lbz r9,8(r4)
75: stb r9,0(r3) 75: stb r9,0(r3)
3: li r3,0 3: li r3,0
blr blr
@ -141,11 +142,24 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
6: cmpwi cr1,r5,8 6: cmpwi cr1,r5,8
addi r3,r3,32 addi r3,r3,32
sld r9,r9,r10 sld r9,r9,r10
ble cr1,.Ldo_tail ble cr1,7f
34: ld r0,8(r4) 34: ld r0,8(r4)
srd r7,r0,r11 srd r7,r0,r11
or r9,r7,r9 or r9,r7,r9
b .Ldo_tail 7:
bf cr7*4+1,1f
rotldi r9,r9,32
94: stw r9,0(r3)
addi r3,r3,4
1: bf cr7*4+2,2f
rotldi r9,r9,16
95: sth r9,0(r3)
addi r3,r3,2
2: bf cr7*4+3,3f
rotldi r9,r9,8
96: stb r9,0(r3)
3: li r3,0
blr
.Ldst_unaligned: .Ldst_unaligned:
PPC_MTOCRF 0x01,r6 /* put #bytes to 8B bdry into cr7 */ PPC_MTOCRF 0x01,r6 /* put #bytes to 8B bdry into cr7 */
@ -218,7 +232,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
121: 121:
132: 132:
addi r3,r3,8 addi r3,r3,8
123:
134: 134:
135: 135:
138: 138:
@ -226,6 +239,9 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
140: 140:
141: 141:
142: 142:
123:
144:
145:
/* /*
* here we have had a fault on a load and r3 points to the first * here we have had a fault on a load and r3 points to the first
@ -309,6 +325,9 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
187: 187:
188: 188:
189: 189:
194:
195:
196:
1: 1:
ld r6,-24(r1) ld r6,-24(r1)
ld r5,-8(r1) ld r5,-8(r1)
@ -329,7 +348,9 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
.llong 72b,172b .llong 72b,172b
.llong 23b,123b .llong 23b,123b
.llong 73b,173b .llong 73b,173b
.llong 44b,144b
.llong 74b,174b .llong 74b,174b
.llong 45b,145b
.llong 75b,175b .llong 75b,175b
.llong 24b,124b .llong 24b,124b
.llong 25b,125b .llong 25b,125b
@ -347,6 +368,9 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
.llong 79b,179b .llong 79b,179b
.llong 80b,180b .llong 80b,180b
.llong 34b,134b .llong 34b,134b
.llong 94b,194b
.llong 95b,195b
.llong 96b,196b
.llong 35b,135b .llong 35b,135b
.llong 81b,181b .llong 81b,181b
.llong 36b,136b .llong 36b,136b

26
arch/powerpc/lib/memcpy_64.S
View file

@ -53,18 +53,19 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
3: std r8,8(r3) 3: std r8,8(r3)
beq 3f beq 3f
addi r3,r3,16 addi r3,r3,16
ld r9,8(r4)
.Ldo_tail: .Ldo_tail:
bf cr7*4+1,1f bf cr7*4+1,1f
rotldi r9,r9,32 lwz r9,8(r4)
addi r4,r4,4
stw r9,0(r3) stw r9,0(r3)
addi r3,r3,4 addi r3,r3,4
1: bf cr7*4+2,2f 1: bf cr7*4+2,2f
rotldi r9,r9,16 lhz r9,8(r4)
addi r4,r4,2
sth r9,0(r3) sth r9,0(r3)
addi r3,r3,2 addi r3,r3,2
2: bf cr7*4+3,3f 2: bf cr7*4+3,3f
rotldi r9,r9,8 lbz r9,8(r4)
stb r9,0(r3) stb r9,0(r3)
3: ld r3,48(r1) /* return dest pointer */ 3: ld r3,48(r1) /* return dest pointer */
blr blr
@ -133,11 +134,24 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
cmpwi cr1,r5,8 cmpwi cr1,r5,8
addi r3,r3,32 addi r3,r3,32
sld r9,r9,r10 sld r9,r9,r10
ble cr1,.Ldo_tail ble cr1,6f
ld r0,8(r4) ld r0,8(r4)
srd r7,r0,r11 srd r7,r0,r11
or r9,r7,r9 or r9,r7,r9
b .Ldo_tail 6:
bf cr7*4+1,1f
rotldi r9,r9,32
stw r9,0(r3)
addi r3,r3,4
1: bf cr7*4+2,2f
rotldi r9,r9,16
sth r9,0(r3)
addi r3,r3,2
2: bf cr7*4+3,3f
rotldi r9,r9,8
stb r9,0(r3)
3: ld r3,48(r1) /* return dest pointer */
blr
.Ldst_unaligned: .Ldst_unaligned:
PPC_MTOCRF 0x01,r6 # put #bytes to 8B bdry into cr7 PPC_MTOCRF 0x01,r6 # put #bytes to 8B bdry into cr7