[media] omap3isp: preview: Add support for non-GRBG Bayer patterns
Rearrange the CFA interpolation coefficients table based on the Bayer pattern. Support for non-Bayer CFA patterns is dropped as they were not correctly supported, and have never been tested. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Sakari Ailus <sakari.ailus@iki.fi> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
parent
ac9dad9316
commit
6fd206cb6e
4 changed files with 89 additions and 58 deletions
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@ -23,7 +23,7 @@
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* 02110-1301 USA
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* 02110-1301 USA
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*/
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*/
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244, 0, 247, 0, 12, 27, 36, 247, 250, 0, 27, 0, 4, 250, 12, 244,
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{ 244, 0, 247, 0, 12, 27, 36, 247, 250, 0, 27, 0, 4, 250, 12, 244,
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248, 0, 0, 0, 0, 40, 0, 0, 244, 12, 250, 4, 0, 27, 0, 250,
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248, 0, 0, 0, 0, 40, 0, 0, 244, 12, 250, 4, 0, 27, 0, 250,
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247, 36, 27, 12, 0, 247, 0, 244, 0, 0, 40, 0, 0, 0, 0, 248,
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247, 36, 27, 12, 0, 247, 0, 244, 0, 0, 40, 0, 0, 0, 0, 248,
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244, 0, 247, 0, 12, 27, 36, 247, 250, 0, 27, 0, 4, 250, 12, 244,
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244, 0, 247, 0, 12, 27, 36, 247, 250, 0, 27, 0, 4, 250, 12, 244,
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@ -31,8 +31,8 @@
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247, 36, 27, 12, 0, 247, 0, 244, 0, 0, 40, 0, 0, 0, 0, 248,
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247, 36, 27, 12, 0, 247, 0, 244, 0, 0, 40, 0, 0, 0, 0, 248,
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244, 0, 247, 0, 12, 27, 36, 247, 250, 0, 27, 0, 4, 250, 12, 244,
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244, 0, 247, 0, 12, 27, 36, 247, 250, 0, 27, 0, 4, 250, 12, 244,
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248, 0, 0, 0, 0, 40, 0, 0, 244, 12, 250, 4, 0, 27, 0, 250,
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248, 0, 0, 0, 0, 40, 0, 0, 244, 12, 250, 4, 0, 27, 0, 250,
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247, 36, 27, 12, 0, 247, 0, 244, 0, 0, 40, 0, 0, 0, 0, 248,
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247, 36, 27, 12, 0, 247, 0, 244, 0, 0, 40, 0, 0, 0, 0, 248 },
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0, 247, 0, 244, 247, 36, 27, 12, 0, 27, 0, 250, 244, 12, 250, 4,
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{ 0, 247, 0, 244, 247, 36, 27, 12, 0, 27, 0, 250, 244, 12, 250, 4,
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0, 0, 0, 248, 0, 0, 40, 0, 4, 250, 12, 244, 250, 0, 27, 0,
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0, 0, 0, 248, 0, 0, 40, 0, 4, 250, 12, 244, 250, 0, 27, 0,
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12, 27, 36, 247, 244, 0, 247, 0, 0, 40, 0, 0, 248, 0, 0, 0,
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12, 27, 36, 247, 244, 0, 247, 0, 0, 40, 0, 0, 248, 0, 0, 0,
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0, 247, 0, 244, 247, 36, 27, 12, 0, 27, 0, 250, 244, 12, 250, 4,
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0, 247, 0, 244, 247, 36, 27, 12, 0, 27, 0, 250, 244, 12, 250, 4,
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@ -40,8 +40,8 @@
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12, 27, 36, 247, 244, 0, 247, 0, 0, 40, 0, 0, 248, 0, 0, 0,
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12, 27, 36, 247, 244, 0, 247, 0, 0, 40, 0, 0, 248, 0, 0, 0,
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0, 247, 0, 244, 247, 36, 27, 12, 0, 27, 0, 250, 244, 12, 250, 4,
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0, 247, 0, 244, 247, 36, 27, 12, 0, 27, 0, 250, 244, 12, 250, 4,
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0, 0, 0, 248, 0, 0, 40, 0, 4, 250, 12, 244, 250, 0, 27, 0,
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0, 0, 0, 248, 0, 0, 40, 0, 4, 250, 12, 244, 250, 0, 27, 0,
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12, 27, 36, 247, 244, 0, 247, 0, 0, 40, 0, 0, 248, 0, 0, 0,
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12, 27, 36, 247, 244, 0, 247, 0, 0, 40, 0, 0, 248, 0, 0, 0 },
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4, 250, 12, 244, 250, 0, 27, 0, 12, 27, 36, 247, 244, 0, 247, 0,
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{ 4, 250, 12, 244, 250, 0, 27, 0, 12, 27, 36, 247, 244, 0, 247, 0,
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0, 0, 0, 248, 0, 0, 40, 0, 0, 247, 0, 244, 247, 36, 27, 12,
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0, 0, 0, 248, 0, 0, 40, 0, 0, 247, 0, 244, 247, 36, 27, 12,
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0, 27, 0, 250, 244, 12, 250, 4, 0, 40, 0, 0, 248, 0, 0, 0,
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0, 27, 0, 250, 244, 12, 250, 4, 0, 40, 0, 0, 248, 0, 0, 0,
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4, 250, 12, 244, 250, 0, 27, 0, 12, 27, 36, 247, 244, 0, 247, 0,
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4, 250, 12, 244, 250, 0, 27, 0, 12, 27, 36, 247, 244, 0, 247, 0,
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@ -49,8 +49,8 @@
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0, 27, 0, 250, 244, 12, 250, 4, 0, 40, 0, 0, 248, 0, 0, 0,
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0, 27, 0, 250, 244, 12, 250, 4, 0, 40, 0, 0, 248, 0, 0, 0,
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4, 250, 12, 244, 250, 0, 27, 0, 12, 27, 36, 247, 244, 0, 247, 0,
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4, 250, 12, 244, 250, 0, 27, 0, 12, 27, 36, 247, 244, 0, 247, 0,
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0, 0, 0, 248, 0, 0, 40, 0, 0, 247, 0, 244, 247, 36, 27, 12,
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0, 0, 0, 248, 0, 0, 40, 0, 0, 247, 0, 244, 247, 36, 27, 12,
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0, 27, 0, 250, 244, 12, 250, 4, 0, 40, 0, 0, 248, 0, 0, 0,
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0, 27, 0, 250, 244, 12, 250, 4, 0, 40, 0, 0, 248, 0, 0, 0 },
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244, 12, 250, 4, 0, 27, 0, 250, 247, 36, 27, 12, 0, 247, 0, 244,
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{ 244,12, 250, 4, 0, 27, 0, 250, 247, 36, 27, 12, 0, 247, 0, 244,
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248, 0, 0, 0, 0, 40, 0, 0, 244, 0, 247, 0, 12, 27, 36, 247,
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248, 0, 0, 0, 0, 40, 0, 0, 244, 0, 247, 0, 12, 27, 36, 247,
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250, 0, 27, 0, 4, 250, 12, 244, 0, 0, 40, 0, 0, 0, 0, 248,
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250, 0, 27, 0, 4, 250, 12, 244, 0, 0, 40, 0, 0, 0, 0, 248,
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244, 12, 250, 4, 0, 27, 0, 250, 247, 36, 27, 12, 0, 247, 0, 244,
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244, 12, 250, 4, 0, 27, 0, 250, 247, 36, 27, 12, 0, 247, 0, 244,
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@ -58,4 +58,4 @@
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250, 0, 27, 0, 4, 250, 12, 244, 0, 0, 40, 0, 0, 0, 0, 248,
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250, 0, 27, 0, 4, 250, 12, 244, 0, 0, 40, 0, 0, 0, 0, 248,
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244, 12, 250, 4, 0, 27, 0, 250, 247, 36, 27, 12, 0, 247, 0, 244,
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244, 12, 250, 4, 0, 27, 0, 250, 247, 36, 27, 12, 0, 247, 0, 244,
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248, 0, 0, 0, 0, 40, 0, 0, 244, 0, 247, 0, 12, 27, 36, 247,
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248, 0, 0, 0, 0, 40, 0, 0, 244, 0, 247, 0, 12, 27, 36, 247,
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250, 0, 27, 0, 4, 250, 12, 244, 0, 0, 40, 0, 0, 0, 0, 248
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250, 0, 27, 0, 4, 250, 12, 244, 0, 0, 40, 0, 0, 0, 0, 248 },
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@ -131,7 +131,7 @@ static struct omap3isp_prev_csc flr_prev_csc = {
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* CFA Filter Coefficient Table
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* CFA Filter Coefficient Table
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*
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*
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*/
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*/
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static u32 cfa_coef_table[] = {
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static u32 cfa_coef_table[4][OMAP3ISP_PREV_CFA_BLK_SIZE] = {
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#include "cfa_coef_table.h"
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#include "cfa_coef_table.h"
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};
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};
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@ -237,19 +237,27 @@ static void preview_enable_hmed(struct isp_prev_device *prev, bool enable)
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}
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}
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/*
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/*
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* preview_config_cfa - Configure CFA Interpolation
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* preview_config_cfa - Configure CFA Interpolation for Bayer formats
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*
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* The CFA table is organised in four blocks, one per Bayer component. The
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* hardware expects blocks to follow the Bayer order of the input data, while
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* the driver stores the table in GRBG order in memory. The blocks need to be
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* reordered to support non-GRBG Bayer patterns.
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*/
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*/
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static void
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static void preview_config_cfa(struct isp_prev_device *prev,
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preview_config_cfa(struct isp_prev_device *prev,
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const struct prev_params *params)
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const struct prev_params *params)
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{
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{
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struct isp_device *isp = to_isp_device(prev);
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static const unsigned int cfa_coef_order[4][4] = {
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{ 0, 1, 2, 3 }, /* GRBG */
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{ 1, 0, 3, 2 }, /* RGGB */
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{ 2, 3, 0, 1 }, /* BGGR */
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{ 3, 2, 1, 0 }, /* GBRG */
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};
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const unsigned int *order = cfa_coef_order[prev->params.cfa_order];
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const struct omap3isp_prev_cfa *cfa = ¶ms->cfa;
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const struct omap3isp_prev_cfa *cfa = ¶ms->cfa;
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struct isp_device *isp = to_isp_device(prev);
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unsigned int i;
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unsigned int i;
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unsigned int j;
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isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
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ISPPRV_PCR_CFAFMT_MASK,
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cfa->format << ISPPRV_PCR_CFAFMT_SHIFT);
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isp_reg_writel(isp,
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isp_reg_writel(isp,
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(cfa->gradthrs_vert << ISPPRV_CFA_GRADTH_VER_SHIFT) |
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(cfa->gradthrs_vert << ISPPRV_CFA_GRADTH_VER_SHIFT) |
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@ -259,9 +267,12 @@ preview_config_cfa(struct isp_prev_device *prev,
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isp_reg_writel(isp, ISPPRV_CFA_TABLE_ADDR,
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isp_reg_writel(isp, ISPPRV_CFA_TABLE_ADDR,
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OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
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OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
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for (i = 0; i < OMAP3ISP_PREV_CFA_TBL_SIZE; i++) {
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for (i = 0; i < 4; ++i) {
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isp_reg_writel(isp, cfa->table[i],
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const __u32 *block = cfa->table[order[i]];
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OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_DATA);
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for (j = 0; j < OMAP3ISP_PREV_CFA_BLK_SIZE; ++j)
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isp_reg_writel(isp, block[j], OMAP3_ISP_IOMEM_PREV,
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ISPPRV_SET_TBL_DATA);
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}
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}
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}
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}
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@ -993,42 +1004,60 @@ preview_config_ycpos(struct isp_prev_device *prev,
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static void preview_config_averager(struct isp_prev_device *prev, u8 average)
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static void preview_config_averager(struct isp_prev_device *prev, u8 average)
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{
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{
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struct isp_device *isp = to_isp_device(prev);
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struct isp_device *isp = to_isp_device(prev);
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struct prev_params *params;
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int reg = 0;
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params = (prev->params.active & OMAP3ISP_PREV_CFA)
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isp_reg_writel(isp, ISPPRV_AVE_EVENDIST_2 << ISPPRV_AVE_EVENDIST_SHIFT |
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? &prev->params.params[0] : &prev->params.params[1];
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ISPPRV_AVE_ODDDIST_2 << ISPPRV_AVE_ODDDIST_SHIFT |
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average, OMAP3_ISP_IOMEM_PREV, ISPPRV_AVE);
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if (params->cfa.format == OMAP3ISP_CFAFMT_BAYER)
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reg = ISPPRV_AVE_EVENDIST_2 << ISPPRV_AVE_EVENDIST_SHIFT |
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ISPPRV_AVE_ODDDIST_2 << ISPPRV_AVE_ODDDIST_SHIFT |
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average;
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else if (params->cfa.format == OMAP3ISP_CFAFMT_RGBFOVEON)
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reg = ISPPRV_AVE_EVENDIST_3 << ISPPRV_AVE_EVENDIST_SHIFT |
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ISPPRV_AVE_ODDDIST_3 << ISPPRV_AVE_ODDDIST_SHIFT |
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average;
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isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_PREV, ISPPRV_AVE);
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}
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}
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/*
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/*
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* preview_config_input_format - Configure the input format
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* preview_config_input_format - Configure the input format
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* @prev: The preview engine
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* @prev: The preview engine
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* @format: Format on the preview engine sink pad
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* @format: Format on the preview engine sink pad
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*
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*
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* Enable CFA interpolation for Bayer formats and disable it for greyscale
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* Enable and configure CFA interpolation for Bayer formats and disable it for
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* formats.
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* greyscale formats.
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*
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* The CFA table is organised in four blocks, one per Bayer component. The
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* hardware expects blocks to follow the Bayer order of the input data, while
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* the driver stores the table in GRBG order in memory. The blocks need to be
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* reordered to support non-GRBG Bayer patterns.
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*/
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*/
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static void preview_config_input_format(struct isp_prev_device *prev,
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static void preview_config_input_format(struct isp_prev_device *prev,
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const struct v4l2_mbus_framefmt *format)
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const struct v4l2_mbus_framefmt *format)
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{
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{
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struct isp_device *isp = to_isp_device(prev);
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struct isp_device *isp = to_isp_device(prev);
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struct prev_params *params;
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if (format->code != V4L2_MBUS_FMT_Y10_1X10)
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switch (format->code) {
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isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
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case V4L2_MBUS_FMT_SGRBG10_1X10:
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ISPPRV_PCR_CFAEN);
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prev->params.cfa_order = 0;
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else
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break;
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case V4L2_MBUS_FMT_SRGGB10_1X10:
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prev->params.cfa_order = 1;
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break;
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case V4L2_MBUS_FMT_SBGGR10_1X10:
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prev->params.cfa_order = 2;
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break;
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case V4L2_MBUS_FMT_SGBRG10_1X10:
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prev->params.cfa_order = 3;
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break;
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default:
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/* Disable CFA for non-Bayer formats. */
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isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
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isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
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ISPPRV_PCR_CFAEN);
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ISPPRV_PCR_CFAEN);
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return;
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}
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isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR, ISPPRV_PCR_CFAEN);
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isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
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ISPPRV_PCR_CFAFMT_MASK, ISPPRV_PCR_CFAFMT_BAYER);
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params = (prev->params.active & OMAP3ISP_PREV_CFA)
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? &prev->params.params[0] : &prev->params.params[1];
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preview_config_cfa(prev, params);
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}
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}
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/*
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/*
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@ -1371,22 +1400,6 @@ static void preview_configure(struct isp_prev_device *prev)
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active = prev->params.active;
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active = prev->params.active;
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spin_unlock_irqrestore(&prev->params.lock, flags);
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spin_unlock_irqrestore(&prev->params.lock, flags);
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preview_setup_hw(prev, update, active);
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if (prev->output & PREVIEW_OUTPUT_MEMORY)
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isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
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ISPPRV_PCR_SDRPORT);
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else
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isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
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ISPPRV_PCR_SDRPORT);
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if (prev->output & PREVIEW_OUTPUT_RESIZER)
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isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
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ISPPRV_PCR_RSZPORT);
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else
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isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
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ISPPRV_PCR_RSZPORT);
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/* PREV_PAD_SINK */
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/* PREV_PAD_SINK */
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format = &prev->formats[PREV_PAD_SINK];
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format = &prev->formats[PREV_PAD_SINK];
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preview_config_inlineoffset(prev,
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preview_config_inlineoffset(prev,
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ALIGN(format->width, 0x20) * 2);
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ALIGN(format->width, 0x20) * 2);
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preview_setup_hw(prev, update, active);
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/* PREV_PAD_SOURCE */
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/* PREV_PAD_SOURCE */
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format = &prev->formats[PREV_PAD_SOURCE];
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format = &prev->formats[PREV_PAD_SOURCE];
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if (prev->output & PREVIEW_OUTPUT_MEMORY)
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isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
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ISPPRV_PCR_SDRPORT);
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else
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isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
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ISPPRV_PCR_SDRPORT);
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if (prev->output & PREVIEW_OUTPUT_RESIZER)
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isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
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ISPPRV_PCR_RSZPORT);
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else
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isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
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ISPPRV_PCR_RSZPORT);
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if (prev->output & PREVIEW_OUTPUT_MEMORY)
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if (prev->output & PREVIEW_OUTPUT_MEMORY)
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preview_config_outlineoffset(prev,
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preview_config_outlineoffset(prev,
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ALIGN(format->width, 0x10) * 2);
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ALIGN(format->width, 0x10) * 2);
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@ -144,6 +144,7 @@ struct isp_prev_device {
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struct isp_video video_out;
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struct isp_video video_out;
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struct {
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struct {
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unsigned int cfa_order;
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struct prev_params params[2];
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struct prev_params params[2];
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u32 active;
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u32 active;
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spinlock_t lock;
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spinlock_t lock;
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@ -437,6 +437,7 @@ struct omap3isp_ccdc_update_config {
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||||||
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|
||||||
#define OMAP3ISP_PREV_NF_TBL_SIZE 64
|
#define OMAP3ISP_PREV_NF_TBL_SIZE 64
|
||||||
#define OMAP3ISP_PREV_CFA_TBL_SIZE 576
|
#define OMAP3ISP_PREV_CFA_TBL_SIZE 576
|
||||||
|
#define OMAP3ISP_PREV_CFA_BLK_SIZE (OMAP3ISP_PREV_CFA_TBL_SIZE / 4)
|
||||||
#define OMAP3ISP_PREV_GAMMA_TBL_SIZE 1024
|
#define OMAP3ISP_PREV_GAMMA_TBL_SIZE 1024
|
||||||
#define OMAP3ISP_PREV_YENH_TBL_SIZE 128
|
#define OMAP3ISP_PREV_YENH_TBL_SIZE 128
|
||||||
|
|
||||||
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@ -478,7 +479,7 @@ struct omap3isp_prev_cfa {
|
||||||
enum omap3isp_cfa_fmt format;
|
enum omap3isp_cfa_fmt format;
|
||||||
__u8 gradthrs_vert;
|
__u8 gradthrs_vert;
|
||||||
__u8 gradthrs_horz;
|
__u8 gradthrs_horz;
|
||||||
__u32 table[OMAP3ISP_PREV_CFA_TBL_SIZE];
|
__u32 table[4][OMAP3ISP_PREV_CFA_BLK_SIZE];
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
Loading…
Add table
Reference in a new issue