UPSTREAM: MIPS: math-emu: Add IEEE Std 754-2008 ABS.fmt and NEG.fmt emulation
Implement IEEE Std 754-2008 non-arithmetic ABS.fmt and NEG.fmt emulation wired to the state of the FCSR.ABS2008 bit. In the non-arithmetic mode the sign bit is altered according to the operation requested regardless of the datum encoded in the input operand, no other bits are changed, the resulting bit pattern is written to the output operand and no exception is ever signalled. Signed-off-by: Maciej W. Rozycki <macro@imgtec.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Matthew Fortune <Matthew.Fortune@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11476/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> (cherry picked from commit 198f70589e3c0f0f50da646152443787e959228f) Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
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2 changed files with 50 additions and 26 deletions
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@ -23,27 +23,39 @@
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union ieee754dp ieee754dp_neg(union ieee754dp x)
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{
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unsigned int oldrm;
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union ieee754dp y;
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oldrm = ieee754_csr.rm;
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ieee754_csr.rm = FPU_CSR_RD;
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y = ieee754dp_sub(ieee754dp_zero(0), x);
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ieee754_csr.rm = oldrm;
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if (ieee754_csr.abs2008) {
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y = x;
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DPSIGN(y) = !DPSIGN(x);
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} else {
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unsigned int oldrm;
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oldrm = ieee754_csr.rm;
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ieee754_csr.rm = FPU_CSR_RD;
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y = ieee754dp_sub(ieee754dp_zero(0), x);
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ieee754_csr.rm = oldrm;
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}
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return y;
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}
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union ieee754dp ieee754dp_abs(union ieee754dp x)
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{
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unsigned int oldrm;
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union ieee754dp y;
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oldrm = ieee754_csr.rm;
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ieee754_csr.rm = FPU_CSR_RD;
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if (DPSIGN(x))
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y = ieee754dp_sub(ieee754dp_zero(0), x);
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else
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y = ieee754dp_add(ieee754dp_zero(0), x);
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ieee754_csr.rm = oldrm;
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if (ieee754_csr.abs2008) {
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y = x;
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DPSIGN(y) = 0;
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} else {
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unsigned int oldrm;
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oldrm = ieee754_csr.rm;
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ieee754_csr.rm = FPU_CSR_RD;
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if (DPSIGN(x))
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y = ieee754dp_sub(ieee754dp_zero(0), x);
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else
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y = ieee754dp_add(ieee754dp_zero(0), x);
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ieee754_csr.rm = oldrm;
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}
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return y;
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}
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@ -23,27 +23,39 @@
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union ieee754sp ieee754sp_neg(union ieee754sp x)
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{
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unsigned int oldrm;
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union ieee754sp y;
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oldrm = ieee754_csr.rm;
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ieee754_csr.rm = FPU_CSR_RD;
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y = ieee754sp_sub(ieee754sp_zero(0), x);
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ieee754_csr.rm = oldrm;
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if (ieee754_csr.abs2008) {
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y = x;
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SPSIGN(y) = !SPSIGN(x);
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} else {
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unsigned int oldrm;
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oldrm = ieee754_csr.rm;
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ieee754_csr.rm = FPU_CSR_RD;
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y = ieee754sp_sub(ieee754sp_zero(0), x);
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ieee754_csr.rm = oldrm;
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}
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return y;
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}
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union ieee754sp ieee754sp_abs(union ieee754sp x)
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{
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unsigned int oldrm;
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union ieee754sp y;
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oldrm = ieee754_csr.rm;
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ieee754_csr.rm = FPU_CSR_RD;
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if (SPSIGN(x))
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y = ieee754sp_sub(ieee754sp_zero(0), x);
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else
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y = ieee754sp_add(ieee754sp_zero(0), x);
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ieee754_csr.rm = oldrm;
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if (ieee754_csr.abs2008) {
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y = x;
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SPSIGN(y) = 0;
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} else {
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unsigned int oldrm;
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oldrm = ieee754_csr.rm;
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ieee754_csr.rm = FPU_CSR_RD;
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if (SPSIGN(x))
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y = ieee754sp_sub(ieee754sp_zero(0), x);
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else
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y = ieee754sp_add(ieee754sp_zero(0), x);
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ieee754_csr.rm = oldrm;
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}
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return y;
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}
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