Merge "ARM: dts: msm: Add tz-log device node for msmfalcon"
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commit
72b5c8a1f4
1 changed files with 71 additions and 4 deletions
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@ -1455,13 +1455,80 @@
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<55 512 400000 1000000>;
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clock-names = "core_clk_src", "core_clk",
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"iface_clk", "bus_clk";
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clocks = <&clock_gcc QSEECOM_CE1_CLK>,
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<&clock_gcc QSEECOM_CE1_CLK>,
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<&clock_gcc QSEECOM_CE1_CLK>,
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<&clock_gcc QSEECOM_CE1_CLK>;
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clocks = <&clock_rpmcc QSEECOM_CE1_CLK>,
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<&clock_rpmcc QSEECOM_CE1_CLK>,
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<&clock_rpmcc QSEECOM_CE1_CLK>,
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<&clock_rpmcc QSEECOM_CE1_CLK>;
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qcom,ce-opp-freq = <171430000>;
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qcom,qsee-reentrancy-support = <2>;
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};
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qcom_cedev: qcedev@1de0000{
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compatible = "qcom,qcedev";
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reg = <0x1de0000 0x20000>,
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<0x1dc4000 0x24000>;
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reg-names = "crypto-base","crypto-bam-base";
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interrupts = <0 207 0>;
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qcom,bam-pipe-pair = <1>;
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qcom,ce-hw-instance = <0>;
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qcom,ce-device = <0>;
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qcom,ce-hw-shared;
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qcom,bam-ee = <0>;
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qcom,msm-bus,name = "qcedev-noc";
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qcom,msm-bus,num-cases = <2>;
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qcom,msm-bus,num-paths = <1>;
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qcom,msm-bus,vectors-KBps =
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<55 512 0 0>,
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<55 512 393600 393600>;
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clock-names = "core_clk_src", "core_clk",
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"iface_clk", "bus_clk";
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clocks = <&clock_rpmcc QCEDEV_CE1_CLK>,
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<&clock_rpmcc QCEDEV_CE1_CLK>,
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<&clock_rpmcc QCEDEV_CE1_CLK>,
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<&clock_rpmcc QCEDEV_CE1_CLK>;
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qcom,ce-opp-freq = <171430000>;
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};
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qcom_crypto: qcrypto@1de0000 {
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compatible = "qcom,qcrypto";
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reg = <0x1de0000 0x20000>,
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<0x1dc4000 0x24000>;
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reg-names = "crypto-base","crypto-bam-base";
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interrupts = <0 207 0>;
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qcom,bam-pipe-pair = <2>;
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qcom,ce-hw-instance = <0>;
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qcom,ce-device = <0>;
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qcom,bam-ee = <0>;
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qcom,ce-hw-shared;
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qcom,clk-mgmt-sus-res;
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qcom,msm-bus,name = "qcrypto-noc";
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qcom,msm-bus,num-cases = <2>;
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qcom,msm-bus,num-paths = <1>;
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qcom,msm-bus,vectors-KBps =
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<55 512 0 0>,
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<55 512 393600 393600>;
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clock-names = "core_clk_src", "core_clk",
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"iface_clk", "bus_clk";
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clocks = <&clock_rpmcc QCRYPTO_CE1_CLK>,
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<&clock_rpmcc QCRYPTO_CE1_CLK>,
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<&clock_rpmcc QCRYPTO_CE1_CLK>,
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<&clock_rpmcc QCRYPTO_CE1_CLK>;
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qcom,ce-opp-freq = <171430000>;
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qcom,use-sw-aes-cbc-ecb-ctr-algo;
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qcom,use-sw-aes-xts-algo;
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qcom,use-sw-aes-ccm-algo;
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qcom,use-sw-ahash-algo;
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qcom,use-sw-aead-algo;
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qcom,use-sw-hmac-algo;
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};
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qcom_tzlog: tz-log@146bf720 {
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compatible = "qcom,tz-log";
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reg = <0x146bf720 0x3000>;
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qcom,hyplog-enabled;
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hyplog-address-offset = <0x410>;
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hyplog-size-offset = <0x414>;
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};
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};
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#include "msmfalcon-ion.dtsi"
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