mdss: display-port: add support for audio programming
Add support to configure audio baud rate for display port. CRs-Fixed: 1009284 Change-Id: Iab3c9d578cf398f57d3151a5c895c4a09ddb3dd2 Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org> Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
This commit is contained in:
Chandan Uddaraju
Tatenda Chipeperekwa
parent
fdae3117e0
commit
79f9bdf53b
4 changed files with 374 additions and 29 deletions
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@ -29,6 +29,7 @@
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#include <linux/clk.h>
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#include <linux/spinlock_types.h>
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#include <linux/kthread.h>
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#include <linux/msm_ext_display.h>
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#include "mdss.h"
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#include "mdss_dp.h"
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@ -827,6 +828,112 @@ int mdss_dp_wait4train(struct mdss_dp_drv_pdata *dp_drv)
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return ret;
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}
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static int dp_get_cable_status(struct platform_device *pdev, u32 vote)
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{
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struct mdss_dp_drv_pdata *dp_ctrl = platform_get_drvdata(pdev);
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u32 hpd;
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if (!dp_ctrl) {
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DEV_ERR("%s: invalid input\n", __func__);
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return -ENODEV;
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}
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mutex_lock(&dp_ctrl->pd_msg_mutex);
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hpd = dp_ctrl->cable_connected;
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mutex_unlock(&dp_ctrl->pd_msg_mutex);
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return hpd;
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}
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static int dp_audio_info_setup(struct platform_device *pdev,
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struct msm_ext_disp_audio_setup_params *params)
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{
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int rc = 0;
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struct mdss_dp_drv_pdata *dp_ctrl = platform_get_drvdata(pdev);
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if (!dp_ctrl || !params) {
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DEV_ERR("%s: invalid input\n", __func__);
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return -ENODEV;
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}
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mdss_dp_audio_enable(&dp_ctrl->ctrl_io, true);
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mdss_dp_config_audio_acr_ctrl(&dp_ctrl->ctrl_io,
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dp_ctrl->link_rate);
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mdss_dp_audio_setup_sdps(&dp_ctrl->ctrl_io);
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return rc;
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} /* dp_audio_info_setup */
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static int dp_get_audio_edid_blk(struct platform_device *pdev,
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struct msm_ext_disp_audio_edid_blk *blk)
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{
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struct mdss_dp_drv_pdata *dp = platform_get_drvdata(pdev);
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int rc = 0;
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if (!dp) {
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DEV_ERR("%s: invalid input\n", __func__);
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return -ENODEV;
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}
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rc = hdmi_edid_get_audio_blk
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(dp->panel_data.panel_info.edid_data, blk);
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if (rc)
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DEV_ERR("%s:edid_get_audio_blk failed\n", __func__);
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return rc;
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} /* dp_get_audio_edid_blk */
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static int mdss_dp_init_ext_disp(struct mdss_dp_drv_pdata *dp)
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{
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int ret = 0;
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struct device_node *pd_np;
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const char *phandle = "qcom,msm_ext_disp";
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if (!dp) {
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pr_err("%s: invalid input\n", __func__);
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ret = -ENODEV;
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goto end;
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}
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dp->ext_audio_data.type = EXT_DISPLAY_TYPE_DP;
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dp->ext_audio_data.kobj = dp->kobj;
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dp->ext_audio_data.pdev = dp->pdev;
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dp->ext_audio_data.codec_ops.audio_info_setup =
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dp_audio_info_setup;
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dp->ext_audio_data.codec_ops.get_audio_edid_blk =
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dp_get_audio_edid_blk;
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dp->ext_audio_data.codec_ops.cable_status =
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dp_get_cable_status;
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if (!dp->pdev->dev.of_node) {
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pr_err("%s cannot find dp dev.of_node\n", __func__);
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ret = -ENODEV;
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goto end;
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}
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pd_np = of_parse_phandle(dp->pdev->dev.of_node, phandle, 0);
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if (!pd_np) {
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pr_err("%s cannot find %s dev\n", __func__, phandle);
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ret = -ENODEV;
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goto end;
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}
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dp->ext_pdev = of_find_device_by_node(pd_np);
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if (!dp->ext_pdev) {
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pr_err("%s cannot find %s pdev\n", __func__, phandle);
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ret = -ENODEV;
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goto end;
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}
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ret = msm_ext_disp_register_intf(dp->ext_pdev,
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&dp->ext_audio_data);
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if (ret)
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pr_err("%s: failed to register disp\n", __func__);
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end:
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return ret;
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}
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#define DEFAULT_VIDEO_RESOLUTION HDMI_VFRMT_640x480p60_4_3
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static int dp_init_panel_info(struct mdss_dp_drv_pdata *dp_drv, u32 vic)
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@ -1036,42 +1143,26 @@ int mdss_dp_off(struct mdss_panel_data *pdata)
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return 0;
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}
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static inline void mdss_dp_set_audio_switch_node(
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struct mdss_dp_drv_pdata *dp, int val)
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{
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if (dp && dp->ext_audio_data.intf_ops.notify)
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dp->ext_audio_data.intf_ops.notify(dp->ext_pdev,
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val);
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}
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static void mdss_dp_send_cable_notification(
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struct mdss_dp_drv_pdata *dp, int val)
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{
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int state = 0;
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if (!dp) {
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DEV_ERR("%s: invalid input\n", __func__);
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return;
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}
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state = dp->sdev.state;
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switch_set_state(&dp->sdev, val);
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DEV_INFO("%s: cable state %s %d\n", __func__,
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dp->sdev.state == state ?
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"is same" : "switched to",
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dp->sdev.state);
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}
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static int mdss_dp_register_switch_event(struct mdss_dp_drv_pdata *dp)
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{
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int rc = -EINVAL;
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if (!dp) {
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DEV_ERR("%s: invalid input\n", __func__);
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goto end;
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}
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dp->sdev.name = "hdmi";
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rc = switch_dev_register(&dp->sdev);
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if (rc) {
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DEV_ERR("%s: display switch registration failed\n", __func__);
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goto end;
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}
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end:
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return rc;
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if (dp && dp->ext_audio_data.intf_ops.hpd)
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dp->ext_audio_data.intf_ops.hpd(dp->ext_pdev,
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dp->ext_audio_data.type, val);
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}
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static int mdss_dp_edid_init(struct mdss_panel_data *pdata)
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@ -1170,7 +1261,9 @@ static int mdss_dp_host_init(struct mdss_panel_data *pdata)
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}
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mdss_dp_send_cable_notification(dp_drv, true);
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mdss_dp_set_audio_switch_node(dp_drv, true);
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dp_drv->dp_initialized = true;
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return ret;
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edid_error:
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@ -1421,7 +1514,12 @@ static int mdss_dp_event_handler(struct mdss_panel_data *pdata,
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mdss_dp_sysfs_create(dp, fbi);
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mdss_dp_edid_init(pdata);
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mdss_dp_hdcp_init(pdata);
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mdss_dp_register_switch_event(dp);
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rc = mdss_dp_init_ext_disp(dp);
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if (rc)
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pr_err("failed to initialize ext disp data, ret=%d\n",
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rc);
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break;
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case MDSS_EVENT_CHECK_PARAMS:
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rc = mdss_dp_check_params(dp, arg);
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@ -1738,6 +1836,7 @@ static void usbpd_disconnect_callback(struct usbpd_svid_handler *hdlr)
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dp_drv->cable_connected = false;
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mutex_unlock(&dp_drv->pd_msg_mutex);
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mdss_dp_send_cable_notification(dp_drv, false);
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mdss_dp_set_audio_switch_node(dp_drv, false);
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}
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static void usbpd_response_callback(struct usbpd_svid_handler *hdlr, u8 cmd,
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@ -1998,8 +2097,12 @@ static int mdss_dp_probe(struct platform_device *pdev)
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probe_err:
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iounmap(dp_drv->ctrl_io.base);
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iounmap(dp_drv->phy_io.base);
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if (dp_drv)
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if (dp_drv) {
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if (dp_drv->pd)
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usbpd_unregister_svid(dp_drv->pd,
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&dp_drv->svid_handler);
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devm_kfree(&pdev->dev, dp_drv);
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}
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return ret;
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}
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@ -333,11 +333,13 @@ struct mdss_dp_drv_pdata {
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int (*on) (struct mdss_panel_data *pdata);
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int (*off) (struct mdss_panel_data *pdata);
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struct platform_device *pdev;
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struct platform_device *ext_pdev;
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struct usbpd *pd;
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struct usbpd_svid_handler svid_handler;
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struct dp_alt_mode alt_mode;
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bool dp_initialized;
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struct msm_ext_disp_init_data ext_audio_data;
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struct mutex emutex;
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int clk_cnt;
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@ -18,6 +18,13 @@
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#include "mdss_dp_util.h"
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#define HEADER_BYTE_2_BIT 0
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#define PARITY_BYTE_2_BIT 8
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#define HEADER_BYTE_1_BIT 16
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#define PARITY_BYTE_1_BIT 24
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#define HEADER_BYTE_3_BIT 16
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#define PARITY_BYTE_3_BIT 24
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struct mdss_hw mdss_dp_hw = {
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.hw_ndx = MDSS_HW_EDP,
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.ptr = NULL,
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@ -370,3 +377,163 @@ u32 mdss_dp_usbpd_gen_config_pkt(struct mdss_dp_drv_pdata *dp)
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pr_debug("DP config = 0x%x\n", config);
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return config;
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}
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void mdss_dp_config_audio_acr_ctrl(struct dss_io_data *ctrl_io,
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char link_rate)
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{
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u32 acr_ctrl = 0;
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switch (link_rate) {
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case DP_LINK_RATE_162:
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acr_ctrl = 0;
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break;
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case DP_LINK_RATE_270:
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acr_ctrl = 1;
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break;
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case DP_LINK_RATE_540:
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acr_ctrl = 2;
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break;
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default:
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pr_debug("Unknown link rate\n");
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acr_ctrl = 1;
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break;
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}
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writel_relaxed(acr_ctrl, ctrl_io->base + MMSS_DP_AUDIO_ACR_CTRL);
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}
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static void mdss_dp_audio_config_parity_settings(struct dss_io_data *ctrl_io)
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{
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u32 value = 0;
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value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_STREAM_0);
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/* Config header and parity byte 1 */
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value |= ((0x2 << HEADER_BYTE_1_BIT)
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| (0x13 << PARITY_BYTE_1_BIT));
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writel_relaxed(value, ctrl_io->base + MMSS_DP_AUDIO_STREAM_0);
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value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_STREAM_1);
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/* Config header and parity byte 2 */
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value |= ((0x28 << HEADER_BYTE_2_BIT)
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| (0xf5 << PARITY_BYTE_2_BIT));
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writel_relaxed(value, ctrl_io->base + MMSS_DP_AUDIO_STREAM_1);
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value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_STREAM_1);
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/* Config header and parity byte 3 */
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value |= ((0x97 << HEADER_BYTE_3_BIT)
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| (0xc2 << PARITY_BYTE_3_BIT));
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writel_relaxed(value, ctrl_io->base + MMSS_DP_AUDIO_STREAM_1);
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value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_TIMESTAMP_0);
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/* Config header and parity byte 1 */
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value |= ((0x1 << HEADER_BYTE_1_BIT)
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| (0x98 << PARITY_BYTE_1_BIT));
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writel_relaxed(value, ctrl_io->base + MMSS_DP_AUDIO_TIMESTAMP_0);
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value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_TIMESTAMP_1);
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/* Config header and parity byte 2 */
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value |= ((0x17 << HEADER_BYTE_2_BIT)
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| (0x60 << PARITY_BYTE_2_BIT));
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writel_relaxed(value, ctrl_io->base + MMSS_DP_AUDIO_TIMESTAMP_1);
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value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_INFOFRAME_0);
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/* Config header and parity byte 1 */
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value |= ((0x84 << HEADER_BYTE_1_BIT)
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| (0x84 << PARITY_BYTE_1_BIT));
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writel_relaxed(value, ctrl_io->base + MMSS_DP_AUDIO_INFOFRAME_0);
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value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_INFOFRAME_1);
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/* Config header and parity byte 2 */
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value |= ((0xb1 << HEADER_BYTE_2_BIT)
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| (0x4e << PARITY_BYTE_2_BIT));
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writel_relaxed(value, ctrl_io->base + MMSS_DP_AUDIO_INFOFRAME_1);
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value = readl_relaxed(ctrl_io->base +
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MMSS_DP_AUDIO_COPYMANAGEMENT_0);
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/* Config header and parity byte 1 */
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value |= ((0x5 << HEADER_BYTE_1_BIT)
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| (0xbe << PARITY_BYTE_1_BIT));
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writel_relaxed(value, ctrl_io->base +
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MMSS_DP_AUDIO_COPYMANAGEMENT_0);
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value = readl_relaxed(ctrl_io->base +
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MMSS_DP_AUDIO_COPYMANAGEMENT_1);
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/* Config header and parity byte 2 */
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value |= ((0x0b << HEADER_BYTE_2_BIT)
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| (0xc7 << PARITY_BYTE_2_BIT));
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writel_relaxed(value, ctrl_io->base +
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MMSS_DP_AUDIO_COPYMANAGEMENT_1);
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value = readl_relaxed(ctrl_io->base +
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MMSS_DP_AUDIO_COPYMANAGEMENT_1);
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/* Config header and parity byte 3 */
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value |= ((0x1 << HEADER_BYTE_3_BIT)
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| (0x98 << PARITY_BYTE_3_BIT));
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writel_relaxed(value, ctrl_io->base +
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MMSS_DP_AUDIO_COPYMANAGEMENT_1);
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writel_relaxed(0x22222222, ctrl_io->base +
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MMSS_DP_AUDIO_COPYMANAGEMENT_2);
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writel_relaxed(0x22222222, ctrl_io->base +
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MMSS_DP_AUDIO_COPYMANAGEMENT_3);
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writel_relaxed(0x22222222, ctrl_io->base +
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MMSS_DP_AUDIO_COPYMANAGEMENT_4);
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value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_ISRC_0);
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/* Config header and parity byte 1 */
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value |= ((0x6 << HEADER_BYTE_1_BIT)
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| (0x35 << PARITY_BYTE_1_BIT));
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writel_relaxed(value, ctrl_io->base + MMSS_DP_AUDIO_ISRC_0);
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value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_ISRC_1);
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/* Config header and parity byte 2 */
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value |= ((0x0b << HEADER_BYTE_2_BIT)
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| (0xc7 << PARITY_BYTE_2_BIT));
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writel_relaxed(value, ctrl_io->base + MMSS_DP_AUDIO_ISRC_1);
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writel_relaxed(0x33333333, ctrl_io->base + MMSS_DP_AUDIO_ISRC_2);
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writel_relaxed(0x33333333, ctrl_io->base + MMSS_DP_AUDIO_ISRC_3);
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writel_relaxed(0x33333333, ctrl_io->base + MMSS_DP_AUDIO_ISRC_4);
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}
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void mdss_dp_audio_setup_sdps(struct dss_io_data *ctrl_io)
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{
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u32 sdp_cfg = 0;
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u32 sdp_cfg2 = 0;
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/* AUDIO_TIMESTAMP_SDP_EN */
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sdp_cfg |= BIT(1);
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/* AUDIO_STREAM_SDP_EN */
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sdp_cfg |= BIT(2);
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/* AUDIO_COPY_MANAGEMENT_SDP_EN */
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sdp_cfg |= BIT(5);
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/* AUDIO_ISRC_SDP_EN */
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sdp_cfg |= BIT(6);
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/* AUDIO_INFOFRAME_SDP_EN */
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sdp_cfg |= BIT(20);
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writel_relaxed(sdp_cfg, ctrl_io->base + MMSS_DP_SDP_CFG);
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sdp_cfg2 = readl_relaxed(ctrl_io->base + MMSS_DP_SDP_CFG2);
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/* IFRM_REGSRC -> Do not use reg values */
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sdp_cfg2 &= ~BIT(0);
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/* AUDIO_STREAM_HB3_REGSRC-> Do not use reg values */
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sdp_cfg2 &= ~BIT(1);
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writel_relaxed(sdp_cfg2, ctrl_io->base + MMSS_DP_SDP_CFG2);
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mdss_dp_audio_config_parity_settings(ctrl_io);
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}
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void mdss_dp_audio_enable(struct dss_io_data *ctrl_io, bool enable)
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{
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u32 audio_ctrl = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_CFG);
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if (enable)
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audio_ctrl |= BIT(0);
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else
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audio_ctrl &= ~BIT(0);
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writel_relaxed(audio_ctrl, ctrl_io->base + MMSS_DP_AUDIO_CFG);
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}
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@ -56,6 +56,75 @@
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#define DP_MAINLINK_READY (0x00000440)
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#define DP_TU (0x0000044C)
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||||
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||||
#define MMSS_DP_AUDIO_TIMING_GEN (0x00000480)
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#define MMSS_DP_AUDIO_TIMING_RBR_32 (0x00000484)
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||||
#define MMSS_DP_AUDIO_TIMING_HBR_32 (0x00000488)
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#define MMSS_DP_AUDIO_TIMING_RBR_44 (0x0000048C)
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#define MMSS_DP_AUDIO_TIMING_HBR_44 (0x00000490)
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#define MMSS_DP_AUDIO_TIMING_RBR_48 (0x00000494)
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#define MMSS_DP_AUDIO_TIMING_HBR_48 (0x00000498)
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||||
#define MMSS_DP_AUDIO_CFG (0x00000600)
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#define MMSS_DP_AUDIO_STATUS (0x00000604)
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#define MMSS_DP_AUDIO_PKT_CTRL (0x00000608)
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#define MMSS_DP_AUDIO_PKT_CTRL2 (0x0000060C)
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#define MMSS_DP_AUDIO_ACR_CTRL (0x00000610)
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#define MMSS_DP_AUDIO_CTRL_RESET (0x00000614)
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||||
|
||||
#define MMSS_DP_SDP_CFG (0x00000628)
|
||||
#define MMSS_DP_SDP_CFG2 (0x0000062C)
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||||
#define MMSS_DP_AUDIO_TIMESTAMP_0 (0x00000630)
|
||||
#define MMSS_DP_AUDIO_TIMESTAMP_1 (0x00000634)
|
||||
|
||||
#define MMSS_DP_AUDIO_STREAM_0 (0x00000640)
|
||||
#define MMSS_DP_AUDIO_STREAM_1 (0x00000644)
|
||||
|
||||
#define MMSS_DP_EXTENSION_0 (0x00000650)
|
||||
#define MMSS_DP_EXTENSION_1 (0x00000654)
|
||||
#define MMSS_DP_EXTENSION_2 (0x00000658)
|
||||
#define MMSS_DP_EXTENSION_3 (0x0000065C)
|
||||
#define MMSS_DP_EXTENSION_4 (0x00000660)
|
||||
#define MMSS_DP_EXTENSION_5 (0x00000664)
|
||||
#define MMSS_DP_EXTENSION_6 (0x00000668)
|
||||
#define MMSS_DP_EXTENSION_7 (0x0000066C)
|
||||
#define MMSS_DP_EXTENSION_8 (0x00000670)
|
||||
#define MMSS_DP_EXTENSION_9 (0x00000674)
|
||||
#define MMSS_DP_AUDIO_COPYMANAGEMENT_0 (0x00000678)
|
||||
#define MMSS_DP_AUDIO_COPYMANAGEMENT_1 (0x0000067C)
|
||||
#define MMSS_DP_AUDIO_COPYMANAGEMENT_2 (0x00000680)
|
||||
#define MMSS_DP_AUDIO_COPYMANAGEMENT_3 (0x00000684)
|
||||
#define MMSS_DP_AUDIO_COPYMANAGEMENT_4 (0x00000688)
|
||||
#define MMSS_DP_AUDIO_COPYMANAGEMENT_5 (0x0000068C)
|
||||
#define MMSS_DP_AUDIO_ISRC_0 (0x00000690)
|
||||
#define MMSS_DP_AUDIO_ISRC_1 (0x00000694)
|
||||
#define MMSS_DP_AUDIO_ISRC_2 (0x00000698)
|
||||
#define MMSS_DP_AUDIO_ISRC_3 (0x0000069C)
|
||||
#define MMSS_DP_AUDIO_ISRC_4 (0x000006A0)
|
||||
#define MMSS_DP_AUDIO_ISRC_5 (0x000006A4)
|
||||
#define MMSS_DP_AUDIO_INFOFRAME_0 (0x000006A8)
|
||||
#define MMSS_DP_AUDIO_INFOFRAME_1 (0x000006B0)
|
||||
|
||||
#define MMSS_DP_GENERIC0_0 (0x00000700)
|
||||
#define MMSS_DP_GENERIC0_1 (0x00000704)
|
||||
#define MMSS_DP_GENERIC0_2 (0x00000708)
|
||||
#define MMSS_DP_GENERIC0_3 (0x0000070C)
|
||||
#define MMSS_DP_GENERIC0_4 (0x00000710)
|
||||
#define MMSS_DP_GENERIC0_5 (0x00000714)
|
||||
#define MMSS_DP_GENERIC0_6 (0x00000718)
|
||||
#define MMSS_DP_GENERIC0_7 (0x0000071C)
|
||||
#define MMSS_DP_GENERIC0_8 (0x00000720)
|
||||
#define MMSS_DP_GENERIC0_9 (0x00000724)
|
||||
#define MMSS_DP_GENERIC1_0 (0x00000728)
|
||||
#define MMSS_DP_GENERIC1_1 (0x0000072C)
|
||||
#define MMSS_DP_GENERIC1_2 (0x00000730)
|
||||
#define MMSS_DP_GENERIC1_3 (0x00000734)
|
||||
#define MMSS_DP_GENERIC1_4 (0x00000738)
|
||||
#define MMSS_DP_GENERIC1_5 (0x0000073C)
|
||||
#define MMSS_DP_GENERIC1_6 (0x00000740)
|
||||
#define MMSS_DP_GENERIC1_7 (0x00000744)
|
||||
#define MMSS_DP_GENERIC1_8 (0x00000748)
|
||||
#define MMSS_DP_GENERIC1_9 (0x0000074C)
|
||||
|
||||
/*DP PHY Register offsets */
|
||||
#define DP_PHY_REVISION_ID0 (0x00000000)
|
||||
#define DP_PHY_REVISION_ID1 (0x00000004)
|
||||
|
|
@ -162,5 +231,9 @@ void mdss_dp_usbpd_ext_dp_status(struct usbpd_dp_status *dp_status);
|
|||
u32 mdss_dp_usbpd_gen_config_pkt(struct mdss_dp_drv_pdata *dp);
|
||||
void mdss_dp_ctrl_lane_mapping(struct dss_io_data *ctrl_io,
|
||||
struct lane_mapping l_map);
|
||||
void mdss_dp_config_audio_acr_ctrl(struct dss_io_data *ctrl_io,
|
||||
char link_rate);
|
||||
void mdss_dp_audio_setup_sdps(struct dss_io_data *ctrl_io);
|
||||
void mdss_dp_audio_enable(struct dss_io_data *ctrl_io, bool enable);
|
||||
|
||||
#endif /* __DP_UTIL_H__ */
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue