msm: mdss: Set LM flush bit for DE/Scalar reg update
LM flush is required in order to take DE/Scalar register changes to take effect. Hence set the LM flush bit on the update. Change-Id: I9b497b8109133d221d7009e9709149146f213c5e Signed-off-by: Sravan Kumar D.V.N <sravank1@codeaurora.org>
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048c70075f
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7d5ebd0ac1
3 changed files with 15 additions and 4 deletions
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@ -2023,6 +2023,8 @@ void mdss_mdp_set_supported_formats(struct mdss_data_type *mdata);
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int mdss_mdp_dest_scaler_setup_locked(struct mdss_mdp_mixer *mixer);
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void *mdss_mdp_intf_get_ctx_base(struct mdss_mdp_ctl *ctl, int intf_num);
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int mdss_mdp_mixer_get_hw_num(struct mdss_mdp_mixer *mixer);
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#ifdef CONFIG_FB_MSM_MDP_NONE
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struct mdss_data_type *mdss_mdp_get_mdata(void)
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{
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@ -4802,7 +4802,7 @@ static void __mdss_mdp_mixer_get_offsets(u32 mixer_num,
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offsets[2] = MDSS_MDP_REG_CTL_LAYER_EXTN2(mixer_num);
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}
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static inline int __mdss_mdp_mixer_get_hw_num(struct mdss_mdp_mixer *mixer)
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int mdss_mdp_mixer_get_hw_num(struct mdss_mdp_mixer *mixer)
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{
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struct mdss_data_type *mdata = mdss_mdp_get_mdata();
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@ -4858,7 +4858,7 @@ static void __mdss_mdp_mixer_write_cfg(struct mdss_mdp_mixer *mixer,
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if (!mixer)
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return;
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mixer_num = __mdss_mdp_mixer_get_hw_num(mixer);
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mixer_num = mdss_mdp_mixer_get_hw_num(mixer);
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if (cfg) {
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for (i = 0; i < NUM_MIXERCFG_REGS; i++)
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@ -4905,7 +4905,7 @@ bool mdss_mdp_mixer_reg_has_pipe(struct mdss_mdp_mixer *mixer,
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memset(&mixercfg, 0, sizeof(mixercfg));
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mixer_num = __mdss_mdp_mixer_get_hw_num(mixer);
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mixer_num = mdss_mdp_mixer_get_hw_num(mixer);
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__mdss_mdp_mixer_get_offsets(mixer_num, offs, NUM_MIXERCFG_REGS);
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for (i = 0; i < NUM_MIXERCFG_REGS; i++)
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@ -5130,7 +5130,7 @@ static void mdss_mdp_mixer_setup(struct mdss_mdp_ctl *master_ctl,
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mixercfg.cursor_enabled = true;
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update_mixer:
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mixer_num = __mdss_mdp_mixer_get_hw_num(mixer_hw);
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mixer_num = mdss_mdp_mixer_get_hw_num(mixer_hw);
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ctl_hw->flush_bits |= BIT(mixer_num < 5 ? 6 + mixer_num : 20);
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/* Read GC enable/disable status on LM */
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@ -2599,6 +2599,7 @@ int mdss_mdp_dest_scaler_setup_locked(struct mdss_mdp_mixer *mixer)
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u32 op_mode;
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u32 mask;
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char *ds_offset;
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int mixer_num = 0;
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if (!mixer || !mixer->ctl || !mixer->ctl->mdata)
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return -EINVAL;
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@ -2658,6 +2659,14 @@ int mdss_mdp_dest_scaler_setup_locked(struct mdss_mdp_mixer *mixer)
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pr_err("Failed setup destination scaler\n");
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return ret;
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}
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/* Set LM Flush in order to update DS registers */
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if (ds->flags & DS_SCALE_UPDATE) {
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mutex_lock(&ctl->flush_lock);
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mixer_num = mdss_mdp_mixer_get_hw_num(mixer);
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ctl->flush_bits |=
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BIT(mixer_num < 5 ? 6 + mixer_num : 20);
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mutex_unlock(&ctl->flush_lock);
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}
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/*
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* Clearing the flag because we don't need to program the block
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* for each commit if there is no change.
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