msm: mdss: Set LM flush bit for DE/Scalar reg update

LM flush is required in order to take DE/Scalar register changes
to take effect. Hence set the LM flush bit on the update.

Change-Id: I9b497b8109133d221d7009e9709149146f213c5e
Signed-off-by: Sravan Kumar D.V.N <sravank1@codeaurora.org>
This commit is contained in:
Sravan Kumar D.V.N 2017-04-21 22:24:57 +05:30 committed by Gerrit - the friendly Code Review server
parent 048c70075f
commit 7d5ebd0ac1
3 changed files with 15 additions and 4 deletions

View file

@ -2023,6 +2023,8 @@ void mdss_mdp_set_supported_formats(struct mdss_data_type *mdata);
int mdss_mdp_dest_scaler_setup_locked(struct mdss_mdp_mixer *mixer);
void *mdss_mdp_intf_get_ctx_base(struct mdss_mdp_ctl *ctl, int intf_num);
int mdss_mdp_mixer_get_hw_num(struct mdss_mdp_mixer *mixer);
#ifdef CONFIG_FB_MSM_MDP_NONE
struct mdss_data_type *mdss_mdp_get_mdata(void)
{

View file

@ -4802,7 +4802,7 @@ static void __mdss_mdp_mixer_get_offsets(u32 mixer_num,
offsets[2] = MDSS_MDP_REG_CTL_LAYER_EXTN2(mixer_num);
}
static inline int __mdss_mdp_mixer_get_hw_num(struct mdss_mdp_mixer *mixer)
int mdss_mdp_mixer_get_hw_num(struct mdss_mdp_mixer *mixer)
{
struct mdss_data_type *mdata = mdss_mdp_get_mdata();
@ -4858,7 +4858,7 @@ static void __mdss_mdp_mixer_write_cfg(struct mdss_mdp_mixer *mixer,
if (!mixer)
return;
mixer_num = __mdss_mdp_mixer_get_hw_num(mixer);
mixer_num = mdss_mdp_mixer_get_hw_num(mixer);
if (cfg) {
for (i = 0; i < NUM_MIXERCFG_REGS; i++)
@ -4905,7 +4905,7 @@ bool mdss_mdp_mixer_reg_has_pipe(struct mdss_mdp_mixer *mixer,
memset(&mixercfg, 0, sizeof(mixercfg));
mixer_num = __mdss_mdp_mixer_get_hw_num(mixer);
mixer_num = mdss_mdp_mixer_get_hw_num(mixer);
__mdss_mdp_mixer_get_offsets(mixer_num, offs, NUM_MIXERCFG_REGS);
for (i = 0; i < NUM_MIXERCFG_REGS; i++)
@ -5130,7 +5130,7 @@ static void mdss_mdp_mixer_setup(struct mdss_mdp_ctl *master_ctl,
mixercfg.cursor_enabled = true;
update_mixer:
mixer_num = __mdss_mdp_mixer_get_hw_num(mixer_hw);
mixer_num = mdss_mdp_mixer_get_hw_num(mixer_hw);
ctl_hw->flush_bits |= BIT(mixer_num < 5 ? 6 + mixer_num : 20);
/* Read GC enable/disable status on LM */

View file

@ -2599,6 +2599,7 @@ int mdss_mdp_dest_scaler_setup_locked(struct mdss_mdp_mixer *mixer)
u32 op_mode;
u32 mask;
char *ds_offset;
int mixer_num = 0;
if (!mixer || !mixer->ctl || !mixer->ctl->mdata)
return -EINVAL;
@ -2658,6 +2659,14 @@ int mdss_mdp_dest_scaler_setup_locked(struct mdss_mdp_mixer *mixer)
pr_err("Failed setup destination scaler\n");
return ret;
}
/* Set LM Flush in order to update DS registers */
if (ds->flags & DS_SCALE_UPDATE) {
mutex_lock(&ctl->flush_lock);
mixer_num = mdss_mdp_mixer_get_hw_num(mixer);
ctl->flush_bits |=
BIT(mixer_num < 5 ? 6 + mixer_num : 20);
mutex_unlock(&ctl->flush_lock);
}
/*
* Clearing the flag because we don't need to program the block
* for each commit if there is no change.