staging: comedi: ni_stc.h: tidy up Write_Strobe_*_Register
The Write_Strobe_*_Register defines are noy used. Instead the more descriptive Configuration_Memory_Clear, ADC_FIFO_Clear and DAC_FIFO_Clear defines are used. Remove the unused defines and rename the CamelCase. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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2 changed files with 14 additions and 18 deletions
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@ -375,9 +375,9 @@ static const struct mio_regmap m_series_stc_write_regmap[] = {
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[NISTC_RTSI_TRIGA_OUT_REG] = { 0x19e, 2 },
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[NISTC_RTSI_TRIGB_OUT_REG] = { 0x1a0, 2 },
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[NISTC_RTSI_BOARD_REG] = { 0, 0 }, /* Unknown */
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[Configuration_Memory_Clear] = { 0x1a4, 2 },
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[ADC_FIFO_Clear] = { 0x1a6, 2 },
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[DAC_FIFO_Clear] = { 0x1a8, 2 },
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[NISTC_CFG_MEM_CLR_REG] = { 0x1a4, 2 },
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[NISTC_ADC_FIFO_CLR_REG] = { 0x1a6, 2 },
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[NISTC_DAC_FIFO_CLR_REG] = { 0x1a8, 2 },
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[AO_Output_Control_Register] = { 0x1ac, 2 },
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[AI_Mode_3_Register] = { 0x1ae, 2 },
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};
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@ -849,7 +849,7 @@ static void ni_clear_ai_fifo(struct comedi_device *dev)
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if (i == timeout)
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dev_err(dev->class_dev, "FIFO flush timeout\n");
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} else {
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ni_stc_writew(dev, 1, ADC_FIFO_Clear);
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ni_stc_writew(dev, 1, NISTC_ADC_FIFO_CLR_REG);
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if (devpriv->is_625x) {
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ni_writeb(dev, 0, NI_M_STATIC_AI_CTRL_REG(0));
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ni_writeb(dev, 1, NI_M_STATIC_AI_CTRL_REG(0));
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@ -1084,7 +1084,7 @@ static int ni_ao_prep_fifo(struct comedi_device *dev,
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unsigned int nsamples;
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/* reset fifo */
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ni_stc_writew(dev, 1, DAC_FIFO_Clear);
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ni_stc_writew(dev, 1, NISTC_DAC_FIFO_CLR_REG);
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if (devpriv->is_6xxx)
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ni_ao_win_outl(dev, 0x6, AO_FIFO_Offset_Load_611x);
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@ -1696,7 +1696,7 @@ static void ni_prime_channelgain_list(struct comedi_device *dev)
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for (i = 0; i < NI_TIMEOUT; ++i) {
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if (!(ni_stc_readw(dev, AI_Status_1_Register) &
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AI_FIFO_Empty_St)) {
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ni_stc_writew(dev, 1, ADC_FIFO_Clear);
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ni_stc_writew(dev, 1, NISTC_ADC_FIFO_CLR_REG);
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return;
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}
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udelay(1);
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@ -1715,7 +1715,7 @@ static void ni_m_series_load_channelgain_list(struct comedi_device *dev,
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unsigned int dither;
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unsigned range_code;
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ni_stc_writew(dev, 1, Configuration_Memory_Clear);
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ni_stc_writew(dev, 1, NISTC_CFG_MEM_CLR_REG);
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if ((list[0] & CR_ALT_SOURCE)) {
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unsigned bypass_bits;
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@ -1830,7 +1830,7 @@ static void ni_load_channelgain_list(struct comedi_device *dev,
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devpriv->changain_state = 0;
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}
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ni_stc_writew(dev, 1, Configuration_Memory_Clear);
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ni_stc_writew(dev, 1, NISTC_CFG_MEM_CLR_REG);
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/* Set up Calibration mode if required */
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if (devpriv->is_6143) {
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@ -2826,7 +2826,7 @@ static int ni_ao_inttrig(struct comedi_device *dev,
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NISTC_INTB_ENA_AO_FIFO | NISTC_INTB_ENA_AO_ERR, 0);
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interrupt_b_bits = NISTC_INTB_ENA_AO_ERR;
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#ifdef PCIDMA
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ni_stc_writew(dev, 1, DAC_FIFO_Clear);
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ni_stc_writew(dev, 1, NISTC_DAC_FIFO_CLR_REG);
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if (devpriv->is_6xxx)
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ni_ao_win_outl(dev, 0x6, AO_FIFO_Offset_Load_611x);
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ret = ni_ao_setup_MITE_dma(dev);
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@ -457,6 +457,11 @@
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#define NISTC_RTSI_BOARD_REG 81
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#define NISTC_CFG_MEM_CLR_REG 82
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#define NISTC_ADC_FIFO_CLR_REG 83
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#define NISTC_DAC_FIFO_CLR_REG 84
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#define NISTC_WR_STROBE3_REG 85
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#define AI_Status_1_Register 2
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#define Interrupt_A_St 0x8000
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#define AI_FIFO_Full_St 0x4000
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@ -515,11 +520,6 @@ enum Joint_Status_2_Bits {
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#define AO_BC_Save_Registers 18
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#define AO_UC_Save_Registers 20
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#define Write_Strobe_0_Register 82
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#define Write_Strobe_1_Register 83
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#define Write_Strobe_2_Register 84
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#define Write_Strobe_3_Register 85
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#define AO_Output_Control_Register 86
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#define AO_External_Gate_Enable _bit15
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#define AO_External_Gate_Select(x) (((x)&0x1f)<<10)
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@ -637,10 +637,6 @@ static unsigned AO_UPDATE_Output_Select(enum ao_update_output_selection
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#define Window_Address 0x00
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#define Window_Data 0x02
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#define Configuration_Memory_Clear 82
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#define ADC_FIFO_Clear 83
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#define DAC_FIFO_Clear 84
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/* i/o port offsets */
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/* 8 bit registers */
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