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clk: msm: clock-gpu-cobalt: Update the GPU PLL FMAXes

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The clock driver only needs to put a MIN_SVS vote on the MX rail
on behalf of the graphics PLLs. Update the fmax tables for the
PLLs appropriately.

CRs-Fixed: 1040775
Change-Id: Icb84b40128c54edefdec13f61fe9252811c1a14a
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
This commit is contained in:
Deepak Katragadda 2016-07-12 17:29:15 -07:00
parent aa958278d1
commit 81182d6a8e
1 changed files with 6 additions and 6 deletions
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12
drivers/clk/msm/clock-gpu-cobalt.c
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@ -109,7 +109,7 @@ static struct alpha_pll_clk gpu_pll0_pll = {
.parent = &gpucc_xo.c,
.dbg_name = "gpu_pll0_pll",
.ops = &clk_ops_fabia_alpha_pll,
VDD_GPU_PLL_FMAX_MAP1(NOMINAL, 1300000500),
VDD_GPU_PLL_FMAX_MAP1(MIN, 1300000500),
CLK_INIT(gpu_pll0_pll.c),
},
};
@ -168,7 +168,7 @@ static struct alpha_pll_clk gpu_pll1_pll = {
.parent = &gpucc_xo.c,
.dbg_name = "gpu_pll1_pll",
.ops = &clk_ops_fabia_alpha_pll,
VDD_GPU_PLL_FMAX_MAP1(NOMINAL, 1300000500),
VDD_GPU_PLL_FMAX_MAP1(MIN, 1300000500),
CLK_INIT(gpu_pll1_pll.c),
},
};
@ -670,15 +670,15 @@ static struct clk_lookup msm_clocks_gfxcc_cobalt[] = {
static void msm_gfxcc_hamster_fixup(void)
{
gpu_pll0_pll.c.fmax[VDD_DIG_NOMINAL] = 1420000500;
gpu_pll1_pll.c.fmax[VDD_DIG_NOMINAL] = 1420000500;
gpu_pll0_pll.c.fmax[VDD_DIG_MIN] = 1420000500;
gpu_pll1_pll.c.fmax[VDD_DIG_MIN] = 1420000500;
gfx3d_clk_src.freq_tbl = ftbl_gfx3d_clk_src_vq;
}
static void msm_gfxcc_cobalt_v2_fixup(void)
{
gpu_pll0_pll.c.fmax[VDD_DIG_NOMINAL] = 1420000500;
gpu_pll1_pll.c.fmax[VDD_DIG_NOMINAL] = 1420000500;
gpu_pll0_pll.c.fmax[VDD_DIG_MIN] = 1420000500;
gpu_pll1_pll.c.fmax[VDD_DIG_MIN] = 1420000500;
gfx3d_clk_src.freq_tbl = ftbl_gfx3d_clk_src_v2;
}