KVM: nVMX: Eliminate vmcs02 pool
commit de3a0021a60635de96aa92713c1a31a96747d72c upstream. The potential performance advantages of a vmcs02 pool have never been realized. To simplify the code, eliminate the pool. Instead, a single vmcs02 is allocated per VCPU when the VCPU enters VMX operation. Signed-off-by: Jim Mattson <jmattson@google.com> Signed-off-by: Mark Kanda <mark.kanda@oracle.com> Reviewed-by: Ameya More <ameya.more@oracle.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Radim Krčmář <rkrcmar@redhat.com> Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> [bwh: Backported to 4.4: - No loaded_vmcs::shadow_vmcs field to initialise - Adjust context] Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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1bec1a14bb
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1 changed files with 22 additions and 122 deletions
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@ -172,7 +172,6 @@ module_param(ple_window_max, int, S_IRUGO);
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extern const ulong vmx_return;
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#define NR_AUTOLOAD_MSRS 8
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#define VMCS02_POOL_SIZE 1
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struct vmcs {
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u32 revision_id;
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@ -205,7 +204,7 @@ struct shared_msr_entry {
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* stored in guest memory specified by VMPTRLD, but is opaque to the guest,
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* which must access it using VMREAD/VMWRITE/VMCLEAR instructions.
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* More than one of these structures may exist, if L1 runs multiple L2 guests.
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* nested_vmx_run() will use the data here to build a vmcs02: a VMCS for the
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* nested_vmx_run() will use the data here to build the vmcs02: a VMCS for the
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* underlying hardware which will be used to run L2.
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* This structure is packed to ensure that its layout is identical across
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* machines (necessary for live migration).
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@ -384,13 +383,6 @@ struct __packed vmcs12 {
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*/
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#define VMCS12_SIZE 0x1000
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/* Used to remember the last vmcs02 used for some recently used vmcs12s */
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struct vmcs02_list {
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struct list_head list;
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gpa_t vmptr;
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struct loaded_vmcs vmcs02;
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};
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/*
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* The nested_vmx structure is part of vcpu_vmx, and holds information we need
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* for correct emulation of VMX (i.e., nested VMX) on this vcpu.
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@ -412,16 +404,16 @@ struct nested_vmx {
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*/
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bool sync_shadow_vmcs;
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/* vmcs02_list cache of VMCSs recently used to run L2 guests */
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struct list_head vmcs02_pool;
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int vmcs02_num;
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u64 vmcs01_tsc_offset;
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bool change_vmcs01_virtual_x2apic_mode;
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/* L2 must run next, and mustn't decide to exit to L1. */
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bool nested_run_pending;
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struct loaded_vmcs vmcs02;
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/*
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* Guest pages referred to in vmcs02 with host-physical pointers, so
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* we must keep them pinned while L2 runs.
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* Guest pages referred to in the vmcs02 with host-physical
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* pointers, so we must keep them pinned while L2 runs.
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*/
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struct page *apic_access_page;
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struct page *virtual_apic_page;
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@ -6434,93 +6426,6 @@ static int handle_monitor(struct kvm_vcpu *vcpu)
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return handle_nop(vcpu);
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}
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/*
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* To run an L2 guest, we need a vmcs02 based on the L1-specified vmcs12.
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* We could reuse a single VMCS for all the L2 guests, but we also want the
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* option to allocate a separate vmcs02 for each separate loaded vmcs12 - this
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* allows keeping them loaded on the processor, and in the future will allow
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* optimizations where prepare_vmcs02 doesn't need to set all the fields on
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* every entry if they never change.
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* So we keep, in vmx->nested.vmcs02_pool, a cache of size VMCS02_POOL_SIZE
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* (>=0) with a vmcs02 for each recently loaded vmcs12s, most recent first.
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*
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* The following functions allocate and free a vmcs02 in this pool.
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*/
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/* Get a VMCS from the pool to use as vmcs02 for the current vmcs12. */
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static struct loaded_vmcs *nested_get_current_vmcs02(struct vcpu_vmx *vmx)
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{
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struct vmcs02_list *item;
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list_for_each_entry(item, &vmx->nested.vmcs02_pool, list)
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if (item->vmptr == vmx->nested.current_vmptr) {
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list_move(&item->list, &vmx->nested.vmcs02_pool);
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return &item->vmcs02;
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}
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if (vmx->nested.vmcs02_num >= max(VMCS02_POOL_SIZE, 1)) {
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/* Recycle the least recently used VMCS. */
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item = list_entry(vmx->nested.vmcs02_pool.prev,
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struct vmcs02_list, list);
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item->vmptr = vmx->nested.current_vmptr;
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list_move(&item->list, &vmx->nested.vmcs02_pool);
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return &item->vmcs02;
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}
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/* Create a new VMCS */
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item = kmalloc(sizeof(struct vmcs02_list), GFP_KERNEL);
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if (!item)
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return NULL;
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item->vmcs02.vmcs = alloc_vmcs();
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if (!item->vmcs02.vmcs) {
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kfree(item);
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return NULL;
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}
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loaded_vmcs_init(&item->vmcs02);
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item->vmptr = vmx->nested.current_vmptr;
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list_add(&(item->list), &(vmx->nested.vmcs02_pool));
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vmx->nested.vmcs02_num++;
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return &item->vmcs02;
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}
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/* Free and remove from pool a vmcs02 saved for a vmcs12 (if there is one) */
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static void nested_free_vmcs02(struct vcpu_vmx *vmx, gpa_t vmptr)
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{
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struct vmcs02_list *item;
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list_for_each_entry(item, &vmx->nested.vmcs02_pool, list)
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if (item->vmptr == vmptr) {
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free_loaded_vmcs(&item->vmcs02);
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list_del(&item->list);
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kfree(item);
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vmx->nested.vmcs02_num--;
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return;
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}
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}
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/*
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* Free all VMCSs saved for this vcpu, except the one pointed by
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* vmx->loaded_vmcs. We must be running L1, so vmx->loaded_vmcs
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* must be &vmx->vmcs01.
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*/
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static void nested_free_all_saved_vmcss(struct vcpu_vmx *vmx)
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{
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struct vmcs02_list *item, *n;
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WARN_ON(vmx->loaded_vmcs != &vmx->vmcs01);
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list_for_each_entry_safe(item, n, &vmx->nested.vmcs02_pool, list) {
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/*
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* Something will leak if the above WARN triggers. Better than
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* a use-after-free.
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*/
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if (vmx->loaded_vmcs == &item->vmcs02)
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continue;
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free_loaded_vmcs(&item->vmcs02);
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list_del(&item->list);
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kfree(item);
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vmx->nested.vmcs02_num--;
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}
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}
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/*
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* The following 3 functions, nested_vmx_succeed()/failValid()/failInvalid(),
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* set the success or error code of an emulated VMX instruction, as specified
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@ -6833,6 +6738,11 @@ static int handle_vmon(struct kvm_vcpu *vcpu)
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return 1;
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}
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vmx->nested.vmcs02.vmcs = alloc_vmcs();
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if (!vmx->nested.vmcs02.vmcs)
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goto out_vmcs02;
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loaded_vmcs_init(&vmx->nested.vmcs02);
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if (cpu_has_vmx_msr_bitmap()) {
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vmx->nested.msr_bitmap =
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(unsigned long *)__get_free_page(GFP_KERNEL);
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@ -6851,9 +6761,6 @@ static int handle_vmon(struct kvm_vcpu *vcpu)
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vmx->nested.current_shadow_vmcs = shadow_vmcs;
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}
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INIT_LIST_HEAD(&(vmx->nested.vmcs02_pool));
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vmx->nested.vmcs02_num = 0;
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hrtimer_init(&vmx->nested.preemption_timer, CLOCK_MONOTONIC,
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HRTIMER_MODE_REL);
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vmx->nested.preemption_timer.function = vmx_preemption_timer_fn;
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@ -6870,6 +6777,9 @@ out_shadow_vmcs:
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free_page((unsigned long)vmx->nested.msr_bitmap);
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out_msr_bitmap:
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free_loaded_vmcs(&vmx->nested.vmcs02);
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out_vmcs02:
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return -ENOMEM;
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}
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@ -6946,7 +6856,7 @@ static void free_nested(struct vcpu_vmx *vmx)
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}
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if (enable_shadow_vmcs)
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free_vmcs(vmx->nested.current_shadow_vmcs);
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/* Unpin physical memory we referred to in current vmcs02 */
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/* Unpin physical memory we referred to in the vmcs02 */
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if (vmx->nested.apic_access_page) {
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nested_release_page(vmx->nested.apic_access_page);
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vmx->nested.apic_access_page = NULL;
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@ -6962,7 +6872,7 @@ static void free_nested(struct vcpu_vmx *vmx)
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vmx->nested.pi_desc = NULL;
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}
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nested_free_all_saved_vmcss(vmx);
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free_loaded_vmcs(&vmx->nested.vmcs02);
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}
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/* Emulate the VMXOFF instruction */
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@ -6996,8 +6906,6 @@ static int handle_vmclear(struct kvm_vcpu *vcpu)
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vmptr + offsetof(struct vmcs12, launch_state),
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&zero, sizeof(zero));
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nested_free_vmcs02(vmx, vmptr);
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skip_emulated_instruction(vcpu);
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nested_vmx_succeed(vcpu);
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return 1;
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@ -7784,10 +7692,11 @@ static bool nested_vmx_exit_handled(struct kvm_vcpu *vcpu)
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/*
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* The host physical addresses of some pages of guest memory
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* are loaded into VMCS02 (e.g. L1's Virtual APIC Page). The CPU
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* may write to these pages via their host physical address while
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* L2 is running, bypassing any address-translation-based dirty
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* tracking (e.g. EPT write protection).
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* are loaded into the vmcs02 (e.g. vmcs12's Virtual APIC
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* Page). The CPU may write to these pages via their host
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* physical address while L2 is running, bypassing any
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* address-translation-based dirty tracking (e.g. EPT write
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* protection).
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*
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* Mark them dirty on every exit from L2 to prevent them from
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* getting out of sync with dirty tracking.
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@ -9889,7 +9798,6 @@ static int nested_vmx_run(struct kvm_vcpu *vcpu, bool launch)
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struct vmcs12 *vmcs12;
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struct vcpu_vmx *vmx = to_vmx(vcpu);
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int cpu;
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struct loaded_vmcs *vmcs02;
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bool ia32e;
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u32 msr_entry_idx;
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* the nested entry.
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*/
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vmcs02 = nested_get_current_vmcs02(vmx);
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if (!vmcs02)
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return -ENOMEM;
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enter_guest_mode(vcpu);
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vmx->nested.vmcs01_tsc_offset = vmcs_read64(TSC_OFFSET);
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vmx->nested.vmcs01_debugctl = vmcs_read64(GUEST_IA32_DEBUGCTL);
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cpu = get_cpu();
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vmx->loaded_vmcs = vmcs02;
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vmx->loaded_vmcs = &vmx->nested.vmcs02;
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vmx_vcpu_put(vcpu);
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vmx_vcpu_load(vcpu, cpu);
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vcpu->cpu = cpu;
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vm_exit_controls_init(vmx, vmcs_read32(VM_EXIT_CONTROLS));
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vmx_segment_cache_clear(vmx);
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/* if no vmcs02 cache requested, remove the one we used */
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if (VMCS02_POOL_SIZE == 0)
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nested_free_vmcs02(vmx, vmx->nested.current_vmptr);
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load_vmcs12_host_state(vcpu, vmcs12);
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/* Update TSC_OFFSET if TSC was changed while L2 ran */
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