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gpio: xlp: Convert to use gpiolib irqchip helpers

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commit "325f0a (MIPS: Netlogic: Use chip_data for irq_chip methods)"
Updates "mips/netlogic/common/irq.c" to use chip_data to store interrupt
controller data pointer. Before this commit handler_data was used to
store interrupt controller data which caused errors while using
gpiochip_set_chained_irqchip.

Update XLP GPIO driver to use the gpiolib irqchip helpers.
And add missing depends on OF_GPIO in Kconfig.

Signed-off-by: Kamlakant Patel <kamlakant.patel@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Kamlakant Patel 2015-10-15 18:23:32 +05:30 • committed by Linus Walleij
parent 677b2ff4af
commit 83ea24fd45
2 changed files with 12 additions and 11 deletions
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2
drivers/gpio/Kconfig
View file

@ -512,7 +512,7 @@ config GPIO_XILINX
config GPIO_XLP config GPIO_XLP
tristate "Netlogic XLP GPIO support" tristate "Netlogic XLP GPIO support"
depends on CPU_XLP depends on CPU_XLP && OF_GPIO
select GPIOLIB_IRQCHIP select GPIOLIB_IRQCHIP
help help
This driver provides support for GPIO interface on Netlogic XLP MIPS64 This driver provides support for GPIO interface on Netlogic XLP MIPS64

21
drivers/gpio/gpio-xlp.c
View file

@ -18,6 +18,7 @@
#include <linux/module.h> #include <linux/module.h>
#include <linux/irq.h> #include <linux/irq.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/irqchip/chained_irq.h>
/* /*
* XLP GPIO has multiple 32 bit registers for each feature where each register * XLP GPIO has multiple 32 bit registers for each feature where each register
@ -208,25 +209,28 @@ static struct irq_chip xlp_gpio_irq_chip = {
.flags = IRQCHIP_ONESHOT_SAFE, .flags = IRQCHIP_ONESHOT_SAFE,
}; };
static irqreturn_t xlp_gpio_generic_handler(int irq, void *data) static void xlp_gpio_generic_handler(struct irq_desc *desc)
{ {
struct xlp_gpio_priv *priv = data; struct xlp_gpio_priv *priv = irq_desc_get_handler_data(desc);
struct irq_chip *irqchip = irq_desc_get_chip(desc);
int gpio, regoff; int gpio, regoff;
u32 gpio_stat; u32 gpio_stat;
regoff = -1; regoff = -1;
gpio_stat = 0; gpio_stat = 0;
chained_irq_enter(irqchip, desc);
for_each_set_bit(gpio, priv->gpio_enabled_mask, XLP_MAX_NR_GPIO) { for_each_set_bit(gpio, priv->gpio_enabled_mask, XLP_MAX_NR_GPIO) {
if (regoff != gpio / XLP_GPIO_REGSZ) { if (regoff != gpio / XLP_GPIO_REGSZ) {
regoff = gpio / XLP_GPIO_REGSZ; regoff = gpio / XLP_GPIO_REGSZ;
gpio_stat = readl(priv->gpio_intr_stat + regoff * 4); gpio_stat = readl(priv->gpio_intr_stat + regoff * 4);
} }
if (gpio_stat & BIT(gpio % XLP_GPIO_REGSZ)) if (gpio_stat & BIT(gpio % XLP_GPIO_REGSZ))
generic_handle_irq(irq_find_mapping( generic_handle_irq(irq_find_mapping(
priv->chip.irqdomain, gpio)); priv->chip.irqdomain, gpio));
} }
chained_irq_exit(irqchip, desc);
return IRQ_HANDLED;
} }
static int xlp_gpio_dir_output(struct gpio_chip *gc, unsigned gpio, int state) static int xlp_gpio_dir_output(struct gpio_chip *gc, unsigned gpio, int state)
@ -378,12 +382,6 @@ static int xlp_gpio_probe(struct platform_device *pdev)
gc->get = xlp_gpio_get; gc->get = xlp_gpio_get;
spin_lock_init(&priv->lock); spin_lock_init(&priv->lock);
err = devm_request_irq(&pdev->dev, irq, xlp_gpio_generic_handler,
IRQ_TYPE_NONE, pdev->name, priv);
if (err)
return err;
irq_base = irq_alloc_descs(-1, XLP_GPIO_IRQ_BASE, gc->ngpio, 0); irq_base = irq_alloc_descs(-1, XLP_GPIO_IRQ_BASE, gc->ngpio, 0);
if (irq_base < 0) { if (irq_base < 0) {
dev_err(&pdev->dev, "Failed to allocate IRQ numbers\n"); dev_err(&pdev->dev, "Failed to allocate IRQ numbers\n");
@ -401,6 +399,9 @@ static int xlp_gpio_probe(struct platform_device *pdev)
goto out_gpio_remove; goto out_gpio_remove;
} }
gpiochip_set_chained_irqchip(gc, &xlp_gpio_irq_chip, irq,
xlp_gpio_generic_handler);
dev_info(&pdev->dev, "registered %d GPIOs\n", gc->ngpio); dev_info(&pdev->dev, "registered %d GPIOs\n", gc->ngpio);
return 0; return 0;