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Merge android-4.4.116 (20ddb25) into msm-4.4

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* refs/heads/tmp-20ddb25
  Linux 4.4.116
  ftrace: Remove incorrect setting of glob search field
  mn10300/misalignment: Use SIGSEGV SEGV_MAPERR to report a failed user copy
  ovl: fix failure to fsync lower dir
  ACPI: sbshc: remove raw pointer from printk() message
  nvme: Fix managing degraded controllers
  btrfs: Handle btrfs_set_extent_delalloc failure in fixup worker
  pktcdvd: Fix pkt_setup_dev() error path
  EDAC, octeon: Fix an uninitialized variable warning
  xtensa: fix futex_atomic_cmpxchg_inatomic
  alpha: fix reboot on Avanti platform
  alpha: fix crash if pthread_create races with signal delivery
  signal/sh: Ensure si_signo is initialized in do_divide_error
  signal/openrisc: Fix do_unaligned_access to send the proper signal
  Bluetooth: btusb: Restore QCA Rome suspend/resume fix with a "rewritten" version
  Revert "Bluetooth: btusb: fix QCA Rome suspend/resume"
  Bluetooth: btsdio: Do not bind to non-removable BCM43341
  HID: quirks: Fix keyboard + touchpad on Toshiba Click Mini not working
  kernel/async.c: revert "async: simplify lowest_in_progress()"
  media: cxusb, dib0700: ignore XC2028_I2C_FLUSH
  media: ts2020: avoid integer overflows on 32 bit machines
  watchdog: imx2_wdt: restore previous timeout after suspend+resume
  KVM: nVMX: Fix races when sending nested PI while dest enters/leaves L2
  arm: KVM: Fix SMCCC handling of unimplemented SMC/HVC calls
  crypto: caam - fix endless loop when DECO acquire fails
  media: v4l2-compat-ioctl32.c: refactor compat ioctl32 logic
  media: v4l2-compat-ioctl32.c: don't copy back the result for certain errors
  media: v4l2-compat-ioctl32.c: drop pr_info for unknown buffer type
  media: v4l2-compat-ioctl32.c: copy clip list in put_v4l2_window32
  media: v4l2-compat-ioctl32: Copy v4l2_window->global_alpha
  media: v4l2-compat-ioctl32.c: make ctrl_is_pointer work for subdevs
  media: v4l2-compat-ioctl32.c: fix ctrl_is_pointer
  media: v4l2-compat-ioctl32.c: copy m.userptr in put_v4l2_plane32
  media: v4l2-compat-ioctl32.c: avoid sizeof(type)
  media: v4l2-compat-ioctl32.c: move 'helper' functions to __get/put_v4l2_format32
  media: v4l2-compat-ioctl32.c: fix the indentation
  media: v4l2-compat-ioctl32.c: add missing VIDIOC_PREPARE_BUF
  vb2: V4L2_BUF_FLAG_DONE is set after DQBUF
  media: v4l2-ioctl.c: don't copy back the result for -ENOTTY
  nsfs: mark dentry with DCACHE_RCUACCESS
  crypto: poly1305 - remove ->setkey() method
  crypto: cryptd - pass through absence of ->setkey()
  crypto: hash - introduce crypto_hash_alg_has_setkey()
  ahci: Add Intel Cannon Lake PCH-H PCI ID
  ahci: Add PCI ids for Intel Bay Trail, Cherry Trail and Apollo Lake AHCI
  ahci: Annotate PCI ids for mobile Intel chipsets as such
  kernfs: fix regression in kernfs_fop_write caused by wrong type
  NFS: reject request for id_legacy key without auxdata
  NFS: commit direct writes even if they fail partially
  NFS: Add a cond_resched() to nfs_commit_release_pages()
  nfs/pnfs: fix nfs_direct_req ref leak when i/o falls back to the mds
  ubi: block: Fix locking for idr_alloc/idr_remove
  mtd: nand: sunxi: Fix ECC strength choice
  mtd: nand: Fix nand_do_read_oob() return value
  mtd: nand: brcmnand: Disable prefetch by default
  mtd: cfi: convert inline functions to macros
  media: dvb-usb-v2: lmedm04: move ts2020 attach to dm04_lme2510_tuner
  media: dvb-usb-v2: lmedm04: Improve logic checking of warm start
  dccp: CVE-2017-8824: use-after-free in DCCP code
  sched/rt: Up the root domain ref count when passing it around via IPIs
  sched/rt: Use container_of() to get root domain in rto_push_irq_work_func()
  usb: gadget: uvc: Missing files for configfs interface
  posix-timer: Properly check sigevent->sigev_notify
  netfilter: nf_queue: Make the queue_handler pernet
  kaiser: fix compile error without vsyscall
  x86/kaiser: fix build error with KASAN && !FUNCTION_GRAPH_TRACER
  dmaengine: dmatest: fix container_of member in dmatest_callback
  CIFS: zero sensitive data when freeing
  cifs: Fix autonegotiate security settings mismatch
  cifs: Fix missing put_xid in cifs_file_strict_mmap
  powerpc/pseries: include linux/types.h in asm/hvcall.h
  x86/microcode: Do the family check first
  x86/microcode/AMD: Do not load when running on a hypervisor
  crypto: tcrypt - fix S/G table for test_aead_speed()
  don't put symlink bodies in pagecache into highmem
  KEYS: encrypted: fix buffer overread in valid_master_desc()
  media: soc_camera: soc_scale_crop: add missing MODULE_DESCRIPTION/AUTHOR/LICENSE
  vhost_net: stop device during reset owner
  tcp: release sk_frag.page in tcp_disconnect
  r8169: fix RTL8168EP take too long to complete driver initialization.
  qlcnic: fix deadlock bug
  net: igmp: add a missing rcu locking section
  ip6mr: fix stale iterator
  x86/asm: Fix inline asm call constraints for GCC 4.4
  drm: rcar-du: Fix race condition when disabling planes at CRTC stop
  drm: rcar-du: Use the VBK interrupt for vblank events
  ASoC: rsnd: avoid duplicate free_irq()
  ASoC: rsnd: don't call free_irq() on Parent SSI
  ASoC: simple-card: Fix misleading error message
  net: cdc_ncm: initialize drvflags before usage
  usbip: fix 3eee23c3ec14 tcp_socket address still in the status file
  usbip: vhci_hcd: clear just the USB_PORT_STAT_POWER bit
  ASoC: pcm512x: add missing MODULE_DESCRIPTION/AUTHOR/LICENSE
  powerpc/64s: Allow control of RFI flush via debugfs
  powerpc/64s: Wire up cpu_show_meltdown()
  powerpc/powernv: Check device-tree for RFI flush settings
  powerpc/pseries: Query hypervisor for RFI flush settings
  powerpc/64s: Support disabling RFI flush with no_rfi_flush and nopti
  powerpc/64s: Add support for RFI flush of L1-D cache
  powerpc/64s: Convert slb_miss_common to use RFI_TO_USER/KERNEL
  powerpc/64: Convert the syscall exit path to use RFI_TO_USER/KERNEL
  powerpc/64: Convert fast_exception_return to use RFI_TO_USER/KERNEL
  powerpc/64s: Simple RFI macro conversions
  powerpc/64: Add macros for annotating the destination of rfid/hrfid
  powerpc/pseries: Add H_GET_CPU_CHARACTERISTICS flags & wrapper
  powerpc: Simplify module TOC handling
  powerpc: Fix VSX enabling/flushing to also test MSR_FP and MSR_VEC
  powerpc/64: Fix flush_(d|i)cache_range() called from modules
  powerpc/bpf/jit: Disable classic BPF JIT on ppc64le
  BACKPORT: xfrm: Fix return value check of copy_sec_ctx.
  time: Fix ktime_get_raw() incorrect base accumulation
  sched/fair: prevent possible infinite loop in sched_group_energy
  UPSTREAM: MIPS: Fix build of compressed image
  ANDROID: qtaguid: Fix the UAF probelm with tag_ref_tree
  UPSTREAM: ANDROID: binder: remove waitqueue when thread exits.
  UPSTREAM: arm64/efi: Make strnlen() available to the EFI namespace
  UPSTREAM: ARM: boot: Add an implementation of strnlen for libfdt
  ANDROID: MIPS: Add ranchu[32r5|32r6|64]_defconfig
  FROMLIST: tty: goldfish: Enable 'earlycon' only if built-in
  FROMLIST: MIPS: ranchu: Add Ranchu as a new generic-based board
  FROMLIST: MIPS: Add noexec=on|off kernel parameter
  FROMLIST: MIPS: CPC: Map registers using DT in mips_cpc_default_phys_base()
  FROMLIST: dt-bindings: Document mti,mips-cpc binding
  FROMLIST: MIPS: math-emu: Mark fall throughs in switch statements with a comment
  FROMLIST: MIPS: math-emu: Avoid multiple assignment
  FROMLIST: MIPS: math-emu: Avoid an assignment within if statement condition
  FROMLIST: MIPS: math-emu: Declare function srl128() as static
  FROMLIST: MIPS: math-emu: Avoid definition duplication for macro DPXMULT()
  FROMLIST: MIPS: math-emu: Remove an unnecessary header inclusion
  UPSTREAM: scripts/dtc: Update to upstream version 0931cea3ba20
  UPSTREAM: scripts/dtc: dt_to_config - kernel config options for a devicetree
  UPSTREAM: scripts/dtc: Update to upstream version 53bf130b1cdd
  UPSTREAM: scripts/dtc: Update to upstream commit b06e55c88b9b
  UPSTREAM: scripts/dtc: dtx_diff - add info to error message
  UPSTREAM: dtc: create tool to diff device trees
  UPSTREAM: config: android-base: disable CONFIG_NFSD and CONFIG_NFS_FS
  UPSTREAM: config: android-base: add CGROUP_BPF
  UPSTREAM: config: android-base: add CONFIG_MODULES option
  UPSTREAM: config: android-base: add CONFIG_IKCONFIG option
  UPSTREAM: config: android-base: disable CONFIG_USELIB and CONFIG_FHANDLE
  UPSTREAM: config: android-base: enable hardened usercopy and kernel ASLR
  UPSTREAM: config: android: enable CONFIG_SECCOMP
  UPSTREAM: config: android: set SELinux as default security mode
  UPSTREAM: config: android: move device mapper options to recommended
  UPSTREAM: config/android: Remove CONFIG_IPV6_PRIVACY
  UPSTREAM: config: add android config fragments
  BACKPORT: MIPS: generic: Add a MAINTAINERS entry
  BACKPORT: irqchip/irq-goldfish-pic: Add Goldfish PIC driver
  UPSTREAM: dt-bindings/goldfish-pic: Add device tree binding for Goldfish PIC driver
  UPSTREAM: MIPS: Allow storing pgd in C0_CONTEXT for MIPSr6
  UPSTREAM: MIPS: CPS: Handle spurious VP starts more gracefully
  UPSTREAM: MIPS: CPS: Handle cores not powering down more gracefully
  UPSTREAM: MIPS: CPS: Prevent multi-core with dcache aliasing
  UPSTREAM: MIPS: CPS: Select CONFIG_SYS_SUPPORTS_SCHED_SMT for MIPSr6
  UPSTREAM: MIPS: CM: WARN on attempt to lock invalid VP, not BUG
  UPSTREAM: MIPS: CM: Avoid per-core locking with CM3 & higher
  UPSTREAM: MIPS: smp-cps: Avoid BUG() when offlining pre-r6 CPUs
  UPSTREAM: MIPS: smp-cps: Add support for CPU hotplug of MIPSr6 processors
  UPSTREAM: MIPS: generic: Bump default NR_CPUS to 16
  UPSTREAM: MIPS: pm-cps: Change FSB workaround to CPU blacklist
  UPSTREAM: MIPS: Fix early CM probing
  UPSTREAM: MIPS: smp-cps: Stop printing EJTAG exceptions to UART
  UPSTREAM: MIPS: smp-cps: Add nothreads kernel parameter
  UPSTREAM: MIPS: smp-cps: Support MIPSr6 Virtual Processors
  UPSTREAM: MIPS: smp-cps: Skip core setup if coherent
  UPSTREAM: MIPS: smp-cps: Pull boot config retrieval out of mips_cps_boot_vpes
  UPSTREAM: MIPS: smp-cps: Pull cache init into a function
  UPSTREAM: MIPS: smp-cps: Ensure our VP ident calculation is correct
  UPSTREAM: irqchip: mips-gic: Provide VP ID accessor
  UPSTREAM: irqchip: mips-gic: Use HW IDs for VPE_OTHER_ADDR
  UPSTREAM: MIPS: CM: Fix mips_cm_max_vp_width for UP kernels
  UPSTREAM: MIPS: CM: Add CM GCR_BEV_BASE accessors
  UPSTREAM: MIPS: CPC: Add start, stop and running CM3 CPC registers
  UPSTREAM: MIPS: pm-cps: Avoid offset overflow on MIPSr6
  UPSTREAM: MIPS: traps: Make sure secondary cores have a sane ebase register
  UPSTREAM: MIPS: Detect MIPSr6 Virtual Processor support
  UPSTREAM: Documentation: Add device tree binding for Goldfish FB driver
  UPSTREAM: MIPS: math-emu: Use preferred flavor of unsigned integer declarations
  UPSTREAM: MIPS: math-emu: <MADDF|MSUBF>.D: Fix accuracy (64-bit case)
  UPSTREAM: MIPS: math-emu: <MADDF|MSUBF>.S: Fix accuracy (32-bit case)
  UPSTREAM: MIPS: Update Goldfish RTC driver maintainer email address
  UPSTREAM: MIPS: Update RINT emulation maintainer email address
  UPSTREAM: MIPS: math-emu: do not use bools for arithmetic
  UPSTREAM: rtc: goldfish: Add RTC driver for Android emulator
  BACKPORT: dt-bindings: Add device tree binding for Goldfish RTC driver
  UPSTREAM: tty: goldfish: Implement support for kernel 'earlycon' parameter
  UPSTREAM: tty: goldfish: Use streaming DMA for r/w operations on Ranchu platforms
  UPSTREAM: tty: goldfish: Refactor constants to better reflect their nature
  UPSTREAM: MIPS: math-emu: Add FP emu debugfs stats for individual instructions
  UPSTREAM: MIPS: math-emu: Add FP emu debugfs clear functionality
  UPSTREAM: MIPS: math-emu: Add FP emu debugfs statistics for branches
  BACKPORT: MIPS: math-emu: CLASS.D: Zero bits 32-63 of the result
  BACKPORT: MIPS: math-emu: RINT.<D|S>: Fix several problems by reimplementation
  UPSTREAM: MIPS: math-emu: CMP.Sxxx.<D|S>: Prevent occurrences of SIGILL crashes
  UPSTREAM: MIPS: math-emu: <MADDF|MSUBF>.<D|S>: Clean up "maddf_flags" enumeration
  UPSTREAM: MIPS: math-emu: <MADDF|MSUBF>.<D|S>: Fix some cases of zero inputs
  UPSTREAM: MIPS: math-emu: <MADDF|MSUBF>.<D|S>: Fix some cases of infinite inputs
  UPSTREAM: MIPS: math-emu: <MADDF|MSUBF>.<D|S>: Fix NaN propagation
  UPSTREAM: tty: goldfish: Fix a parameter of a call to free_irq
  UPSTREAM: MIPS: VDSO: Fix clobber lists in fallback code paths
  UPSTREAM: MIPS: VDSO: Fix a mismatch between comment and preprocessor constant
  UPSTREAM: MIPS: VDSO: Add implementation of gettimeofday() fallback
  UPSTREAM: MIPS: VDSO: Add implementation of clock_gettime() fallback
  UPSTREAM: MIPS: VDSO: Fix conversions in do_monotonic()/do_monotonic_coarse()
  UPSTREAM: MIPS: unaligned: Add DSP lwx & lhx missaligned access support
  UPSTREAM: MIPS: build: Fix "-modd-spreg" switch usage when compiling for mips32r6
  UPSTREAM: MIPS: cmdline: Add support for 'memmap' parameter
  UPSTREAM: MIPS: math-emu: Handle zero accumulator case in MADDF and MSUBF separately
  UPSTREAM: MIPS: Support per-device DMA coherence
  UPSTREAM: MIPS: dma-default: Don't check hw_coherentio if device is non-coherent
  UPSTREAM: MIPS: Sanitise coherentio semantics
  UPSTREAM: MIPS: CPC: Provide default mips_cpc_default_phys_base to ignore CPC
  UPSTREAM: MIPS: generic: Introduce generic DT-based board support
  UPSTREAM: MIPS: Support generating Flattened Image Trees (.itb)
  UPSTREAM: MIPS: Allow emulation for unaligned [LS]DXC1 instructions
  UPSTREAM: MIPS: math-emu: Fix BC1EQZ and BC1NEZ condition handling
  UPSTREAM: MIPS: r2-on-r6-emu: Clear BLTZALL and BGEZALL debugfs counters
  UPSTREAM: MIPS: r2-on-r6-emu: Fix BLEZL and BGTZL identification
  UPSTREAM: MIPS: remove aliasing alignment if HW has antialising support
  BACKPORT: MIPS: store the appended dtb address in a variable
  UPSTREAM: MIPS: Fix FCSR Cause bit handling for correct SIGFPE issue
  UPSTREAM: MIPS: kernel: Audit and remove any unnecessary uses of module.h
  UPSTREAM: MIPS: c-r4k: Fix sigtramp SMP call to use kmap
  UPSTREAM: MIPS: c-r4k: Fix protected_writeback_scache_line for EVA
  UPSTREAM: MIPS: Spelling fix lets -> let's
  UPSTREAM: MIPS: R6: Fix typo
  UPSTREAM: MIPS: traps: Correct the SIGTRAP debug ABI in `do_watch' and `do_trap_or_bp'
  UPSTREAM: MIPS: inst.h: Rename cbcond{0,1}_op to pop{1,3}0_op
  UPSTREAM: MIPS: inst.h: Rename b{eq,ne}zcji[al]c_op to pop{6,7}6_op
  UPSTREAM: MIPS: math-emu: Fix m{add,sub}.s shifts
  UPSTREAM: MIPS: inst: Declare fsel_op for sel.fmt instruction
  UPSTREAM: MIPS: math-emu: Fix code indentation
  UPSTREAM: MIPS: math-emu: Fix bit-width in ieee754dp_{mul, maddf, msubf} comments
  UPSTREAM: MIPS: math-emu: Add z argument macros
  UPSTREAM: MIPS: math-emu: Unify ieee754dp_m{add,sub}f
  UPSTREAM: MIPS: math-emu: Unify ieee754sp_m{add,sub}f
  UPSTREAM: MIPS: math-emu: Emulate MIPSr6 sel.fmt instruction
  UPSTREAM: MIPS: math-emu: Fix BC1{EQ,NE}Z emulation
  UPSTREAM: MIPS: math-emu: Always propagate sNaN payload in quieting
  UPSTREAM: MIPS: Fix misspellings in comments.
  UPSTREAM: MIPS: math-emu: Add IEEE Std 754-2008 NaN encoding emulation
  UPSTREAM: MIPS: math-emu: Add IEEE Std 754-2008 ABS.fmt and NEG.fmt emulation
  UPSTREAM: MIPS: non-exec stack & heap when non-exec PT_GNU_STACK is present
  UPSTREAM: MIPS: Add IEEE Std 754 conformance mode selection
  UPSTREAM: MIPS: Determine the presence of IEEE Std 754-2008 features
  UPSTREAM: MIPS: Define the legacy-NaN and 2008-NaN features
  UPSTREAM: MIPS: ELF: Interpret the NAN2008 file header flag
  UPSTREAM: ELF: Also pass any interpreter's file header to `arch_check_elf'
  UPSTREAM: MIPS: Use a union to access the ELF file header
  UPSTREAM: MIPS: Fix delay slot emulation count in debugfs
  BACKPORT: exit_thread: accept a task parameter to be exited
  UPSTREAM: mn10300: let exit_fpu accept a task
  UPSTREAM: MIPS: Use per-mm page to execute branch delay slot instructions
  BACKPORT: s390: get rid of exit_thread()
  BACKPORT: exit_thread: remove empty bodies
  UPSTREAM: MIPS: Make flush_thread
  UPSTREAM: MIPS: Properly disable FPU in start_thread()
  UPSTREAM: MIPS: Select CONFIG_HANDLE_DOMAIN_IRQ and make it work.
  UPSTREAM: MIPS: math-emu: Fix typo
  UPSTREAM: MIPS: math-emu: dsemul: Remove an unused bit in ADDIUPC emulation
  UPSTREAM: MIPS: math-emu: dsemul: Reduce `get_isa16_mode' clutter
  UPSTREAM: MIPS: math-emu: dsemul: Correct description of the emulation frame
  UPSTREAM: MIPS: math-emu: Correct the emulation of microMIPS ADDIUPC instruction
  UPSTREAM: MIPS: math-emu: Make microMIPS branch delay slot emulation work
  UPSTREAM: MIPS: math-emu: dsemul: Fix ill formatting of microMIPS part
  UPSTREAM: MIPS: math-emu: Correctly handle NOP emulation

Conflicts:
	drivers/irqchip/Kconfig
	drivers/irqchip/Makefile
	drivers/media/v4l2-core/v4l2-compat-ioctl32.c

Change-Id: I98374358ab24ce80dba3afa2f4562c71f45b7aab
Signed-off-by: Srinivasarao P <spathi@codeaurora.org>
This commit is contained in:
Srinivasarao P 2018-02-27 18:56:06 +05:30
commit 863577dd59
371 changed files with 12044 additions and 3784 deletions
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2
.mailmap
View file

@ -14,6 +14,7 @@ Adrian Bunk <bunk@stusta.de>
Alan Cox <alan@lxorguk.ukuu.org.uk>
Alan Cox <root@hraefn.swansea.linux.org.uk>
Aleksey Gorelov <aleksey_gorelov@phoenix.com>
Aleksandar Markovic <aleksandar.markovic@mips.com> <aleksandar.markovic@imgtec.com>
Al Viro <viro@ftp.linux.org.uk>
Al Viro <viro@zenIV.linux.org.uk>
Andreas Herrmann <aherrman@de.ibm.com>
@ -85,6 +86,7 @@ Matthieu CASTET <castet.matthieu@free.fr>
Mayuresh Janorkar <mayur@ti.com>
Michael Buesch <m@bues.ch>
Michel Dänzer <michel@tungstengraphics.com>
Miodrag Dinic <miodrag.dinic@mips.com> <miodrag.dinic@imgtec.com>
Mitesh shah <mshah@teja.com>
Mohit Kumar <mohit.kumar@st.com> <mohit.kumar.dhaka@gmail.com>
Morten Welinder <terra@gnome.org>

17
Documentation/devicetree/bindings/display/google,goldfish-fb.txt Normal file
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@ -0,0 +1,17 @@
Android Goldfish framebuffer
Android Goldfish framebuffer device used by Android emulator.
Required properties:
- compatible : should contain "google,goldfish-fb"
- reg : <registers mapping>
- interrupts : <interrupt mapping>
Example:
display-controller@1f008000 {
compatible = "google,goldfish-fb";
interrupts = <0x10>;
reg = <0x1f008000 0x100>;
};

30
Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt Normal file
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@ -0,0 +1,30 @@
Android Goldfish PIC
Android Goldfish programmable interrupt device used by Android
emulator.
Required properties:
- compatible : should contain "google,goldfish-pic"
- reg : <registers mapping>
- interrupts : <interrupt mapping>
Example for mips when used in cascade mode:
cpuintc {
#interrupt-cells = <0x1>;
#address-cells = <0>;
interrupt-controller;
compatible = "mti,cpu-interrupt-controller";
};
interrupt-controller@1f000000 {
compatible = "google,goldfish-pic";
reg = <0x1f000000 0x1000>;
interrupt-controller;
#interrupt-cells = <0x1>;
interrupt-parent = <&cpuintc>;
interrupts = <0x2>;
};

8
Documentation/devicetree/bindings/power/mti,mips-cpc.txt Normal file
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@ -0,0 +1,8 @@
Binding for MIPS Cluster Power Controller (CPC).
This binding allows a system to specify where the CPC registers are
located.
Required properties:
compatible : Should be "mti,mips-cpc".
regs: Should describe the address & size of the CPC register region.

17
Documentation/devicetree/bindings/rtc/google,goldfish-rtc.txt Normal file
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@ -0,0 +1,17 @@
Android Goldfish RTC
Android Goldfish RTC device used by Android emulator.
Required properties:
- compatible : should contain "google,goldfish-rtc"
- reg : <registers mapping>
- interrupts : <interrupt mapping>
Example:
goldfish_timer@9020000 {
compatible = "google,goldfish-rtc";
reg = <0x9020000 0x1000>;
interrupts = <0x3>;
};

54
Documentation/kernel-parameters.txt
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@ -1463,6 +1463,41 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
In such case C2/C3 won't be used again.
idle=nomwait: Disable mwait for CPU C-states
ieee754= [MIPS] Select IEEE Std 754 conformance mode
Format: { strict | legacy | 2008 | relaxed }
Default: strict
Choose which programs will be accepted for execution
based on the IEEE 754 NaN encoding(s) supported by
the FPU and the NaN encoding requested with the value
of an ELF file header flag individually set by each
binary. Hardware implementations are permitted to
support either or both of the legacy and the 2008 NaN
encoding mode.
Available settings are as follows:
strict accept binaries that request a NaN encoding
supported by the FPU
legacy only accept legacy-NaN binaries, if supported
by the FPU
2008 only accept 2008-NaN binaries, if supported
by the FPU
relaxed accept any binaries regardless of whether
supported by the FPU
The FPU emulator is always able to support both NaN
encodings, so if no FPU hardware is present or it has
been disabled with 'nofpu', then the settings of
'legacy' and '2008' strap the emulator accordingly,
'relaxed' straps the emulator for both legacy-NaN and
2008-NaN, whereas 'strict' enables legacy-NaN only on
legacy processors and both NaN encodings on MIPS32 or
MIPS64 CPUs.
The setting for ABS.fmt/NEG.fmt instruction execution
mode generally follows that for the NaN encoding,
except where unsupported by hardware.
ignore_loglevel [KNL]
Ignore loglevel setting - this will print /all/
kernel messages to the console. Useful for debugging.
@ -2445,6 +2480,25 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
noexec=on: enable non-executable mappings (default)
noexec=off: disable non-executable mappings
noexec [MIPS]
Force indicating stack and heap as non-executable or
executable regardless of PT_GNU_STACK entry or CPU XI
(execute inhibit) support. Valid valuess are: on, off.
noexec=on: force indicating non-executable
stack and heap
noexec=off: force indicating executable
stack and heap
If this parameter is omitted, stack and heap will be
indicated non-executable or executable as they are
actually set up, which depends on PT_GNU_STACK entry
and possibly other factors (for instance, CPU XI
support).
NOTE: Using noexec=on on a system without CPU XI
support is not recommended since there is no actual
HW support that provide non-executable stack/heap.
Use only for debugging purposes and not in a
production environment.
nosmap [X86]
Disable SMAP (Supervisor Mode Access Prevention)
even if it is supported by processor.

38
MAINTAINERS
View file

@ -746,6 +746,11 @@ W: http://ez.analog.com/community/linux-device-drivers
S: Supported
F: drivers/dma/dma-axi-dmac.c
ANDROID CONFIG FRAGMENTS
M: Rob Herring <robh@kernel.org>
S: Supported
F: kernel/configs/android*
ANDROID DRIVERS
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
M: Arve Hjønnevåg <arve@android.com>
@ -756,6 +761,18 @@ S: Supported
F: drivers/android/
F: drivers/staging/android/
ANDROID GOLDFISH PIC DRIVER
M: Miodrag Dinic <miodrag.dinic@mips.com>
S: Supported
F: Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt
F: drivers/irqchip/irq-goldfish-pic.c
ANDROID GOLDFISH RTC DRIVER
M: Miodrag Dinic <miodrag.dinic@mips.com>
S: Supported
F: Documentation/devicetree/bindings/rtc/google,goldfish-rtc.txt
F: drivers/rtc/rtc-goldfish.c
AOA (Apple Onboard Audio) ALSA DRIVER
M: Johannes Berg <johannes@sipsolutions.net>
L: linuxppc-dev@lists.ozlabs.org
@ -7074,6 +7091,20 @@ S: Supported
F: Documentation/mips/
F: arch/mips/
MIPS GENERIC PLATFORM
M: Paul Burton <paul.burton@imgtec.com>
L: linux-mips@linux-mips.org
S: Supported
F: Documentation/devicetree/bindings/power/mti,mips-cpc.txt
F: arch/mips/generic/
MIPS RINT INSTRUCTION EMULATION
M: Aleksandar Markovic <aleksandar.markovic@mips.com>
L: linux-mips@linux-mips.org
S: Supported
F: arch/mips/math-emu/sp_rint.c
F: arch/mips/math-emu/dp_rint.c
MIROSOUND PCM20 FM RADIO RECEIVER DRIVER
M: Hans Verkuil <hverkuil@xs4all.nl>
L: linux-media@vger.kernel.org
@ -8876,6 +8907,13 @@ S: Maintained
F: Documentation/blockdev/ramdisk.txt
F: drivers/block/brd.c
RANCHU VIRTUAL BOARD FOR MIPS
M: Miodrag Dinic <miodrag.dinic@mips.com>
L: linux-mips@linux-mips.org
S: Supported
F: arch/mips/generic/board-ranchu.c
F: arch/mips/configs/generic/board-ranchu.config
RANDOM NUMBER DRIVER
M: "Theodore Ts'o" <tytso@mit.edu>
S: Maintained

2
Makefile
View file

@ -1,6 +1,6 @@
VERSION = 4
PATCHLEVEL = 4
SUBLEVEL = 115
SUBLEVEL = 116
EXTRAVERSION =
NAME = Blurry Fish Butt

5
arch/Kconfig
View file

@ -536,6 +536,11 @@ config HAVE_ARCH_MMAP_RND_BITS
- ARCH_MMAP_RND_BITS_MIN
- ARCH_MMAP_RND_BITS_MAX
config HAVE_EXIT_THREAD
bool
help
An architecture implements exit_thread.
config ARCH_MMAP_RND_BITS_MIN
int

3
arch/alpha/kernel/pci_impl.h
View file

@ -143,7 +143,8 @@ struct pci_iommu_arena
};
#if defined(CONFIG_ALPHA_SRM) && \
(defined(CONFIG_ALPHA_CIA) || defined(CONFIG_ALPHA_LCA))
(defined(CONFIG_ALPHA_CIA) || defined(CONFIG_ALPHA_LCA) || \
defined(CONFIG_ALPHA_AVANTI))
# define NEED_SRM_SAVE_RESTORE
#else
# undef NEED_SRM_SAVE_RESTORE

11
arch/alpha/kernel/process.c
View file

@ -210,14 +210,6 @@ start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
}
EXPORT_SYMBOL(start_thread);
/*
* Free current thread data structures etc..
*/
void
exit_thread(void)
{
}
void
flush_thread(void)
{
@ -273,12 +265,13 @@ copy_thread(unsigned long clone_flags, unsigned long usp,
application calling fork. */
if (clone_flags & CLONE_SETTLS)
childti->pcb.unique = regs->r20;
else
regs->r20 = 0; /* OSF/1 has some strange fork() semantics. */
childti->pcb.usp = usp ?: rdusp();
*childregs = *regs;
childregs->r0 = 0;
childregs->r19 = 0;
childregs->r20 = 1; /* OSF/1 has some strange fork() semantics. */
regs->r20 = 0;
stack = ((struct switch_stack *) regs) - 1;
*childstack = *stack;
childstack->r26 = (unsigned long) ret_from_fork;

7
arch/arc/kernel/process.c
View file

@ -183,13 +183,6 @@ void flush_thread(void)
{
}
/*
* Free any architecture-specific thread data structures, etc.
*/
void exit_thread(void)
{
}
int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu)
{
return 0;

1
arch/arm/Kconfig
View file

@ -50,6 +50,7 @@ config ARM
select HAVE_DMA_CONTIGUOUS if MMU
select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) && !CPU_ENDIAN_BE32
select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU
select HAVE_EXIT_THREAD
select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)

9
arch/arm/boot/compressed/string.c
View file

@ -65,6 +65,15 @@ size_t strlen(const char *s)
return sc - s;
}
size_t strnlen(const char *s, size_t count)
{
const char *sc;
for (sc = s; count-- && *sc != '\0'; ++sc)
/* nothing */;
return sc - s;
}
int memcmp(const void *cs, const void *ct, size_t count)
{
const unsigned char *su1 = cs, *su2 = ct, *end = su1 + count;

4
arch/arm/kernel/process.c
View file

@ -268,9 +268,9 @@ EXPORT_SYMBOL_GPL(thread_notify_head);
/*
* Free current thread data structures etc..
*/
void exit_thread(void)
void exit_thread(struct task_struct *tsk)
{
thread_notify(THREAD_NOTIFY_EXIT, current_thread_info());
thread_notify(THREAD_NOTIFY_EXIT, task_thread_info(tsk));
}
void flush_thread(void)

13
arch/arm/kvm/handle_exit.c
View file

@ -45,7 +45,7 @@ static int handle_hvc(struct kvm_vcpu *vcpu, struct kvm_run *run)
ret = kvm_psci_call(vcpu);
if (ret < 0) {
kvm_inject_undefined(vcpu);
vcpu_set_reg(vcpu, 0, ~0UL);
return 1;
}
@ -54,7 +54,16 @@ static int handle_hvc(struct kvm_vcpu *vcpu, struct kvm_run *run)
static int handle_smc(struct kvm_vcpu *vcpu, struct kvm_run *run)
{
kvm_inject_undefined(vcpu);
/*
* "If an SMC instruction executed at Non-secure EL1 is
* trapped to EL2 because HCR_EL2.TSC is 1, the exception is a
* Trap exception, not a Secure Monitor Call exception [...]"
*
* We need to advance the PC after the trap, as it would
* otherwise return to the same address...
*/
vcpu_set_reg(vcpu, 0, ~0UL);
kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
return 1;
}

4
arch/arm/vfp/vfpmodule.c
View file

@ -156,10 +156,6 @@ static void vfp_thread_copy(struct thread_info *thread)
* - we could be preempted if tree preempt rcu is enabled, so
* it is unsafe to use thread->cpu.
* THREAD_NOTIFY_EXIT
* - the thread (v) will be running on the local CPU, so
* v === current_thread_info()
* - thread->cpu is the local CPU number at the time it is accessed,
* but may change at any time.
* - we could be preempted if tree preempt rcu is enabled, so
* it is unsafe to use thread->cpu.
*/

1
arch/arm64/kernel/image.h
View file

@ -100,6 +100,7 @@ __efistub_memcpy = KALLSYMS_HIDE(__pi_memcpy);
__efistub_memmove = KALLSYMS_HIDE(__pi_memmove);
__efistub_memset = KALLSYMS_HIDE(__pi_memset);
__efistub_strlen = KALLSYMS_HIDE(__pi_strlen);
__efistub_strnlen = KALLSYMS_HIDE(__pi_strnlen);
__efistub_strcmp = KALLSYMS_HIDE(__pi_strcmp);
__efistub_strncmp = KALLSYMS_HIDE(__pi_strncmp);
__efistub___flush_dcache_area = KALLSYMS_HIDE(__pi___flush_dcache_area);

7
arch/arm64/kernel/process.c
View file

@ -274,13 +274,6 @@ void show_regs(struct pt_regs * regs)
__show_regs(regs);
}
/*
* Free current thread data structures etc..
*/
void exit_thread(void)
{
}
static void tls_thread_flush(void)
{
asm ("msr tpidr_el0, xzr");

2
arch/arm64/lib/strnlen.S
View file

@ -168,4 +168,4 @@ CPU_LE( lsr tmp2, tmp2, tmp4 ) /* Shift (tmp1 & 63). */
.Lhit_limit:
mov len, limit
ret
ENDPROC(strnlen)
ENDPIPROC(strnlen)

1
arch/avr32/Kconfig
View file

@ -4,6 +4,7 @@ config AVR32
# that we usually don't need on AVR32.
select EXPERT
select HAVE_CLK
select HAVE_EXIT_THREAD
select HAVE_OPROFILE
select HAVE_KPROBES
select VIRT_TO_BUS

4
arch/avr32/kernel/process.c
View file

@ -62,9 +62,9 @@ void machine_restart(char *cmd)
/*
* Free current thread data structures etc
*/
void exit_thread(void)
void exit_thread(struct task_struct *tsk)
{
ocd_disable(current);
ocd_disable(tsk);
}
void flush_thread(void)

7
arch/blackfin/include/asm/processor.h
View file

@ -75,13 +75,6 @@ static inline void release_thread(struct task_struct *dead_task)
{
}
/*
* Free current thread data structures etc..
*/
static inline void exit_thread(void)
{
}
/*
* Return saved PC of a blocked thread.
*/

4
arch/c6x/kernel/process.c
View file

@ -82,10 +82,6 @@ void flush_thread(void)
{
}
void exit_thread(void)
{
}
/*
* Do necessary setup to start up a newly executed thread.
*/

1
arch/cris/Kconfig
View file

@ -59,6 +59,7 @@ config CRIS
select GENERIC_IOMAP
select MODULES_USE_ELF_RELA
select CLONE_BACKWARDS2
select HAVE_EXIT_THREAD if ETRAX_ARCH_V32
select OLD_SIGSUSPEND
select OLD_SIGACTION
select ARCH_REQUIRE_GPIOLIB

9
arch/cris/arch-v10/kernel/process.c
View file

@ -35,15 +35,6 @@ void default_idle(void)
local_irq_enable();
}
/*
* Free current thread data structures etc..
*/
void exit_thread(void)
{
/* Nothing needs to be done. */
}
/* if the watchdog is enabled, we can simply disable interrupts and go
* into an eternal loop, and the watchdog will reset the CPU after 0.1s
* if on the other hand the watchdog wasn't enabled, we just enable it and wait

4
arch/cris/arch-v32/kernel/process.c
View file

@ -33,9 +33,9 @@ void default_idle(void)
*/
extern void deconfigure_bp(long pid);
void exit_thread(void)
void exit_thread(struct task_struct *tsk)
{
deconfigure_bp(current->pid);
deconfigure_bp(tsk->pid);
}
/*

7
arch/frv/include/asm/processor.h
View file

@ -96,13 +96,6 @@ extern asmlinkage void *restore_user_regs(const struct user_context *target, ...
#define release_segments(mm) do { } while (0)
#define forget_segments() do { } while (0)
/*
* Free current thread data structures etc..
*/
static inline void exit_thread(void)
{
}
/*
* Return saved PC of a blocked thread.
*/

7
arch/h8300/include/asm/processor.h
View file

@ -110,13 +110,6 @@ static inline void release_thread(struct task_struct *dead_task)
{
}
/*
* Free current thread data structures etc..
*/
static inline void exit_thread(void)
{
}
/*
* Return saved PC of a blocked thread.
*/

7
arch/hexagon/kernel/process.c
View file

@ -136,13 +136,6 @@ void release_thread(struct task_struct *dead_task)
{
}
/*
* Free any architecture-specific thread data structures, etc.
*/
void exit_thread(void)
{
}
/*
* Some archs flush debug and FPU info here
*/

1
arch/ia64/Kconfig
View file

@ -18,6 +18,7 @@ config IA64
select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI
select ARCH_MIGHT_HAVE_ACPI_PDC if ACPI
select HAVE_UNSTABLE_SCHED_CLOCK
select HAVE_EXIT_THREAD
select HAVE_IDE
select HAVE_OPROFILE
select HAVE_KPROBES

4
arch/ia64/kernel/perfmon.c
View file

@ -4543,8 +4543,8 @@ pfm_context_unload(pfm_context_t *ctx, void *arg, int count, struct pt_regs *reg
/*
* called only from exit_thread(): task == current
* we come here only if current has a context attached (loaded or masked)
* called only from exit_thread()
* we come here only if the task has a context attached (loaded or masked)
*/
void
pfm_exit_thread(struct task_struct *task)

14
arch/ia64/kernel/process.c
View file

@ -570,22 +570,22 @@ flush_thread (void)
}
/*
* Clean up state associated with current thread. This is called when
* Clean up state associated with a thread. This is called when
* the thread calls exit().
*/
void
exit_thread (void)
exit_thread (struct task_struct *tsk)
{
ia64_drop_fpu(current);
ia64_drop_fpu(tsk);
#ifdef CONFIG_PERFMON
/* if needed, stop monitoring and flush state to perfmon context */
if (current->thread.pfm_context)
pfm_exit_thread(current);
if (tsk->thread.pfm_context)
pfm_exit_thread(tsk);
/* free debug register resources */
if (current->thread.flags & IA64_THREAD_DBG_VALID)
pfm_release_debug_registers(current);
if (tsk->thread.flags & IA64_THREAD_DBG_VALID)
pfm_release_debug_registers(tsk);
#endif
}

9
arch/m32r/kernel/process.c
View file

@ -101,15 +101,6 @@ void show_regs(struct pt_regs * regs)
#endif
}
/*
* Free current thread data structures etc..
*/
void exit_thread(void)
{
/* Nothing to do. */
DPRINTK("pid = %d\n", current->pid);
}
void flush_thread(void)
{
DPRINTK("pid = %d\n", current->pid);

7
arch/m68k/include/asm/processor.h
View file

@ -153,13 +153,6 @@ static inline void release_thread(struct task_struct *dead_task)
{
}
/*
* Free current thread data structures etc..
*/
static inline void exit_thread(void)
{
}
extern unsigned long thread_saved_pc(struct task_struct *tsk);
unsigned long get_wchan(struct task_struct *p);

1
arch/metag/Kconfig
View file

@ -11,6 +11,7 @@ config METAG
select HAVE_DEBUG_KMEMLEAK
select HAVE_DEBUG_STACKOVERFLOW
select HAVE_DYNAMIC_FTRACE
select HAVE_EXIT_THREAD
select HAVE_FTRACE_MCOUNT_RECORD
select HAVE_FUNCTION_TRACER
select HAVE_KERNEL_BZIP2

2
arch/metag/include/asm/processor.h
View file

@ -134,8 +134,6 @@ static inline void release_thread(struct task_struct *dead_task)
#define copy_segments(tsk, mm) do { } while (0)
#define release_segments(mm) do { } while (0)
extern void exit_thread(void);
/*
* Return saved PC of a blocked thread.
*/

6
arch/metag/kernel/process.c
View file

@ -345,10 +345,10 @@ void flush_thread(void)
/*
* Free current thread data structures etc.
*/
void exit_thread(void)
void exit_thread(struct task_struct *tsk)
{
clear_fpu(&current->thread);
clear_dsp(&current->thread);
clear_fpu(&tsk->thread);
clear_dsp(&tsk->thread);
}
/* TODO: figure out how to unwind the kernel stack here to figure out

10
arch/microblaze/include/asm/processor.h
View file

@ -70,11 +70,6 @@ static inline void release_thread(struct task_struct *dead_task)
{
}
/* Free all resources held by a thread. */
static inline void exit_thread(void)
{
}
extern unsigned long thread_saved_pc(struct task_struct *t);
extern unsigned long get_wchan(struct task_struct *p);
@ -127,11 +122,6 @@ static inline void release_thread(struct task_struct *dead_task)
{
}
/* Free current thread data structures etc. */
static inline void exit_thread(void)
{
}
/* Return saved (kernel) PC of a blocked thread. */
# define thread_saved_pc(tsk) \
((tsk)->thread.regs ? (tsk)->thread.regs->r15 : 0)

1
arch/mips/Kbuild.platforms
View file

@ -11,6 +11,7 @@ platforms += cavium-octeon
platforms += cobalt
platforms += dec
platforms += emma
platforms += generic
platforms += jazz
platforms += jz4740
platforms += lantiq

63
arch/mips/Kconfig
View file

@ -64,6 +64,8 @@ config MIPS
select HAVE_IRQ_TIME_ACCOUNTING
select GENERIC_TIME_VSYSCALL
select ARCH_CLOCKSOURCE_DATA
select HANDLE_DOMAIN_IRQ
select HAVE_EXIT_THREAD
menu "Machine selection"
@ -71,6 +73,57 @@ choice
prompt "System type"
default SGI_IP22
config MIPS_GENERIC
bool "Generic board-agnostic MIPS kernel"
select BOOT_RAW
select BUILTIN_DTB
select CEVT_R4K
select CLKSRC_MIPS_GIC
select COMMON_CLK
select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_IRQ_EI
select CSRC_R4K
select DMA_PERDEV_COHERENT
select HW_HAS_PCI
select IRQ_MIPS_CPU
select LIBFDT
select MIPS_CPU_SCACHE
select MIPS_GIC
select MIPS_L1_CACHE_SHIFT_7
select NO_EXCEPT_FILL
select PCI_DRIVERS_GENERIC
select PINCTRL
select SMP_UP if SMP
select SYS_HAS_CPU_MIPS32_R1
select SYS_HAS_CPU_MIPS32_R2
select SYS_HAS_CPU_MIPS32_R6
select SYS_HAS_CPU_MIPS64_R1
select SYS_HAS_CPU_MIPS64_R2
select SYS_HAS_CPU_MIPS64_R6
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_HIGHMEM
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_SUPPORTS_MICROMIPS
select SYS_SUPPORTS_MIPS_CPS
select SYS_SUPPORTS_MIPS16
select SYS_SUPPORTS_MULTITHREADING
select SYS_SUPPORTS_RELOCATABLE
select SYS_SUPPORTS_SMARTMIPS
select USB_EHCI_BIG_ENDIAN_DESC if BIG_ENDIAN
select USB_EHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN
select USB_OHCI_BIG_ENDIAN_DESC if BIG_ENDIAN
select USB_OHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN
select USB_UHCI_BIG_ENDIAN_DESC if BIG_ENDIAN
select USB_UHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN
select USE_OF
help
Select this to build a kernel which aims to support multiple boards,
generally using a flattened device tree passed from the bootloader
using the boot protocol defined in the UHI (Unified Hosting
Interface) specification.
config MIPS_ALCHEMY
bool "Alchemy processor based machines"
select ARCH_PHYS_ADDR_T_64BIT
@ -977,6 +1030,7 @@ source "arch/mips/ath79/Kconfig"
source "arch/mips/bcm47xx/Kconfig"
source "arch/mips/bcm63xx/Kconfig"
source "arch/mips/bmips/Kconfig"
source "arch/mips/generic/Kconfig"
source "arch/mips/jazz/Kconfig"
source "arch/mips/jz4740/Kconfig"
source "arch/mips/lantiq/Kconfig"
@ -1086,6 +1140,10 @@ config DMA_MAYBE_COHERENT
select DMA_NONCOHERENT
bool
config DMA_PERDEV_COHERENT
bool
select DMA_MAYBE_COHERENT
config DMA_COHERENT
bool
@ -1981,7 +2039,7 @@ config CPU_SUPPORTS_UNCACHED_ACCELERATED
bool
config MIPS_PGD_C0_CONTEXT
bool
default y if 64BIT && CPU_MIPSR2 && !CPU_XLP
default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
#
# Set to y for ptrace access to watch registers.
@ -2270,7 +2328,7 @@ config MIPS_CMP
config MIPS_CPS
bool "MIPS Coherent Processing System support"
depends on SYS_SUPPORTS_MIPS_CPS && !CPU_MIPSR6
depends on SYS_SUPPORTS_MIPS_CPS
select MIPS_CM
select MIPS_CPC
select MIPS_CPS_PM if HOTPLUG_CPU
@ -2278,6 +2336,7 @@ config MIPS_CPS
select SMP
select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
select SYS_SUPPORTS_HOTPLUG_CPU
select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
select SYS_SUPPORTS_SMP
select WEAK_ORDERING
help

66
arch/mips/Makefile
View file

@ -138,7 +138,7 @@ cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS
-Wa,-mips32 -Wa,--trap
cflags-$(CONFIG_CPU_MIPS32_R2) += $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
-Wa,-mips32r2 -Wa,--trap
cflags-$(CONFIG_CPU_MIPS32_R6) += -march=mips32r6 -Wa,--trap
cflags-$(CONFIG_CPU_MIPS32_R6) += -march=mips32r6 -Wa,--trap -modd-spreg
cflags-$(CONFIG_CPU_MIPS64_R1) += $(call cc-option,-march=mips64,-mips64 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) \
-Wa,-mips64 -Wa,--trap
cflags-$(CONFIG_CPU_MIPS64_R2) += $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) \
@ -263,7 +263,14 @@ KBUILD_CPPFLAGS += -DVMLINUX_LOAD_ADDRESS=$(load-y)
KBUILD_CPPFLAGS += -DDATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)
bootvars-y = VMLINUX_LOAD_ADDRESS=$(load-y) \
VMLINUX_ENTRY_ADDRESS=$(entry-y)
VMLINUX_ENTRY_ADDRESS=$(entry-y) \
PLATFORM="$(platform-y)"
ifdef CONFIG_32BIT
bootvars-y += ADDR_BITS=32
endif
ifdef CONFIG_64BIT
bootvars-y += ADDR_BITS=64
endif
LDFLAGS += -m $(ld-emul)
@ -303,6 +310,11 @@ boot-y += uImage.gz
boot-y += uImage.lzma
boot-y += uImage.lzo
endif
boot-y += vmlinux.itb
boot-y += vmlinux.gz.itb
boot-y += vmlinux.bz2.itb
boot-y += vmlinux.lzma.itb
boot-y += vmlinux.lzo.itb
# compressed boot image targets (arch/mips/boot/compressed/)
bootz-y := vmlinuz
@ -413,4 +425,54 @@ define archhelp
echo ' dtbs_install - Install dtbs to $(INSTALL_DTBS_PATH)'
echo
echo ' These will be default as appropriate for a configured platform.'
echo
echo ' If you are targeting a system supported by generic kernels you may'
echo ' configure the kernel for a given architecture target like so:'
echo
echo ' {micro32,32,64}{r1,r2,r6}{el,}_defconfig <BOARDS="list of boards">'
echo
echo ' Otherwise, the following default configurations are available:'
endef
generic_config_dir = $(srctree)/arch/$(ARCH)/configs/generic
generic_defconfigs :=
#
# If the user generates a generic kernel configuration without specifying a
# list of boards to include the config fragments for, default to including all
# available board config fragments.
#
ifeq ($(BOARDS),)
BOARDS = $(patsubst board-%.config,%,$(notdir $(wildcard $(generic_config_dir)/board-*.config)))
endif
#
# Generic kernel configurations which merge generic_defconfig with the
# appropriate config fragments from arch/mips/configs/generic/, resulting in
# the ability to easily configure the kernel for a given architecture,
# endianness & set of boards without duplicating the needed configuration in
# hundreds of defconfig files.
#
define gen_generic_defconfigs
$(foreach bits,$(1),$(foreach rev,$(2),$(foreach endian,$(3),
target := $(bits)$(rev)$(filter el,$(endian))_defconfig
generic_defconfigs += $$(target)
$$(target): $(generic_config_dir)/$(bits)$(rev).config
$$(target): $(generic_config_dir)/$(endian).config
)))
endef
$(eval $(call gen_generic_defconfigs,32 64,r1 r2 r6,eb el))
$(eval $(call gen_generic_defconfigs,micro32,r2,eb el))
.PHONY: $(generic_defconfigs)
$(generic_defconfigs):
$(Q)$(CONFIG_SHELL) $(srctree)/scripts/kconfig/merge_config.sh \
-m -O $(objtree) $(srctree)/arch/$(ARCH)/configs/generic_defconfig $^ \
$(foreach board,$(BOARDS),$(generic_config_dir)/board-$(board).config)
$(Q)$(MAKE) olddefconfig
#
# Prevent generic merge_config rules attempting to merge single fragments
#
$(generic_config_dir)/%.config: ;

4
arch/mips/alchemy/common/dbdma.c
View file

@ -261,7 +261,7 @@ u32 au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
au1x_dma_chan_t *cp;
/*
* We do the intialization on the first channel allocation.
* We do the initialization on the first channel allocation.
* We have to wait because of the interrupt handler initialization
* which can't be done successfully during board set up.
*/
@ -964,7 +964,7 @@ u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr)
dp->dscr_source1 = dscr->dscr_source1;
dp->dscr_cmd1 = dscr->dscr_cmd1;
nbytes = dscr->dscr_cmd1;
/* Allow the caller to specifiy if an interrupt is generated */
/* Allow the caller to specify if an interrupt is generated */
dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
dp->dscr_cmd0 |= dscr->dscr_cmd0 | DSCR_CMD0_V;
ctp->chan_ptr->ddma_dbell = 0;

6
arch/mips/alchemy/common/setup.c
View file

@ -48,17 +48,17 @@ void __init plat_mem_setup(void)
clear_c0_config(1 << 19); /* Clear Config[OD] */
hw_coherentio = 0;
coherentio = 1;
coherentio = IO_COHERENCE_ENABLED;
switch (alchemy_get_cputype()) {
case ALCHEMY_CPU_AU1000:
case ALCHEMY_CPU_AU1500:
case ALCHEMY_CPU_AU1100:
coherentio = 0;
coherentio = IO_COHERENCE_DISABLED;
break;
case ALCHEMY_CPU_AU1200:
/* Au1200 AB USB does not support coherent memory */
if (0 == (read_c0_prid() & PRID_REV_MASK))
coherentio = 0;
coherentio = IO_COHERENCE_DISABLED;
break;
}

4
arch/mips/bmips/setup.c
View file

@ -149,8 +149,8 @@ void __init plat_mem_setup(void)
/* intended to somewhat resemble ARM; see Documentation/arm/Booting */
if (fw_arg0 == 0 && fw_arg1 == 0xffffffff)
dtb = phys_to_virt(fw_arg2);
else if (fw_arg0 == -2) /* UHI interface */
dtb = (void *)fw_arg1;
else if (fw_passed_dtb) /* UHI interface */
dtb = (void *)fw_passed_dtb;
else if (__dtb_start != __dtb_end)
dtb = (void *)__dtb_start;
else

66
arch/mips/boot/Makefile
View file

@ -100,3 +100,69 @@ $(obj)/uImage.lzo: $(obj)/vmlinux.bin.lzo FORCE
$(obj)/uImage: $(obj)/uImage.$(suffix-y)
@ln -sf $(notdir $<) $@
@echo ' Image $@ is ready'
#
# Flattened Image Tree (.itb) images
#
targets += vmlinux.itb
targets += vmlinux.gz.itb
targets += vmlinux.bz2.itb
targets += vmlinux.lzma.itb
targets += vmlinux.lzo.itb
ifeq ($(ADDR_BITS),32)
itb_addr_cells = 1
endif
ifeq ($(ADDR_BITS),64)
itb_addr_cells = 2
endif
quiet_cmd_cpp_its_S = ITS $@
cmd_cpp_its_S = $(CPP) $(cpp_flags) -P -C -o $@ $< \
-DKERNEL_NAME="\"Linux $(KERNELRELEASE)\"" \
-DVMLINUX_BINARY="\"$(3)\"" \
-DVMLINUX_COMPRESSION="\"$(2)\"" \
-DVMLINUX_LOAD_ADDRESS=$(VMLINUX_LOAD_ADDRESS) \
-DVMLINUX_ENTRY_ADDRESS=$(VMLINUX_ENTRY_ADDRESS) \
-DADDR_BITS=$(ADDR_BITS) \
-DADDR_CELLS=$(itb_addr_cells)
$(obj)/vmlinux.its: $(srctree)/arch/mips/$(PLATFORM)/vmlinux.its.S FORCE
$(call if_changed_dep,cpp_its_S,none,vmlinux.bin)
$(obj)/vmlinux.gz.its: $(srctree)/arch/mips/$(PLATFORM)/vmlinux.its.S FORCE
$(call if_changed_dep,cpp_its_S,gzip,vmlinux.bin.gz)
$(obj)/vmlinux.bz2.its: $(srctree)/arch/mips/$(PLATFORM)/vmlinux.its.S FORCE
$(call if_changed_dep,cpp_its_S,bzip2,vmlinux.bin.bz2)
$(obj)/vmlinux.lzma.its: $(srctree)/arch/mips/$(PLATFORM)/vmlinux.its.S FORCE
$(call if_changed_dep,cpp_its_S,lzma,vmlinux.bin.lzma)
$(obj)/vmlinux.lzo.its: $(srctree)/arch/mips/$(PLATFORM)/vmlinux.its.S FORCE
$(call if_changed_dep,cpp_its_S,lzo,vmlinux.bin.lzo)
quiet_cmd_itb-image = ITB $@
cmd_itb-image = \
env PATH="$(objtree)/scripts/dtc:$(PATH)" \
$(CONFIG_SHELL) $(MKIMAGE) \
-D "-I dts -O dtb -p 500 \
--include $(objtree)/arch/mips \
--warning no-unit_address_vs_reg" \
-f $(2) $@
$(obj)/vmlinux.itb: $(obj)/vmlinux.its $(obj)/vmlinux.bin FORCE
$(call if_changed,itb-image,$<)
$(obj)/vmlinux.gz.itb: $(obj)/vmlinux.gz.its $(obj)/vmlinux.bin.gz FORCE
$(call if_changed,itb-image,$<)
$(obj)/vmlinux.bz2.itb: $(obj)/vmlinux.bz2.its $(obj)/vmlinux.bin.bz2 FORCE
$(call if_changed,itb-image,$<)
$(obj)/vmlinux.lzma.itb: $(obj)/vmlinux.lzma.its $(obj)/vmlinux.bin.lzma FORCE
$(call if_changed,itb-image,$<)
$(obj)/vmlinux.lzo.itb: $(obj)/vmlinux.lzo.its $(obj)/vmlinux.bin.lzo FORCE
$(call if_changed,itb-image,$<)

14
arch/mips/cavium-octeon/executive/cvmx-interrupt-decodes.c
View file

@ -68,7 +68,7 @@ void __cvmx_interrupt_gmxx_rxx_int_en_enable(int index, int block)
gmx_rx_int_en.s.pause_drp = 1;
/* Skipping gmx_rx_int_en.s.reserved_16_18 */
/*gmx_rx_int_en.s.ifgerr = 1; */
/*gmx_rx_int_en.s.coldet = 1; // Collsion detect */
/*gmx_rx_int_en.s.coldet = 1; // Collision detect */
/*gmx_rx_int_en.s.falerr = 1; // False carrier error or extend error after slottime */
/*gmx_rx_int_en.s.rsverr = 1; // RGMII reserved opcodes */
/*gmx_rx_int_en.s.pcterr = 1; // Bad Preamble / Protocol */
@ -89,7 +89,7 @@ void __cvmx_interrupt_gmxx_rxx_int_en_enable(int index, int block)
/*gmx_rx_int_en.s.phy_spd = 1; */
/*gmx_rx_int_en.s.phy_link = 1; */
/*gmx_rx_int_en.s.ifgerr = 1; */
/*gmx_rx_int_en.s.coldet = 1; // Collsion detect */
/*gmx_rx_int_en.s.coldet = 1; // Collision detect */
/*gmx_rx_int_en.s.falerr = 1; // False carrier error or extend error after slottime */
/*gmx_rx_int_en.s.rsverr = 1; // RGMII reserved opcodes */
/*gmx_rx_int_en.s.pcterr = 1; // Bad Preamble / Protocol */
@ -112,7 +112,7 @@ void __cvmx_interrupt_gmxx_rxx_int_en_enable(int index, int block)
/*gmx_rx_int_en.s.phy_spd = 1; */
/*gmx_rx_int_en.s.phy_link = 1; */
/*gmx_rx_int_en.s.ifgerr = 1; */
/*gmx_rx_int_en.s.coldet = 1; // Collsion detect */
/*gmx_rx_int_en.s.coldet = 1; // Collision detect */
/*gmx_rx_int_en.s.falerr = 1; // False carrier error or extend error after slottime */
/*gmx_rx_int_en.s.rsverr = 1; // RGMII reserved opcodes */
/*gmx_rx_int_en.s.pcterr = 1; // Bad Preamble / Protocol */
@ -134,7 +134,7 @@ void __cvmx_interrupt_gmxx_rxx_int_en_enable(int index, int block)
/*gmx_rx_int_en.s.phy_spd = 1; */
/*gmx_rx_int_en.s.phy_link = 1; */
/*gmx_rx_int_en.s.ifgerr = 1; */
/*gmx_rx_int_en.s.coldet = 1; // Collsion detect */
/*gmx_rx_int_en.s.coldet = 1; // Collision detect */
/*gmx_rx_int_en.s.falerr = 1; // False carrier error or extend error after slottime */
/*gmx_rx_int_en.s.rsverr = 1; // RGMII reserved opcodes */
/*gmx_rx_int_en.s.pcterr = 1; // Bad Preamble / Protocol */
@ -156,7 +156,7 @@ void __cvmx_interrupt_gmxx_rxx_int_en_enable(int index, int block)
/*gmx_rx_int_en.s.phy_spd = 1; */
/*gmx_rx_int_en.s.phy_link = 1; */
/*gmx_rx_int_en.s.ifgerr = 1; */
/*gmx_rx_int_en.s.coldet = 1; // Collsion detect */
/*gmx_rx_int_en.s.coldet = 1; // Collision detect */
/*gmx_rx_int_en.s.falerr = 1; // False carrier error or extend error after slottime */
/*gmx_rx_int_en.s.rsverr = 1; // RGMII reserved opcodes */
/*gmx_rx_int_en.s.pcterr = 1; // Bad Preamble / Protocol */
@ -179,7 +179,7 @@ void __cvmx_interrupt_gmxx_rxx_int_en_enable(int index, int block)
/*gmx_rx_int_en.s.phy_spd = 1; */
/*gmx_rx_int_en.s.phy_link = 1; */
/*gmx_rx_int_en.s.ifgerr = 1; */
/*gmx_rx_int_en.s.coldet = 1; // Collsion detect */
/*gmx_rx_int_en.s.coldet = 1; // Collision detect */
/*gmx_rx_int_en.s.falerr = 1; // False carrier error or extend error after slottime */
/*gmx_rx_int_en.s.rsverr = 1; // RGMII reserved opcodes */
/*gmx_rx_int_en.s.pcterr = 1; // Bad Preamble / Protocol */
@ -209,7 +209,7 @@ void __cvmx_interrupt_gmxx_rxx_int_en_enable(int index, int block)
gmx_rx_int_en.s.pause_drp = 1;
/* Skipping gmx_rx_int_en.s.reserved_16_18 */
/*gmx_rx_int_en.s.ifgerr = 1; */
/*gmx_rx_int_en.s.coldet = 1; // Collsion detect */
/*gmx_rx_int_en.s.coldet = 1; // Collision detect */
/*gmx_rx_int_en.s.falerr = 1; // False carrier error or extend error after slottime */
/*gmx_rx_int_en.s.rsverr = 1; // RGMII reserved opcodes */
/*gmx_rx_int_en.s.pcterr = 1; // Bad Preamble / Protocol */

2
arch/mips/cavium-octeon/executive/cvmx-pko.c
View file

@ -189,7 +189,7 @@ void cvmx_pko_initialize_global(void)
/*
* Set the size of the PKO command buffers to an odd number of
* 64bit words. This allows the normal two word send to stay
* aligned and never span a comamnd word buffer.
* aligned and never span a command word buffer.
*/
config.u64 = 0;
config.s.pool = CVMX_FPA_OUTPUT_BUFFER_POOL;

2
arch/mips/cavium-octeon/smp.c
View file

@ -331,7 +331,7 @@ static int octeon_update_boot_vector(unsigned int cpu)
}
if (!(avail_coremask & (1 << coreid))) {
/* core not available, assume, that catched by simple-executive */
/* core not available, assume, that caught by simple-executive */
cvmx_write_csr(CVMX_CIU_PP_RST, 1 << coreid);
cvmx_write_csr(CVMX_CIU_PP_RST, 0);
}

2
arch/mips/configs/generic/32r1.config Normal file
View file

@ -0,0 +1,2 @@
CONFIG_CPU_MIPS32_R1=y
CONFIG_HIGHMEM=y

3
arch/mips/configs/generic/32r2.config Normal file
View file

@ -0,0 +1,3 @@
CONFIG_CPU_MIPS32_R2=y
CONFIG_MIPS_O32_FP64_SUPPORT=y
CONFIG_HIGHMEM=y

2
arch/mips/configs/generic/32r6.config Normal file
View file

@ -0,0 +1,2 @@
CONFIG_CPU_MIPS32_R6=y
CONFIG_HIGHMEM=y

4
arch/mips/configs/generic/64r1.config Normal file
View file

@ -0,0 +1,4 @@
CONFIG_CPU_MIPS64_R1=y
CONFIG_64BIT=y
CONFIG_MIPS32_O32=y
CONFIG_MIPS32_N32=y

5
arch/mips/configs/generic/64r2.config Normal file
View file

@ -0,0 +1,5 @@
CONFIG_CPU_MIPS64_R2=y
CONFIG_MIPS_O32_FP64_SUPPORT=y
CONFIG_64BIT=y
CONFIG_MIPS32_O32=y
CONFIG_MIPS32_N32=y

4
arch/mips/configs/generic/64r6.config Normal file
View file

@ -0,0 +1,4 @@
CONFIG_CPU_MIPS64_R6=y
CONFIG_64BIT=y
CONFIG_MIPS32_O32=y
CONFIG_MIPS32_N32=y

30
arch/mips/configs/generic/board-ranchu.config Normal file
View file

@ -0,0 +1,30 @@
CONFIG_VIRT_BOARD_RANCHU=y
CONFIG_BATTERY_GOLDFISH=y
CONFIG_FB=y
CONFIG_FB_GOLDFISH=y
CONFIG_GOLDFISH=y
CONFIG_STAGING=y
CONFIG_GOLDFISH_AUDIO=y
CONFIG_GOLDFISH_PIC=y
CONFIG_GOLDFISH_PIPE=y
CONFIG_GOLDFISH_TTY=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_GOLDFISH=y
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_KEYBOARD=y
CONFIG_KEYBOARD_GOLDFISH_EVENTS=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_POWER_SUPPLY=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_POWER_RESET_SYSCON_POWEROFF=y
CONFIG_VIRTIO_BLK=y
CONFIG_VIRTIO_CONSOLE=y
CONFIG_VIRTIO_MMIO=y
CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y
CONFIG_NETDEVICES=y
CONFIG_VIRTIO_NET=y

1
arch/mips/configs/generic/eb.config Normal file
View file

@ -0,0 +1 @@
CONFIG_CPU_BIG_ENDIAN=y

1
arch/mips/configs/generic/el.config Normal file
View file

@ -0,0 +1 @@
CONFIG_CPU_LITTLE_ENDIAN=y

4
arch/mips/configs/generic/micro32r2.config Normal file
View file

@ -0,0 +1,4 @@
CONFIG_CPU_MIPS32_R2=y
CONFIG_CPU_MICROMIPS=y
CONFIG_MIPS_O32_FP64_SUPPORT=y
CONFIG_HIGHMEM=y

96
arch/mips/configs/generic_defconfig Normal file
View file

@ -0,0 +1,96 @@
CONFIG_MIPS_GENERIC=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_MIPS_CPS=y
CONFIG_CPU_HAS_MSA=y
CONFIG_HIGHMEM=y
CONFIG_NR_CPUS=16
CONFIG_MIPS_O32_FP64_SUPPORT=y
CONFIG_SYSVIPC=y
CONFIG_NO_HZ_IDLE=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_MEMCG=y
CONFIG_MEMCG_SWAP=y
CONFIG_BLK_CGROUP=y
CONFIG_CFS_BANDWIDTH=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_CGROUP_PIDS=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CPUSETS=y
CONFIG_CGROUP_DEVICE=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_NAMESPACES=y
CONFIG_USER_NS=y
CONFIG_SCHED_AUTOGROUP=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_BPF_SYSCALL=y
CONFIG_USERFAULTFD=y
CONFIG_EMBEDDED=y
# CONFIG_SLUB_DEBUG is not set
# CONFIG_COMPAT_BRK is not set
CONFIG_CC_STACKPROTECTOR_REGULAR=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_TRIM_UNUSED_KSYMS=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_NETFILTER=y
# CONFIG_WIRELESS is not set
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_SCSI=y
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO is not set
CONFIG_HW_RANDOM=y
# CONFIG_HWMON is not set
CONFIG_MFD_SYSCON=y
CONFIG_HID_A4TECH=y
CONFIG_HID_APPLE=y
CONFIG_HID_BELKIN=y
CONFIG_HID_CHERRY=y
CONFIG_HID_CHICONY=y
CONFIG_HID_CYPRESS=y
CONFIG_HID_EZKEY=y
CONFIG_HID_KENSINGTON=y
CONFIG_HID_LOGITECH=y
CONFIG_HID_MICROSOFT=y
CONFIG_HID_MONTEREY=y
# CONFIG_USB_SUPPORT is not set
# CONFIG_MIPS_PLATFORM_DEVICES is not set
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
CONFIG_EXT4_ENCRYPTION=y
CONFIG_FANOTIFY=y
CONFIG_FUSE_FS=y
CONFIG_CUSE=y
CONFIG_OVERLAY_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
# CONFIG_MISC_FILESYSTEMS is not set
CONFIG_NFS_FS=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_NFS_V4_1=y
CONFIG_NFS_V4_2=y
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_INFO_REDUCED=y
CONFIG_DEBUG_FS=y
# CONFIG_SCHED_DEBUG is not set
# CONFIG_FTRACE is not set
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE="earlycon"
# CONFIG_XZ_DEC_X86 is not set
# CONFIG_XZ_DEC_POWERPC is not set
# CONFIG_XZ_DEC_IA64 is not set
# CONFIG_XZ_DEC_ARM is not set
# CONFIG_XZ_DEC_ARMTHUMB is not set
# CONFIG_XZ_DEC_SPARC is not set

314
arch/mips/configs/ranchu32r5_defconfig Normal file
View file

@ -0,0 +1,314 @@
CONFIG_MIPS_GENERIC=y
CONFIG_VIRT_BOARD_RANCHU=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_MIPS32_R2=y
CONFIG_MIPS_CPS=y
CONFIG_CPU_HAS_MSA=y
CONFIG_HIGHMEM=y
CONFIG_KSM=y
CONFIG_CMA=y
CONFIG_NR_CPUS=16
CONFIG_PREEMPT=y
CONFIG_MIPS_O32_FP64_SUPPORT=y
# CONFIG_USELIB is not set
CONFIG_AUDIT=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_TASKSTATS=y
CONFIG_TASK_DELAY_ACCT=y
CONFIG_TASK_XACCT=y
CONFIG_TASK_IO_ACCOUNTING=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_CGROUP_DEBUG=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CGROUP_PIDS=y
CONFIG_CGROUP_DEVICE=y
CONFIG_CPUSETS=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_MEMCG=y
CONFIG_MEMCG_SWAP=y
CONFIG_CFS_BANDWIDTH=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_BLK_CGROUP=y
CONFIG_NAMESPACES=y
CONFIG_USER_NS=y
CONFIG_SCHED_AUTOGROUP=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_KALLSYMS_ALL=y
CONFIG_BPF_SYSCALL=y
CONFIG_USERFAULTFD=y
CONFIG_EMBEDDED=y
CONFIG_PERF_EVENTS=y
# CONFIG_SLUB_DEBUG is not set
# CONFIG_COMPAT_BRK is not set
CONFIG_CC_STACKPROTECTOR_REGULAR=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODVERSIONS=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_PM_AUTOSLEEP=y
CONFIG_PM_WAKELOCKS=y
CONFIG_PM_WAKELOCKS_LIMIT=0
# CONFIG_PM_WAKELOCKS_GC is not set
CONFIG_PM_DEBUG=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_XFRM_USER=y
CONFIG_NET_KEY=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_MULTIPLE_TABLES=y
CONFIG_INET_ESP=y
# CONFIG_INET_LRO is not set
CONFIG_INET_DIAG_DESTROY=y
CONFIG_IPV6_ROUTER_PREF=y
CONFIG_IPV6_ROUTE_INFO=y
CONFIG_IPV6_OPTIMISTIC_DAD=y
CONFIG_INET6_AH=y
CONFIG_INET6_ESP=y
CONFIG_INET6_IPCOMP=y
CONFIG_IPV6_MIP6=y
CONFIG_IPV6_MULTIPLE_TABLES=y
CONFIG_NETFILTER=y
CONFIG_NF_CONNTRACK=y
CONFIG_NF_CONNTRACK_SECMARK=y
CONFIG_NF_CONNTRACK_EVENTS=y
CONFIG_NF_CT_PROTO_DCCP=y
CONFIG_NF_CT_PROTO_SCTP=y
CONFIG_NF_CT_PROTO_UDPLITE=y
CONFIG_NF_CONNTRACK_AMANDA=y
CONFIG_NF_CONNTRACK_FTP=y
CONFIG_NF_CONNTRACK_H323=y
CONFIG_NF_CONNTRACK_IRC=y
CONFIG_NF_CONNTRACK_NETBIOS_NS=y
CONFIG_NF_CONNTRACK_PPTP=y
CONFIG_NF_CONNTRACK_SANE=y
CONFIG_NF_CONNTRACK_TFTP=y
CONFIG_NF_CT_NETLINK=y
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
CONFIG_NETFILTER_XT_TARGET_MARK=y
CONFIG_NETFILTER_XT_TARGET_NFLOG=y
CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
CONFIG_NETFILTER_XT_TARGET_TPROXY=y
CONFIG_NETFILTER_XT_TARGET_TRACE=y
CONFIG_NETFILTER_XT_TARGET_SECMARK=y
CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
CONFIG_NETFILTER_XT_MATCH_COMMENT=y
CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
CONFIG_NETFILTER_XT_MATCH_HELPER=y
CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
CONFIG_NETFILTER_XT_MATCH_LENGTH=y
CONFIG_NETFILTER_XT_MATCH_LIMIT=y
CONFIG_NETFILTER_XT_MATCH_MAC=y
CONFIG_NETFILTER_XT_MATCH_MARK=y
CONFIG_NETFILTER_XT_MATCH_POLICY=y
CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
CONFIG_NETFILTER_XT_MATCH_QUOTA=y
CONFIG_NETFILTER_XT_MATCH_SOCKET=y
CONFIG_NETFILTER_XT_MATCH_STATE=y
CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
CONFIG_NETFILTER_XT_MATCH_STRING=y
CONFIG_NETFILTER_XT_MATCH_TIME=y
CONFIG_NETFILTER_XT_MATCH_U32=y
CONFIG_NF_CONNTRACK_IPV4=y
CONFIG_IP_NF_IPTABLES=y
CONFIG_IP_NF_MATCH_AH=y
CONFIG_IP_NF_MATCH_ECN=y
CONFIG_IP_NF_MATCH_TTL=y
CONFIG_IP_NF_FILTER=y
CONFIG_IP_NF_TARGET_REJECT=y
CONFIG_IP_NF_NAT=y
CONFIG_IP_NF_TARGET_MASQUERADE=y
CONFIG_IP_NF_TARGET_NETMAP=y
CONFIG_IP_NF_TARGET_REDIRECT=y
CONFIG_IP_NF_MANGLE=y
CONFIG_IP_NF_RAW=y
CONFIG_IP_NF_SECURITY=y
CONFIG_IP_NF_ARPTABLES=y
CONFIG_IP_NF_ARPFILTER=y
CONFIG_IP_NF_ARP_MANGLE=y
CONFIG_NF_CONNTRACK_IPV6=y
CONFIG_IP6_NF_IPTABLES=y
CONFIG_IP6_NF_FILTER=y
CONFIG_IP6_NF_TARGET_REJECT=y
CONFIG_IP6_NF_MANGLE=y
CONFIG_IP6_NF_RAW=y
CONFIG_NET_SCHED=y
CONFIG_NET_SCH_HTB=y
CONFIG_NET_CLS_U32=y
CONFIG_NET_EMATCH=y
CONFIG_NET_EMATCH_U32=y
CONFIG_NET_CLS_ACT=y
CONFIG_DNS_RESOLVER=y
CONFIG_CFG80211=y
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_DMA_CMA=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_VIRTIO_BLK=y
CONFIG_SCSI=y
CONFIG_MD=y
CONFIG_BLK_DEV_DM=y
CONFIG_DM_CRYPT=y
CONFIG_DM_UEVENT=y
CONFIG_DM_VERITY=y
CONFIG_DM_VERITY_FEC=y
CONFIG_NETDEVICES=y
CONFIG_TUN=y
CONFIG_VIRTIO_NET=y
CONFIG_PPP=y
CONFIG_PPP_BSDCOMP=y
CONFIG_PPP_DEFLATE=y
CONFIG_PPP_MPPE=y
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GOLDFISH_EVENTS=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_JOYSTICK=y
CONFIG_INPUT_TABLET=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=y
CONFIG_INPUT_GPIO=y
# CONFIG_SERIO_I8042 is not set
CONFIG_SERIO_LIBPS2=y
# CONFIG_VT is not set
# CONFIG_LEGACY_PTYS is not set
CONFIG_GOLDFISH_TTY=y
# CONFIG_DEVMEM is not set
# CONFIG_DEVKMEM is not set
CONFIG_VIRTIO_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_VIRTIO=y
CONFIG_BATTERY_GOLDFISH=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_POWER_RESET_SYSCON_POWEROFF=y
# CONFIG_HWMON is not set
CONFIG_MEDIA_SUPPORT=y
CONFIG_FB=y
CONFIG_FB_GOLDFISH=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_HIDRAW=y
CONFIG_UHID=y
CONFIG_HID_A4TECH=y
CONFIG_HID_ACRUX=y
CONFIG_HID_ACRUX_FF=y
CONFIG_HID_APPLE=y
CONFIG_HID_BELKIN=y
CONFIG_HID_CHERRY=y
CONFIG_HID_CHICONY=y
CONFIG_HID_PRODIKEYS=y
CONFIG_HID_CYPRESS=y
CONFIG_HID_DRAGONRISE=y
CONFIG_DRAGONRISE_FF=y
CONFIG_HID_EMS_FF=y
CONFIG_HID_ELECOM=y
CONFIG_HID_EZKEY=y
CONFIG_HID_KEYTOUCH=y
CONFIG_HID_KYE=y
CONFIG_HID_WALTOP=y
CONFIG_HID_GYRATION=y
CONFIG_HID_TWINHAN=y
CONFIG_HID_KENSINGTON=y
CONFIG_HID_LCPOWER=y
CONFIG_HID_LOGITECH=y
CONFIG_HID_LOGITECH_DJ=y
CONFIG_LOGITECH_FF=y
CONFIG_LOGIRUMBLEPAD2_FF=y
CONFIG_LOGIG940_FF=y
# CONFIG_LOGIWHEELS_FF is not set
CONFIG_HID_MAGICMOUSE=y
CONFIG_HID_MICROSOFT=y
CONFIG_HID_MONTEREY=y
CONFIG_HID_MULTITOUCH=y
CONFIG_HID_ORTEK=y
CONFIG_HID_PANTHERLORD=y
CONFIG_PANTHERLORD_FF=y
CONFIG_HID_PETALYNX=y
CONFIG_HID_PICOLCD=y
CONFIG_HID_PRIMAX=y
CONFIG_HID_SAITEK=y
CONFIG_HID_SAMSUNG=y
CONFIG_HID_SPEEDLINK=y
CONFIG_HID_SUNPLUS=y
CONFIG_HID_GREENASIA=y
CONFIG_GREENASIA_FF=y
CONFIG_HID_SMARTJOYPLUS=y
CONFIG_SMARTJOYPLUS_FF=y
CONFIG_HID_TIVO=y
CONFIG_HID_TOPSEED=y
CONFIG_HID_THRUSTMASTER=y
CONFIG_HID_WACOM=y
CONFIG_HID_WIIMOTE=y
CONFIG_HID_ZEROPLUS=y
CONFIG_HID_ZYDACRON=y
# CONFIG_USB_SUPPORT is not set
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_GOLDFISH=y
CONFIG_VIRTIO_MMIO=y
CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y
CONFIG_STAGING=y
CONFIG_ASHMEM=y
CONFIG_ANDROID_LOW_MEMORY_KILLER=y
CONFIG_SYNC=y
CONFIG_ION=y
CONFIG_GOLDFISH_AUDIO=y
CONFIG_GOLDFISH_SYNC=y
# CONFIG_MIPS_PLATFORM_DEVICES is not set
CONFIG_GOLDFISH=y
CONFIG_GOLDFISH_PIPE=y
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_GOLDFISH_PIC=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
CONFIG_EXT4_ENCRYPTION=y
CONFIG_FANOTIFY=y
CONFIG_QUOTA=y
CONFIG_QFMT_V2=y
CONFIG_FUSE_FS=y
CONFIG_CUSE=y
CONFIG_OVERLAY_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_CONFIGFS_FS=y
CONFIG_SDCARD_FS=y
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_INFO_REDUCED=y
CONFIG_DEBUG_FS=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_PANIC_TIMEOUT=5
# CONFIG_SCHED_DEBUG is not set
CONFIG_SCHEDSTATS=y
CONFIG_TIMER_STATS=y
# CONFIG_FTRACE is not set
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE="earlycon"
CONFIG_SECURITY=y
CONFIG_SECURITY_NETWORK=y
CONFIG_SECURITY_SELINUX=y
# CONFIG_XZ_DEC_X86 is not set
# CONFIG_XZ_DEC_POWERPC is not set
# CONFIG_XZ_DEC_IA64 is not set
# CONFIG_XZ_DEC_ARM is not set
# CONFIG_XZ_DEC_ARMTHUMB is not set
# CONFIG_XZ_DEC_SPARC is not set

313
arch/mips/configs/ranchu32r6_defconfig Normal file
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CONFIG_MIPS_GENERIC=y
CONFIG_VIRT_BOARD_RANCHU=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_MIPS32_R6=y
CONFIG_MIPS_CPS=y
CONFIG_CPU_HAS_MSA=y
CONFIG_HIGHMEM=y
CONFIG_KSM=y
CONFIG_CMA=y
CONFIG_NR_CPUS=16
CONFIG_PREEMPT=y
# CONFIG_USELIB is not set
CONFIG_AUDIT=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_TASKSTATS=y
CONFIG_TASK_DELAY_ACCT=y
CONFIG_TASK_XACCT=y
CONFIG_TASK_IO_ACCOUNTING=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_CGROUP_DEBUG=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CGROUP_PIDS=y
CONFIG_CGROUP_DEVICE=y
CONFIG_CPUSETS=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_MEMCG=y
CONFIG_MEMCG_SWAP=y
CONFIG_CFS_BANDWIDTH=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_BLK_CGROUP=y
CONFIG_NAMESPACES=y
CONFIG_USER_NS=y
CONFIG_SCHED_AUTOGROUP=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_KALLSYMS_ALL=y
CONFIG_BPF_SYSCALL=y
CONFIG_USERFAULTFD=y
CONFIG_EMBEDDED=y
CONFIG_PERF_EVENTS=y
# CONFIG_SLUB_DEBUG is not set
# CONFIG_COMPAT_BRK is not set
CONFIG_CC_STACKPROTECTOR_REGULAR=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODVERSIONS=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_PM_AUTOSLEEP=y
CONFIG_PM_WAKELOCKS=y
CONFIG_PM_WAKELOCKS_LIMIT=0
# CONFIG_PM_WAKELOCKS_GC is not set
CONFIG_PM_DEBUG=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_XFRM_USER=y
CONFIG_NET_KEY=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_MULTIPLE_TABLES=y
CONFIG_INET_ESP=y
# CONFIG_INET_LRO is not set
CONFIG_INET_DIAG_DESTROY=y
CONFIG_IPV6_ROUTER_PREF=y
CONFIG_IPV6_ROUTE_INFO=y
CONFIG_IPV6_OPTIMISTIC_DAD=y
CONFIG_INET6_AH=y
CONFIG_INET6_ESP=y
CONFIG_INET6_IPCOMP=y
CONFIG_IPV6_MIP6=y
CONFIG_IPV6_MULTIPLE_TABLES=y
CONFIG_NETFILTER=y
CONFIG_NF_CONNTRACK=y
CONFIG_NF_CONNTRACK_SECMARK=y
CONFIG_NF_CONNTRACK_EVENTS=y
CONFIG_NF_CT_PROTO_DCCP=y
CONFIG_NF_CT_PROTO_SCTP=y
CONFIG_NF_CT_PROTO_UDPLITE=y
CONFIG_NF_CONNTRACK_AMANDA=y
CONFIG_NF_CONNTRACK_FTP=y
CONFIG_NF_CONNTRACK_H323=y
CONFIG_NF_CONNTRACK_IRC=y
CONFIG_NF_CONNTRACK_NETBIOS_NS=y
CONFIG_NF_CONNTRACK_PPTP=y
CONFIG_NF_CONNTRACK_SANE=y
CONFIG_NF_CONNTRACK_TFTP=y
CONFIG_NF_CT_NETLINK=y
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
CONFIG_NETFILTER_XT_TARGET_MARK=y
CONFIG_NETFILTER_XT_TARGET_NFLOG=y
CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
CONFIG_NETFILTER_XT_TARGET_TPROXY=y
CONFIG_NETFILTER_XT_TARGET_TRACE=y
CONFIG_NETFILTER_XT_TARGET_SECMARK=y
CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
CONFIG_NETFILTER_XT_MATCH_COMMENT=y
CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
CONFIG_NETFILTER_XT_MATCH_HELPER=y
CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
CONFIG_NETFILTER_XT_MATCH_LENGTH=y
CONFIG_NETFILTER_XT_MATCH_LIMIT=y
CONFIG_NETFILTER_XT_MATCH_MAC=y
CONFIG_NETFILTER_XT_MATCH_MARK=y
CONFIG_NETFILTER_XT_MATCH_POLICY=y
CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
CONFIG_NETFILTER_XT_MATCH_QUOTA=y
CONFIG_NETFILTER_XT_MATCH_SOCKET=y
CONFIG_NETFILTER_XT_MATCH_STATE=y
CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
CONFIG_NETFILTER_XT_MATCH_STRING=y
CONFIG_NETFILTER_XT_MATCH_TIME=y
CONFIG_NETFILTER_XT_MATCH_U32=y
CONFIG_NF_CONNTRACK_IPV4=y
CONFIG_IP_NF_IPTABLES=y
CONFIG_IP_NF_MATCH_AH=y
CONFIG_IP_NF_MATCH_ECN=y
CONFIG_IP_NF_MATCH_TTL=y
CONFIG_IP_NF_FILTER=y
CONFIG_IP_NF_TARGET_REJECT=y
CONFIG_IP_NF_NAT=y
CONFIG_IP_NF_TARGET_MASQUERADE=y
CONFIG_IP_NF_TARGET_NETMAP=y
CONFIG_IP_NF_TARGET_REDIRECT=y
CONFIG_IP_NF_MANGLE=y
CONFIG_IP_NF_RAW=y
CONFIG_IP_NF_SECURITY=y
CONFIG_IP_NF_ARPTABLES=y
CONFIG_IP_NF_ARPFILTER=y
CONFIG_IP_NF_ARP_MANGLE=y
CONFIG_NF_CONNTRACK_IPV6=y
CONFIG_IP6_NF_IPTABLES=y
CONFIG_IP6_NF_FILTER=y
CONFIG_IP6_NF_TARGET_REJECT=y
CONFIG_IP6_NF_MANGLE=y
CONFIG_IP6_NF_RAW=y
CONFIG_NET_SCHED=y
CONFIG_NET_SCH_HTB=y
CONFIG_NET_CLS_U32=y
CONFIG_NET_EMATCH=y
CONFIG_NET_EMATCH_U32=y
CONFIG_NET_CLS_ACT=y
CONFIG_DNS_RESOLVER=y
CONFIG_CFG80211=y
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_DMA_CMA=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_VIRTIO_BLK=y
CONFIG_SCSI=y
CONFIG_MD=y
CONFIG_BLK_DEV_DM=y
CONFIG_DM_CRYPT=y
CONFIG_DM_UEVENT=y
CONFIG_DM_VERITY=y
CONFIG_DM_VERITY_FEC=y
CONFIG_NETDEVICES=y
CONFIG_TUN=y
CONFIG_VIRTIO_NET=y
CONFIG_PPP=y
CONFIG_PPP_BSDCOMP=y
CONFIG_PPP_DEFLATE=y
CONFIG_PPP_MPPE=y
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GOLDFISH_EVENTS=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_JOYSTICK=y
CONFIG_INPUT_TABLET=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=y
CONFIG_INPUT_GPIO=y
# CONFIG_SERIO_I8042 is not set
CONFIG_SERIO_LIBPS2=y
# CONFIG_VT is not set
# CONFIG_LEGACY_PTYS is not set
CONFIG_GOLDFISH_TTY=y
# CONFIG_DEVMEM is not set
# CONFIG_DEVKMEM is not set
CONFIG_VIRTIO_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_VIRTIO=y
CONFIG_BATTERY_GOLDFISH=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_POWER_RESET_SYSCON_POWEROFF=y
# CONFIG_HWMON is not set
CONFIG_MEDIA_SUPPORT=y
CONFIG_FB=y
CONFIG_FB_GOLDFISH=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_HIDRAW=y
CONFIG_UHID=y
CONFIG_HID_A4TECH=y
CONFIG_HID_ACRUX=y
CONFIG_HID_ACRUX_FF=y
CONFIG_HID_APPLE=y
CONFIG_HID_BELKIN=y
CONFIG_HID_CHERRY=y
CONFIG_HID_CHICONY=y
CONFIG_HID_PRODIKEYS=y
CONFIG_HID_CYPRESS=y
CONFIG_HID_DRAGONRISE=y
CONFIG_DRAGONRISE_FF=y
CONFIG_HID_EMS_FF=y
CONFIG_HID_ELECOM=y
CONFIG_HID_EZKEY=y
CONFIG_HID_KEYTOUCH=y
CONFIG_HID_KYE=y
CONFIG_HID_WALTOP=y
CONFIG_HID_GYRATION=y
CONFIG_HID_TWINHAN=y
CONFIG_HID_KENSINGTON=y
CONFIG_HID_LCPOWER=y
CONFIG_HID_LOGITECH=y
CONFIG_HID_LOGITECH_DJ=y
CONFIG_LOGITECH_FF=y
CONFIG_LOGIRUMBLEPAD2_FF=y
CONFIG_LOGIG940_FF=y
# CONFIG_LOGIWHEELS_FF is not set
CONFIG_HID_MAGICMOUSE=y
CONFIG_HID_MICROSOFT=y
CONFIG_HID_MONTEREY=y
CONFIG_HID_MULTITOUCH=y
CONFIG_HID_ORTEK=y
CONFIG_HID_PANTHERLORD=y
CONFIG_PANTHERLORD_FF=y
CONFIG_HID_PETALYNX=y
CONFIG_HID_PICOLCD=y
CONFIG_HID_PRIMAX=y
CONFIG_HID_SAITEK=y
CONFIG_HID_SAMSUNG=y
CONFIG_HID_SPEEDLINK=y
CONFIG_HID_SUNPLUS=y
CONFIG_HID_GREENASIA=y
CONFIG_GREENASIA_FF=y
CONFIG_HID_SMARTJOYPLUS=y
CONFIG_SMARTJOYPLUS_FF=y
CONFIG_HID_TIVO=y
CONFIG_HID_TOPSEED=y
CONFIG_HID_THRUSTMASTER=y
CONFIG_HID_WACOM=y
CONFIG_HID_WIIMOTE=y
CONFIG_HID_ZEROPLUS=y
CONFIG_HID_ZYDACRON=y
# CONFIG_USB_SUPPORT is not set
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_GOLDFISH=y
CONFIG_VIRTIO_MMIO=y
CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y
CONFIG_STAGING=y
CONFIG_ASHMEM=y
CONFIG_ANDROID_LOW_MEMORY_KILLER=y
CONFIG_SYNC=y
CONFIG_ION=y
CONFIG_GOLDFISH_AUDIO=y
CONFIG_GOLDFISH_SYNC=y
# CONFIG_MIPS_PLATFORM_DEVICES is not set
CONFIG_GOLDFISH=y
CONFIG_GOLDFISH_PIPE=y
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_GOLDFISH_PIC=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
CONFIG_EXT4_ENCRYPTION=y
CONFIG_FANOTIFY=y
CONFIG_QUOTA=y
CONFIG_QFMT_V2=y
CONFIG_FUSE_FS=y
CONFIG_CUSE=y
CONFIG_OVERLAY_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_CONFIGFS_FS=y
CONFIG_SDCARD_FS=y
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_INFO_REDUCED=y
CONFIG_DEBUG_FS=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_PANIC_TIMEOUT=5
# CONFIG_SCHED_DEBUG is not set
CONFIG_SCHEDSTATS=y
CONFIG_TIMER_STATS=y
# CONFIG_FTRACE is not set
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE="earlycon"
CONFIG_SECURITY=y
CONFIG_SECURITY_NETWORK=y
CONFIG_SECURITY_SELINUX=y
# CONFIG_XZ_DEC_X86 is not set
# CONFIG_XZ_DEC_POWERPC is not set
# CONFIG_XZ_DEC_IA64 is not set
# CONFIG_XZ_DEC_ARM is not set
# CONFIG_XZ_DEC_ARMTHUMB is not set
# CONFIG_XZ_DEC_SPARC is not set

315
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CONFIG_MIPS_GENERIC=y
CONFIG_VIRT_BOARD_RANCHU=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_MIPS64_R6=y
CONFIG_64BIT=y
CONFIG_MIPS_CPS=y
CONFIG_CPU_HAS_MSA=y
CONFIG_KSM=y
CONFIG_CMA=y
CONFIG_NR_CPUS=16
CONFIG_PREEMPT=y
# CONFIG_USELIB is not set
CONFIG_AUDIT=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_TASKSTATS=y
CONFIG_TASK_DELAY_ACCT=y
CONFIG_TASK_XACCT=y
CONFIG_TASK_IO_ACCOUNTING=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_CGROUP_DEBUG=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CGROUP_PIDS=y
CONFIG_CGROUP_DEVICE=y
CONFIG_CPUSETS=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_MEMCG=y
CONFIG_MEMCG_SWAP=y
CONFIG_CFS_BANDWIDTH=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_BLK_CGROUP=y
CONFIG_NAMESPACES=y
CONFIG_USER_NS=y
CONFIG_SCHED_AUTOGROUP=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_KALLSYMS_ALL=y
CONFIG_BPF_SYSCALL=y
CONFIG_USERFAULTFD=y
CONFIG_EMBEDDED=y
CONFIG_PERF_EVENTS=y
# CONFIG_SLUB_DEBUG is not set
# CONFIG_COMPAT_BRK is not set
CONFIG_CC_STACKPROTECTOR_REGULAR=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODVERSIONS=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_MIPS32_O32=y
CONFIG_MIPS32_N32=y
CONFIG_PM_AUTOSLEEP=y
CONFIG_PM_WAKELOCKS=y
CONFIG_PM_WAKELOCKS_LIMIT=0
# CONFIG_PM_WAKELOCKS_GC is not set
CONFIG_PM_DEBUG=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_XFRM_USER=y
CONFIG_NET_KEY=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_MULTIPLE_TABLES=y
CONFIG_INET_ESP=y
# CONFIG_INET_LRO is not set
CONFIG_INET_DIAG_DESTROY=y
CONFIG_IPV6_ROUTER_PREF=y
CONFIG_IPV6_ROUTE_INFO=y
CONFIG_IPV6_OPTIMISTIC_DAD=y
CONFIG_INET6_AH=y
CONFIG_INET6_ESP=y
CONFIG_INET6_IPCOMP=y
CONFIG_IPV6_MIP6=y
CONFIG_IPV6_MULTIPLE_TABLES=y
CONFIG_NETFILTER=y
CONFIG_NF_CONNTRACK=y
CONFIG_NF_CONNTRACK_SECMARK=y
CONFIG_NF_CONNTRACK_EVENTS=y
CONFIG_NF_CT_PROTO_DCCP=y
CONFIG_NF_CT_PROTO_SCTP=y
CONFIG_NF_CT_PROTO_UDPLITE=y
CONFIG_NF_CONNTRACK_AMANDA=y
CONFIG_NF_CONNTRACK_FTP=y
CONFIG_NF_CONNTRACK_H323=y
CONFIG_NF_CONNTRACK_IRC=y
CONFIG_NF_CONNTRACK_NETBIOS_NS=y
CONFIG_NF_CONNTRACK_PPTP=y
CONFIG_NF_CONNTRACK_SANE=y
CONFIG_NF_CONNTRACK_TFTP=y
CONFIG_NF_CT_NETLINK=y
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
CONFIG_NETFILTER_XT_TARGET_MARK=y
CONFIG_NETFILTER_XT_TARGET_NFLOG=y
CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
CONFIG_NETFILTER_XT_TARGET_TPROXY=y
CONFIG_NETFILTER_XT_TARGET_TRACE=y
CONFIG_NETFILTER_XT_TARGET_SECMARK=y
CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
CONFIG_NETFILTER_XT_MATCH_COMMENT=y
CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
CONFIG_NETFILTER_XT_MATCH_HELPER=y
CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
CONFIG_NETFILTER_XT_MATCH_LENGTH=y
CONFIG_NETFILTER_XT_MATCH_LIMIT=y
CONFIG_NETFILTER_XT_MATCH_MAC=y
CONFIG_NETFILTER_XT_MATCH_MARK=y
CONFIG_NETFILTER_XT_MATCH_POLICY=y
CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
CONFIG_NETFILTER_XT_MATCH_QUOTA=y
CONFIG_NETFILTER_XT_MATCH_SOCKET=y
CONFIG_NETFILTER_XT_MATCH_STATE=y
CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
CONFIG_NETFILTER_XT_MATCH_STRING=y
CONFIG_NETFILTER_XT_MATCH_TIME=y
CONFIG_NETFILTER_XT_MATCH_U32=y
CONFIG_NF_CONNTRACK_IPV4=y
CONFIG_IP_NF_IPTABLES=y
CONFIG_IP_NF_MATCH_AH=y
CONFIG_IP_NF_MATCH_ECN=y
CONFIG_IP_NF_MATCH_TTL=y
CONFIG_IP_NF_FILTER=y
CONFIG_IP_NF_TARGET_REJECT=y
CONFIG_IP_NF_NAT=y
CONFIG_IP_NF_TARGET_MASQUERADE=y
CONFIG_IP_NF_TARGET_NETMAP=y
CONFIG_IP_NF_TARGET_REDIRECT=y
CONFIG_IP_NF_MANGLE=y
CONFIG_IP_NF_RAW=y
CONFIG_IP_NF_SECURITY=y
CONFIG_IP_NF_ARPTABLES=y
CONFIG_IP_NF_ARPFILTER=y
CONFIG_IP_NF_ARP_MANGLE=y
CONFIG_NF_CONNTRACK_IPV6=y
CONFIG_IP6_NF_IPTABLES=y
CONFIG_IP6_NF_FILTER=y
CONFIG_IP6_NF_TARGET_REJECT=y
CONFIG_IP6_NF_MANGLE=y
CONFIG_IP6_NF_RAW=y
CONFIG_NET_SCHED=y
CONFIG_NET_SCH_HTB=y
CONFIG_NET_CLS_U32=y
CONFIG_NET_EMATCH=y
CONFIG_NET_EMATCH_U32=y
CONFIG_NET_CLS_ACT=y
CONFIG_DNS_RESOLVER=y
CONFIG_CFG80211=y
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_DMA_CMA=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_VIRTIO_BLK=y
CONFIG_SCSI=y
CONFIG_MD=y
CONFIG_BLK_DEV_DM=y
CONFIG_DM_CRYPT=y
CONFIG_DM_UEVENT=y
CONFIG_DM_VERITY=y
CONFIG_DM_VERITY_FEC=y
CONFIG_NETDEVICES=y
CONFIG_TUN=y
CONFIG_VIRTIO_NET=y
CONFIG_PPP=y
CONFIG_PPP_BSDCOMP=y
CONFIG_PPP_DEFLATE=y
CONFIG_PPP_MPPE=y
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GOLDFISH_EVENTS=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_JOYSTICK=y
CONFIG_INPUT_TABLET=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=y
CONFIG_INPUT_GPIO=y
# CONFIG_SERIO_I8042 is not set
CONFIG_SERIO_LIBPS2=y
# CONFIG_VT is not set
# CONFIG_LEGACY_PTYS is not set
CONFIG_GOLDFISH_TTY=y
# CONFIG_DEVMEM is not set
# CONFIG_DEVKMEM is not set
CONFIG_VIRTIO_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_VIRTIO=y
CONFIG_BATTERY_GOLDFISH=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_POWER_RESET_SYSCON_POWEROFF=y
# CONFIG_HWMON is not set
CONFIG_MEDIA_SUPPORT=y
CONFIG_FB=y
CONFIG_FB_GOLDFISH=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_HIDRAW=y
CONFIG_UHID=y
CONFIG_HID_A4TECH=y
CONFIG_HID_ACRUX=y
CONFIG_HID_ACRUX_FF=y
CONFIG_HID_APPLE=y
CONFIG_HID_BELKIN=y
CONFIG_HID_CHERRY=y
CONFIG_HID_CHICONY=y
CONFIG_HID_PRODIKEYS=y
CONFIG_HID_CYPRESS=y
CONFIG_HID_DRAGONRISE=y
CONFIG_DRAGONRISE_FF=y
CONFIG_HID_EMS_FF=y
CONFIG_HID_ELECOM=y
CONFIG_HID_EZKEY=y
CONFIG_HID_KEYTOUCH=y
CONFIG_HID_KYE=y
CONFIG_HID_WALTOP=y
CONFIG_HID_GYRATION=y
CONFIG_HID_TWINHAN=y
CONFIG_HID_KENSINGTON=y
CONFIG_HID_LCPOWER=y
CONFIG_HID_LOGITECH=y
CONFIG_HID_LOGITECH_DJ=y
CONFIG_LOGITECH_FF=y
CONFIG_LOGIRUMBLEPAD2_FF=y
CONFIG_LOGIG940_FF=y
# CONFIG_LOGIWHEELS_FF is not set
CONFIG_HID_MAGICMOUSE=y
CONFIG_HID_MICROSOFT=y
CONFIG_HID_MONTEREY=y
CONFIG_HID_MULTITOUCH=y
CONFIG_HID_ORTEK=y
CONFIG_HID_PANTHERLORD=y
CONFIG_PANTHERLORD_FF=y
CONFIG_HID_PETALYNX=y
CONFIG_HID_PICOLCD=y
CONFIG_HID_PRIMAX=y
CONFIG_HID_SAITEK=y
CONFIG_HID_SAMSUNG=y
CONFIG_HID_SPEEDLINK=y
CONFIG_HID_SUNPLUS=y
CONFIG_HID_GREENASIA=y
CONFIG_GREENASIA_FF=y
CONFIG_HID_SMARTJOYPLUS=y
CONFIG_SMARTJOYPLUS_FF=y
CONFIG_HID_TIVO=y
CONFIG_HID_TOPSEED=y
CONFIG_HID_THRUSTMASTER=y
CONFIG_HID_WACOM=y
CONFIG_HID_WIIMOTE=y
CONFIG_HID_ZEROPLUS=y
CONFIG_HID_ZYDACRON=y
# CONFIG_USB_SUPPORT is not set
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_GOLDFISH=y
CONFIG_VIRTIO_MMIO=y
CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y
CONFIG_STAGING=y
CONFIG_ASHMEM=y
CONFIG_ANDROID_LOW_MEMORY_KILLER=y
CONFIG_SYNC=y
CONFIG_ION=y
CONFIG_GOLDFISH_AUDIO=y
CONFIG_GOLDFISH_SYNC=y
# CONFIG_MIPS_PLATFORM_DEVICES is not set
CONFIG_GOLDFISH=y
CONFIG_GOLDFISH_PIPE=y
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_GOLDFISH_PIC=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
CONFIG_EXT4_ENCRYPTION=y
CONFIG_FANOTIFY=y
CONFIG_QUOTA=y
CONFIG_QFMT_V2=y
CONFIG_FUSE_FS=y
CONFIG_CUSE=y
CONFIG_OVERLAY_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_CONFIGFS_FS=y
CONFIG_SDCARD_FS=y
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_INFO_REDUCED=y
CONFIG_DEBUG_FS=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_PANIC_TIMEOUT=5
# CONFIG_SCHED_DEBUG is not set
CONFIG_SCHEDSTATS=y
CONFIG_TIMER_STATS=y
# CONFIG_FTRACE is not set
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE="earlycon"
CONFIG_SECURITY=y
CONFIG_SECURITY_NETWORK=y
CONFIG_SECURITY_SELINUX=y
# CONFIG_XZ_DEC_X86 is not set
# CONFIG_XZ_DEC_POWERPC is not set
# CONFIG_XZ_DEC_IA64 is not set
# CONFIG_XZ_DEC_ARM is not set
# CONFIG_XZ_DEC_ARMTHUMB is not set
# CONFIG_XZ_DEC_SPARC is not set

312
arch/mips/configs/ranchu_defconfig Normal file
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@ -0,0 +1,312 @@
CONFIG_MIPS_GENERIC=y
CONFIG_VIRT_BOARD_RANCHU=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_MIPS_CPS=y
CONFIG_HIGHMEM=y
CONFIG_KSM=y
CONFIG_CMA=y
CONFIG_NR_CPUS=16
CONFIG_PREEMPT=y
CONFIG_MIPS_O32_FP64_SUPPORT=y
# CONFIG_USELIB is not set
CONFIG_AUDIT=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_TASKSTATS=y
CONFIG_TASK_DELAY_ACCT=y
CONFIG_TASK_XACCT=y
CONFIG_TASK_IO_ACCOUNTING=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_CGROUP_DEBUG=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CGROUP_PIDS=y
CONFIG_CGROUP_DEVICE=y
CONFIG_CPUSETS=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_MEMCG=y
CONFIG_MEMCG_SWAP=y
CONFIG_CFS_BANDWIDTH=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_BLK_CGROUP=y
CONFIG_NAMESPACES=y
CONFIG_USER_NS=y
CONFIG_SCHED_AUTOGROUP=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_KALLSYMS_ALL=y
CONFIG_BPF_SYSCALL=y
CONFIG_USERFAULTFD=y
CONFIG_EMBEDDED=y
CONFIG_PERF_EVENTS=y
# CONFIG_SLUB_DEBUG is not set
# CONFIG_COMPAT_BRK is not set
CONFIG_CC_STACKPROTECTOR_REGULAR=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODVERSIONS=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_PM_AUTOSLEEP=y
CONFIG_PM_WAKELOCKS=y
CONFIG_PM_WAKELOCKS_LIMIT=0
# CONFIG_PM_WAKELOCKS_GC is not set
CONFIG_PM_DEBUG=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_XFRM_USER=y
CONFIG_NET_KEY=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_MULTIPLE_TABLES=y
CONFIG_INET_ESP=y
# CONFIG_INET_LRO is not set
CONFIG_INET_DIAG_DESTROY=y
CONFIG_IPV6_ROUTER_PREF=y
CONFIG_IPV6_ROUTE_INFO=y
CONFIG_IPV6_OPTIMISTIC_DAD=y
CONFIG_INET6_AH=y
CONFIG_INET6_ESP=y
CONFIG_INET6_IPCOMP=y
CONFIG_IPV6_MIP6=y
CONFIG_IPV6_MULTIPLE_TABLES=y
CONFIG_NETFILTER=y
CONFIG_NF_CONNTRACK=y
CONFIG_NF_CONNTRACK_SECMARK=y
CONFIG_NF_CONNTRACK_EVENTS=y
CONFIG_NF_CT_PROTO_DCCP=y
CONFIG_NF_CT_PROTO_SCTP=y
CONFIG_NF_CT_PROTO_UDPLITE=y
CONFIG_NF_CONNTRACK_AMANDA=y
CONFIG_NF_CONNTRACK_FTP=y
CONFIG_NF_CONNTRACK_H323=y
CONFIG_NF_CONNTRACK_IRC=y
CONFIG_NF_CONNTRACK_NETBIOS_NS=y
CONFIG_NF_CONNTRACK_PPTP=y
CONFIG_NF_CONNTRACK_SANE=y
CONFIG_NF_CONNTRACK_TFTP=y
CONFIG_NF_CT_NETLINK=y
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
CONFIG_NETFILTER_XT_TARGET_MARK=y
CONFIG_NETFILTER_XT_TARGET_NFLOG=y
CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
CONFIG_NETFILTER_XT_TARGET_TPROXY=y
CONFIG_NETFILTER_XT_TARGET_TRACE=y
CONFIG_NETFILTER_XT_TARGET_SECMARK=y
CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
CONFIG_NETFILTER_XT_MATCH_COMMENT=y
CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
CONFIG_NETFILTER_XT_MATCH_HELPER=y
CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
CONFIG_NETFILTER_XT_MATCH_LENGTH=y
CONFIG_NETFILTER_XT_MATCH_LIMIT=y
CONFIG_NETFILTER_XT_MATCH_MAC=y
CONFIG_NETFILTER_XT_MATCH_MARK=y
CONFIG_NETFILTER_XT_MATCH_POLICY=y
CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
CONFIG_NETFILTER_XT_MATCH_QUOTA=y
CONFIG_NETFILTER_XT_MATCH_SOCKET=y
CONFIG_NETFILTER_XT_MATCH_STATE=y
CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
CONFIG_NETFILTER_XT_MATCH_STRING=y
CONFIG_NETFILTER_XT_MATCH_TIME=y
CONFIG_NETFILTER_XT_MATCH_U32=y
CONFIG_NF_CONNTRACK_IPV4=y
CONFIG_IP_NF_IPTABLES=y
CONFIG_IP_NF_MATCH_AH=y
CONFIG_IP_NF_MATCH_ECN=y
CONFIG_IP_NF_MATCH_TTL=y
CONFIG_IP_NF_FILTER=y
CONFIG_IP_NF_TARGET_REJECT=y
CONFIG_IP_NF_NAT=y
CONFIG_IP_NF_TARGET_MASQUERADE=y
CONFIG_IP_NF_TARGET_NETMAP=y
CONFIG_IP_NF_TARGET_REDIRECT=y
CONFIG_IP_NF_MANGLE=y
CONFIG_IP_NF_RAW=y
CONFIG_IP_NF_SECURITY=y
CONFIG_IP_NF_ARPTABLES=y
CONFIG_IP_NF_ARPFILTER=y
CONFIG_IP_NF_ARP_MANGLE=y
CONFIG_NF_CONNTRACK_IPV6=y
CONFIG_IP6_NF_IPTABLES=y
CONFIG_IP6_NF_FILTER=y
CONFIG_IP6_NF_TARGET_REJECT=y
CONFIG_IP6_NF_MANGLE=y
CONFIG_IP6_NF_RAW=y
CONFIG_NET_SCHED=y
CONFIG_NET_SCH_HTB=y
CONFIG_NET_CLS_U32=y
CONFIG_NET_EMATCH=y
CONFIG_NET_EMATCH_U32=y
CONFIG_NET_CLS_ACT=y
CONFIG_DNS_RESOLVER=y
CONFIG_CFG80211=y
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_DMA_CMA=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_VIRTIO_BLK=y
CONFIG_SCSI=y
CONFIG_MD=y
CONFIG_BLK_DEV_DM=y
CONFIG_DM_CRYPT=y
CONFIG_DM_UEVENT=y
CONFIG_DM_VERITY=y
CONFIG_DM_VERITY_FEC=y
CONFIG_NETDEVICES=y
CONFIG_TUN=y
CONFIG_VIRTIO_NET=y
CONFIG_PPP=y
CONFIG_PPP_BSDCOMP=y
CONFIG_PPP_DEFLATE=y
CONFIG_PPP_MPPE=y
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GOLDFISH_EVENTS=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_JOYSTICK=y
CONFIG_INPUT_TABLET=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=y
CONFIG_INPUT_GPIO=y
# CONFIG_SERIO_I8042 is not set
CONFIG_SERIO_LIBPS2=y
# CONFIG_VT is not set
# CONFIG_LEGACY_PTYS is not set
CONFIG_GOLDFISH_TTY=y
# CONFIG_DEVMEM is not set
# CONFIG_DEVKMEM is not set
CONFIG_VIRTIO_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_VIRTIO=y
CONFIG_BATTERY_GOLDFISH=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_POWER_RESET_SYSCON_POWEROFF=y
# CONFIG_HWMON is not set
CONFIG_MEDIA_SUPPORT=y
CONFIG_FB=y
CONFIG_FB_GOLDFISH=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_HIDRAW=y
CONFIG_UHID=y
CONFIG_HID_A4TECH=y
CONFIG_HID_ACRUX=y
CONFIG_HID_ACRUX_FF=y
CONFIG_HID_APPLE=y
CONFIG_HID_BELKIN=y
CONFIG_HID_CHERRY=y
CONFIG_HID_CHICONY=y
CONFIG_HID_PRODIKEYS=y
CONFIG_HID_CYPRESS=y
CONFIG_HID_DRAGONRISE=y
CONFIG_DRAGONRISE_FF=y
CONFIG_HID_EMS_FF=y
CONFIG_HID_ELECOM=y
CONFIG_HID_EZKEY=y
CONFIG_HID_KEYTOUCH=y
CONFIG_HID_KYE=y
CONFIG_HID_WALTOP=y
CONFIG_HID_GYRATION=y
CONFIG_HID_TWINHAN=y
CONFIG_HID_KENSINGTON=y
CONFIG_HID_LCPOWER=y
CONFIG_HID_LOGITECH=y
CONFIG_HID_LOGITECH_DJ=y
CONFIG_LOGITECH_FF=y
CONFIG_LOGIRUMBLEPAD2_FF=y
CONFIG_LOGIG940_FF=y
# CONFIG_LOGIWHEELS_FF is not set
CONFIG_HID_MAGICMOUSE=y
CONFIG_HID_MICROSOFT=y
CONFIG_HID_MONTEREY=y
CONFIG_HID_MULTITOUCH=y
CONFIG_HID_ORTEK=y
CONFIG_HID_PANTHERLORD=y
CONFIG_PANTHERLORD_FF=y
CONFIG_HID_PETALYNX=y
CONFIG_HID_PICOLCD=y
CONFIG_HID_PRIMAX=y
CONFIG_HID_SAITEK=y
CONFIG_HID_SAMSUNG=y
CONFIG_HID_SPEEDLINK=y
CONFIG_HID_SUNPLUS=y
CONFIG_HID_GREENASIA=y
CONFIG_GREENASIA_FF=y
CONFIG_HID_SMARTJOYPLUS=y
CONFIG_SMARTJOYPLUS_FF=y
CONFIG_HID_TIVO=y
CONFIG_HID_TOPSEED=y
CONFIG_HID_THRUSTMASTER=y
CONFIG_HID_WACOM=y
CONFIG_HID_WIIMOTE=y
CONFIG_HID_ZEROPLUS=y
CONFIG_HID_ZYDACRON=y
# CONFIG_USB_SUPPORT is not set
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_GOLDFISH=y
CONFIG_VIRTIO_MMIO=y
CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y
CONFIG_STAGING=y
CONFIG_ASHMEM=y
CONFIG_ANDROID_LOW_MEMORY_KILLER=y
CONFIG_SYNC=y
CONFIG_ION=y
CONFIG_GOLDFISH_AUDIO=y
CONFIG_GOLDFISH_SYNC=y
# CONFIG_MIPS_PLATFORM_DEVICES is not set
CONFIG_GOLDFISH=y
CONFIG_GOLDFISH_PIPE=y
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_GOLDFISH_PIC=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
CONFIG_EXT4_ENCRYPTION=y
CONFIG_FANOTIFY=y
CONFIG_QUOTA=y
CONFIG_QFMT_V2=y
CONFIG_FUSE_FS=y
CONFIG_CUSE=y
CONFIG_OVERLAY_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_CONFIGFS_FS=y
CONFIG_SDCARD_FS=y
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_INFO_REDUCED=y
CONFIG_DEBUG_FS=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_PANIC_TIMEOUT=5
# CONFIG_SCHED_DEBUG is not set
CONFIG_SCHEDSTATS=y
CONFIG_TIMER_STATS=y
# CONFIG_FTRACE is not set
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE="earlycon noexec=on"
CONFIG_SECURITY=y
CONFIG_SECURITY_NETWORK=y
CONFIG_SECURITY_SELINUX=y
# CONFIG_XZ_DEC_X86 is not set
# CONFIG_XZ_DEC_POWERPC is not set
# CONFIG_XZ_DEC_IA64 is not set
# CONFIG_XZ_DEC_ARM is not set
# CONFIG_XZ_DEC_ARMTHUMB is not set
# CONFIG_XZ_DEC_SPARC is not set

2
arch/mips/dec/int-handler.S
View file

@ -5,7 +5,7 @@
* Written by Ralf Baechle and Andreas Busse, modified for DECstation
* support by Paul Antoine and Harald Koerfgen.
*
* completly rewritten:
* completely rewritten:
* Copyright (C) 1998 Harald Koerfgen
*
* Rewritten extensively for controller-driven IRQ support

2
arch/mips/fw/arc/memory.c
View file

@ -9,7 +9,7 @@
* PROM library functions for acquiring/using memory descriptors given to us
* from the ARCS firmware. This is only used when CONFIG_ARC_MEMORY is set
* because on some machines like SGI IP27 the ARC memory configuration data
* completly bogus and alternate easier to use mechanisms are available.
* completely bogus and alternate easier to use mechanisms are available.
*/
#include <linux/init.h>
#include <linux/kernel.h>

22
arch/mips/generic/Kconfig Normal file
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@ -0,0 +1,22 @@
if MIPS_GENERIC
config LEGACY_BOARDS
bool
help
Select this from your board if the board must use a legacy, non-UHI,
boot protocol. This will cause the kernel to scan through the list of
supported machines calling their detect functions in turn if the
kernel is booted without being provided with an FDT via the UHI
boot protocol.
config VIRT_BOARD_RANCHU
bool "Support Ranchu platform for Android emulator"
help
This enables support for the platform used by Android emulator.
Ranchu platform consists of a set of virtual devices. This platform
enables emulation of variety of virtual configurations while using
Android emulator. Android emulator is based on Qemu, and contains
the support for the same set of virtual devices.
endif

15
arch/mips/generic/Makefile Normal file
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@ -0,0 +1,15 @@
#
# Copyright (C) 2016 Imagination Technologies
# Author: Paul Burton <paul.burton@imgtec.com>
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the
# Free Software Foundation; either version 2 of the License, or (at your
# option) any later version.
#
obj-y += init.o
obj-y += irq.o
obj-y += proc.o
obj-$(CONFIG_VIRT_BOARD_RANCHU) += board-ranchu.o

14
arch/mips/generic/Platform Normal file
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@ -0,0 +1,14 @@
#
# Copyright (C) 2016 Imagination Technologies
# Author: Paul Burton <paul.burton@imgtec.com>
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the
# Free Software Foundation; either version 2 of the License, or (at your
# option) any later version.
#
platform-$(CONFIG_MIPS_GENERIC) += generic/
cflags-$(CONFIG_MIPS_GENERIC) += -I$(srctree)/arch/mips/include/asm/mach-generic
load-$(CONFIG_MIPS_GENERIC) += 0xffffffff80100000
all-$(CONFIG_MIPS_GENERIC) := vmlinux.gz.itb

92
arch/mips/generic/board-ranchu.c Normal file
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@ -0,0 +1,92 @@
/*
* Support code for virtual Ranchu board for MIPS.
*
* Author: Miodrag Dinic <miodrag.dinic@mips.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/of_address.h>
#include <linux/types.h>
#include <asm/machine.h>
#include <asm/mipsregs.h>
#include <asm/time.h>
#define GOLDFISH_TIMER_LOW 0x00
#define GOLDFISH_TIMER_HIGH 0x04
static __init u64 read_rtc_time(void __iomem *base)
{
u32 time_low;
u32 time_high;
/*
* Reading the low address latches the high value
* as well so there is no fear that we may read
* inaccurate high value.
*/
time_low = readl(base + GOLDFISH_TIMER_LOW);
time_high = readl(base + GOLDFISH_TIMER_HIGH);
return ((u64)time_high << 32) | time_low;
}
static __init unsigned int ranchu_measure_hpt_freq(void)
{
u64 rtc_start, rtc_current, rtc_delta;
unsigned int start, count;
struct device_node *np;
void __iomem *rtc_base;
np = of_find_compatible_node(NULL, NULL, "google,goldfish-rtc");
if (!np)
panic("%s(): Failed to find 'google,goldfish-rtc' dt node!",
__func__);
rtc_base = of_iomap(np, 0);
if (!rtc_base)
panic("%s(): Failed to ioremap Goldfish RTC base!", __func__);
/*
* Poll the nanosecond resolution RTC for one
* second to calibrate the CPU frequency.
*/
rtc_start = read_rtc_time(rtc_base);
start = read_c0_count();
do {
rtc_current = read_rtc_time(rtc_base);
rtc_delta = rtc_current - rtc_start;
} while (rtc_delta < NSEC_PER_SEC);
count = read_c0_count() - start;
/*
* Make sure the frequency will be a round number.
* Without this correction, the returned value may vary
* between subsequent emulation executions.
*
* TODO: Set this value using device tree.
*/
count += 5000;
count -= count % 10000;
iounmap(rtc_base);
return count;
}
static const struct of_device_id ranchu_of_match[] __initconst = {
{
.compatible = "mti,ranchu",
},
};
MIPS_MACHINE(ranchu) = {
.matches = ranchu_of_match,
.measure_hpt_freq = ranchu_measure_hpt_freq,
};

176
arch/mips/generic/init.c Normal file
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@ -0,0 +1,176 @@
/*
* Copyright (C) 2016 Imagination Technologies
* Author: Paul Burton <paul.burton@imgtec.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clocksource.h>
#include <linux/init.h>
#include <linux/irqchip.h>
#include <linux/of_fdt.h>
#include <linux/of_platform.h>
#include <asm/fw/fw.h>
#include <asm/irq_cpu.h>
#include <asm/machine.h>
#include <asm/mips-cpc.h>
#include <asm/prom.h>
#include <asm/smp-ops.h>
#include <asm/time.h>
static __initdata const void *fdt;
static __initdata const struct mips_machine *mach;
static __initdata const void *mach_match_data;
void __init prom_init(void)
{
const struct mips_machine *check_mach;
const struct of_device_id *match;
if ((fw_arg0 == -2) && !fdt_check_header((void *)fw_arg1)) {
/*
* We booted using the UHI boot protocol, so we have been
* provided with the appropriate device tree for the board.
* Make use of it & search for any machine struct based upon
* the root compatible string.
*/
fdt = (void *)fw_arg1;
for_each_mips_machine(check_mach) {
match = mips_machine_is_compatible(check_mach, fdt);
if (match) {
mach = check_mach;
mach_match_data = match->data;
break;
}
}
} else if (IS_ENABLED(CONFIG_LEGACY_BOARDS)) {
/*
* We weren't booted using the UHI boot protocol, but do
* support some number of boards with legacy boot protocols.
* Attempt to find the right one.
*/
for_each_mips_machine(check_mach) {
if (!check_mach->detect)
continue;
if (!check_mach->detect())
continue;
mach = check_mach;
}
/*
* If we don't recognise the machine then we can't continue, so
* die here.
*/
BUG_ON(!mach);
/* Retrieve the machine's FDT */
fdt = mach->fdt;
}
BUG_ON(!fdt);
}
void __init *plat_get_fdt(void)
{
return (void *)fdt;
}
void __init plat_mem_setup(void)
{
if (mach && mach->fixup_fdt)
fdt = mach->fixup_fdt(fdt, mach_match_data);
strlcpy(arcs_cmdline, boot_command_line, COMMAND_LINE_SIZE);
__dt_setup_arch((void *)fdt);
}
void __init device_tree_init(void)
{
int err;
unflatten_and_copy_device_tree();
mips_cpc_probe();
err = register_cps_smp_ops();
if (err)
err = register_up_smp_ops();
}
void __init plat_time_init(void)
{
struct device_node *np;
struct clk *clk;
of_clk_init(NULL);
if (!cpu_has_counter) {
mips_hpt_frequency = 0;
} else if (mach && mach->measure_hpt_freq) {
mips_hpt_frequency = mach->measure_hpt_freq();
} else {
np = of_get_cpu_node(0, NULL);
if (!np) {
pr_err("Failed to get CPU node\n");
return;
}
clk = of_clk_get(np, 0);
if (IS_ERR(clk)) {
pr_err("Failed to get CPU clock: %ld\n", PTR_ERR(clk));
return;
}
mips_hpt_frequency = clk_get_rate(clk);
clk_put(clk);
switch (boot_cpu_type()) {
case CPU_20KC:
case CPU_25KF:
/* The counter runs at the CPU clock rate */
break;
default:
/* The counter runs at half the CPU clock rate */
mips_hpt_frequency /= 2;
break;
}
}
clocksource_probe();
}
void __init arch_init_irq(void)
{
struct device_node *intc_node;
intc_node = of_find_compatible_node(NULL, NULL,
"mti,cpu-interrupt-controller");
if (!cpu_has_veic && !intc_node)
mips_cpu_irq_init();
irqchip_init();
}
static int __init publish_devices(void)
{
if (!of_have_populated_dt())
panic("Device-tree not present");
if (of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL))
panic("Failed to populate DT");
return 0;
}
arch_initcall(publish_devices);
void __init prom_free_prom_memory(void)
{
}

64
arch/mips/generic/irq.c Normal file
View file

@ -0,0 +1,64 @@
/*
* Copyright (C) 2016 Imagination Technologies
* Author: Paul Burton <paul.burton@imgtec.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clocksource.h>
#include <linux/init.h>
#include <linux/irqchip/mips-gic.h>
#include <linux/types.h>
#include <asm/irq.h>
int get_c0_fdc_int(void)
{
int mips_cpu_fdc_irq;
if (cpu_has_veic)
panic("Unimplemented!");
else if (gic_present)
mips_cpu_fdc_irq = gic_get_c0_fdc_int();
else if (cp0_fdc_irq >= 0)
mips_cpu_fdc_irq = MIPS_CPU_IRQ_BASE + cp0_fdc_irq;
else
mips_cpu_fdc_irq = -1;
return mips_cpu_fdc_irq;
}
int get_c0_perfcount_int(void)
{
int mips_cpu_perf_irq;
if (cpu_has_veic)
panic("Unimplemented!");
else if (gic_present)
mips_cpu_perf_irq = gic_get_c0_perfcount_int();
else if (cp0_perfcount_irq >= 0)
mips_cpu_perf_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
else
mips_cpu_perf_irq = -1;
return mips_cpu_perf_irq;
}
unsigned int get_c0_compare_int(void)
{
int mips_cpu_timer_irq;
if (cpu_has_veic)
panic("Unimplemented!");
else if (gic_present)
mips_cpu_timer_irq = gic_get_c0_compare_int();
else
mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
return mips_cpu_timer_irq;
}

29
arch/mips/generic/proc.c Normal file
View file

@ -0,0 +1,29 @@
/*
* Copyright (C) 2016 Imagination Technologies
* Author: Paul Burton <paul.burton@imgtec.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/of.h>
#include <asm/bootinfo.h>
const char *get_system_type(void)
{
const char *str;
int err;
err = of_property_read_string(of_root, "model", &str);
if (!err)
return str;
err = of_property_read_string_index(of_root, "compatible", 0, &str);
if (!err)
return str;
return "Unknown";
}

31
arch/mips/generic/vmlinux.its.S Normal file
View file

@ -0,0 +1,31 @@
/dts-v1/;
/ {
description = KERNEL_NAME;
#address-cells = <ADDR_CELLS>;
images {
kernel@0 {
description = KERNEL_NAME;
data = /incbin/(VMLINUX_BINARY);
type = "kernel";
arch = "mips";
os = "linux";
compression = VMLINUX_COMPRESSION;
load = /bits/ ADDR_BITS <VMLINUX_LOAD_ADDRESS>;
entry = /bits/ ADDR_BITS <VMLINUX_ENTRY_ADDRESS>;
hash@0 {
algo = "sha1";
};
};
};
configurations {
default = "conf@default";
conf@default {
description = "Generic Linux kernel";
kernel = "kernel@0";
};
};
};

4
arch/mips/include/asm/bootinfo.h
View file

@ -127,6 +127,10 @@ extern char arcs_cmdline[COMMAND_LINE_SIZE];
*/
extern unsigned long fw_arg0, fw_arg1, fw_arg2, fw_arg3;
#ifdef CONFIG_USE_OF
extern unsigned long fw_passed_dtb;
#endif
/*
* Platform memory detection hook called by setup_arch
*/

11
arch/mips/include/asm/cpu-features.h
View file

@ -311,6 +311,10 @@
#define cpu_has_mipsmt (cpu_data[0].ases & MIPS_ASE_MIPSMT)
#endif
#ifndef cpu_has_vp
#define cpu_has_vp (cpu_data[0].options & MIPS_CPU_VP)
#endif
#ifndef cpu_has_userlocal
#define cpu_has_userlocal (cpu_data[0].options & MIPS_CPU_ULRI)
#endif
@ -414,4 +418,11 @@
# define cpu_has_small_pages (cpu_data[0].options & MIPS_CPU_SP)
#endif
#ifndef cpu_has_nan_legacy
#define cpu_has_nan_legacy (cpu_data[0].options & MIPS_CPU_NAN_LEGACY)
#endif
#ifndef cpu_has_nan_2008
#define cpu_has_nan_2008 (cpu_data[0].options & MIPS_CPU_NAN_2008)
#endif
#endif /* __ASM_CPU_FEATURES_H */

4
arch/mips/include/asm/cpu-info.h
View file

@ -68,7 +68,7 @@ struct cpuinfo_mips {
#ifdef CONFIG_64BIT
int vmbits; /* Virtual memory size in bits */
#endif
#ifdef CONFIG_MIPS_MT_SMP
#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_CPU_MIPSR6)
/*
* There is not necessarily a 1:1 mapping of VPE num to CPU number
* in particular on multi-core systems.
@ -125,7 +125,7 @@ struct proc_cpuinfo_notifier_args {
unsigned long n;
};
#ifdef CONFIG_MIPS_MT_SMP
#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_CPU_MIPSR6)
# define cpu_vpe_id(cpuinfo) ((cpuinfo)->vpe_id)
#else
# define cpu_vpe_id(cpuinfo) ({ (void)cpuinfo; 0; })

3
arch/mips/include/asm/cpu.h
View file

@ -386,6 +386,9 @@ enum cpu_type_enum {
#define MIPS_CPU_BP_GHIST 0x8000000000ull /* R12K+ Branch Prediction Global History */
#define MIPS_CPU_SP 0x10000000000ull /* Small (1KB) page support */
#define MIPS_CPU_FTLB 0x20000000000ull /* CPU has Fixed-page-size TLB */
#define MIPS_CPU_NAN_LEGACY 0x40000000000ull /* Legacy NaN implemented */
#define MIPS_CPU_NAN_2008 0x80000000000ull /* 2008 NaN implemented */
#define MIPS_CPU_VP 0x100000000000ull /* MIPSr6 Virtual Processors (multi-threading) */
/*
* CPU ASE encodings

5
arch/mips/include/asm/device.h
View file

@ -11,6 +11,11 @@ struct dma_map_ops;
struct dev_archdata {
/* DMA operations on that device */
struct dma_map_ops *dma_ops;
#ifdef CONFIG_DMA_PERDEV_COHERENT
/* Non-zero if DMA is coherent with CPU caches */
bool dma_coherent;
#endif
};
struct pdev_archdata {

16
arch/mips/include/asm/dma-coherence.h
View file

@ -9,14 +9,22 @@
#ifndef __ASM_DMA_COHERENCE_H
#define __ASM_DMA_COHERENCE_H
#ifdef CONFIG_DMA_MAYBE_COHERENT
extern int coherentio;
enum coherent_io_user_state {
IO_COHERENCE_DEFAULT,
IO_COHERENCE_ENABLED,
IO_COHERENCE_DISABLED,
};
#if defined(CONFIG_DMA_PERDEV_COHERENT)
/* Don't provide (hw_)coherentio to avoid misuse */
#elif defined(CONFIG_DMA_MAYBE_COHERENT)
extern enum coherent_io_user_state coherentio;
extern int hw_coherentio;
#else
#ifdef CONFIG_DMA_COHERENT
#define coherentio 1
#define coherentio IO_COHERENCE_ENABLED
#else
#define coherentio 0
#define coherentio IO_COHERENCE_DISABLED
#endif
#define hw_coherentio 0
#endif /* CONFIG_DMA_MAYBE_COHERENT */

10
arch/mips/include/asm/dma-mapping.h
View file

@ -34,4 +34,14 @@ static inline void dma_mark_clean(void *addr, size_t size) {}
extern void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
enum dma_data_direction direction);
#define arch_setup_dma_ops arch_setup_dma_ops
static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base,
u64 size, const struct iommu_ops *iommu,
bool coherent)
{
#ifdef CONFIG_DMA_PERDEV_COHERENT
dev->archdata.dma_coherent = coherent;
#endif
}
#endif /* _ASM_DMA_MAPPING_H */

92
arch/mips/include/asm/dsemul.h Normal file
View file

@ -0,0 +1,92 @@
/*
* Copyright (C) 2016 Imagination Technologies
* Author: Paul Burton <paul.burton@imgtec.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __MIPS_ASM_DSEMUL_H__
#define __MIPS_ASM_DSEMUL_H__
#include <asm/break.h>
#include <asm/inst.h>
/* Break instruction with special math emu break code set */
#define BREAK_MATH(micromips) (((micromips) ? 0x7 : 0xd) | (BRK_MEMU << 16))
/* When used as a frame index, indicates the lack of a frame */
#define BD_EMUFRAME_NONE ((int)BIT(31))
struct mm_struct;
struct pt_regs;
struct task_struct;
/**
* mips_dsemul() - 'Emulate' an instruction from a branch delay slot
* @regs: User thread register context.
* @ir: The instruction to be 'emulated'.
* @branch_pc: The PC of the branch instruction.
* @cont_pc: The PC to continue at following 'emulation'.
*
* Emulate or execute an arbitrary MIPS instruction within the context of
* the current user thread. This is used primarily to handle instructions
* in the delay slots of emulated branch instructions, for example FP
* branch instructions on systems without an FPU.
*
* Return: Zero on success, negative if ir is a NOP, signal number on failure.
*/
extern int mips_dsemul(struct pt_regs *regs, mips_instruction ir,
unsigned long branch_pc, unsigned long cont_pc);
/**
* do_dsemulret() - Return from a delay slot 'emulation' frame
* @xcp: User thread register context.
*
* Call in response to the BRK_MEMU break instruction used to return to
* the kernel from branch delay slot 'emulation' frames following a call
* to mips_dsemul(). Restores the user thread PC to the value that was
* passed as the cpc parameter to mips_dsemul().
*
* Return: True if an emulation frame was returned from, else false.
*/
extern bool do_dsemulret(struct pt_regs *xcp);
/**
* dsemul_thread_cleanup() - Cleanup thread 'emulation' frame
* @tsk: The task structure associated with the thread
*
* If the thread @tsk has a branch delay slot 'emulation' frame
* allocated to it then free that frame.
*
* Return: True if a frame was freed, else false.
*/
extern bool dsemul_thread_cleanup(struct task_struct *tsk);
/**
* dsemul_thread_rollback() - Rollback from an 'emulation' frame
* @regs: User thread register context.
*
* If the current thread, whose register context is represented by @regs,
* is executing within a delay slot 'emulation' frame then exit that
* frame. The PC will be rolled back to the branch if the instruction
* that was being 'emulated' has not yet executed, or advanced to the
* continuation PC if it has.
*
* Return: True if a frame was exited, else false.
*/
extern bool dsemul_thread_rollback(struct pt_regs *regs);
/**
* dsemul_mm_cleanup() - Cleanup per-mm delay slot 'emulation' state
* @mm: The struct mm_struct to cleanup state for.
*
* Cleanup state for the given @mm, ensuring that any memory allocated
* for delay slot 'emulation' book-keeping is freed. This is to be called
* before @mm is freed in order to avoid memory leaks.
*/
extern void dsemul_mm_cleanup(struct mm_struct *mm);
#endif /* __MIPS_ASM_DSEMUL_H__ */

18
arch/mips/include/asm/elf.h
View file

@ -12,7 +12,6 @@
#include <linux/fs.h>
#include <uapi/linux/elf.h>
#include <asm/cpu-info.h>
#include <asm/current.h>
/* ELF header e_flags defines. */
@ -44,6 +43,7 @@
#define EF_MIPS_OPTIONS_FIRST 0x00000080
#define EF_MIPS_32BITMODE 0x00000100
#define EF_MIPS_FP64 0x00000200
#define EF_MIPS_NAN2008 0x00000400
#define EF_MIPS_ABI 0x0000f000
#define EF_MIPS_ARCH 0xf0000000
@ -305,7 +305,7 @@ do { \
\
current->thread.abi = &mips_abi; \
\
current->thread.fpu.fcr31 = boot_cpu_data.fpu_csr31; \
mips_set_personality_nan(state); \
} while (0)
#endif /* CONFIG_32BIT */
@ -367,7 +367,7 @@ do { \
else \
current->thread.abi = &mips_abi; \
\
current->thread.fpu.fcr31 = boot_cpu_data.fpu_csr31; \
mips_set_personality_nan(state); \
\
p = personality(current->personality); \
if (p != PER_LINUX32 && p != PER_LINUX) \
@ -432,6 +432,7 @@ extern int arch_setup_additional_pages(struct linux_binprm *bprm,
int uses_interp);
struct arch_elf_state {
int nan_2008;
int fp_abi;
int interp_fp_abi;
int overall_fp_mode;
@ -440,17 +441,26 @@ struct arch_elf_state {
#define MIPS_ABI_FP_UNKNOWN (-1) /* Unknown FP ABI (kernel internal) */
#define INIT_ARCH_ELF_STATE { \
.nan_2008 = -1, \
.fp_abi = MIPS_ABI_FP_UNKNOWN, \
.interp_fp_abi = MIPS_ABI_FP_UNKNOWN, \
.overall_fp_mode = -1, \
}
/* Whether to accept legacy-NaN and 2008-NaN user binaries. */
extern bool mips_use_nan_legacy;
extern bool mips_use_nan_2008;
extern int arch_elf_pt_proc(void *ehdr, void *phdr, struct file *elf,
bool is_interp, struct arch_elf_state *state);
extern int arch_check_elf(void *ehdr, bool has_interpreter,
extern int arch_check_elf(void *ehdr, bool has_interpreter, void *interp_ehdr,
struct arch_elf_state *state);
extern void mips_set_personality_nan(struct arch_elf_state *state);
extern void mips_set_personality_fp(struct arch_elf_state *state);
#define elf_read_implies_exec(ex, stk) mips_elf_read_implies_exec(&(ex), stk)
extern int mips_elf_read_implies_exec(void *elf_ex, int exstack);
#endif /* _ASM_ELF_H */

146
arch/mips/include/asm/fpu_emulator.h
View file

@ -24,7 +24,7 @@
#define _ASM_FPU_EMULATOR_H
#include <linux/sched.h>
#include <asm/break.h>
#include <asm/dsemul.h>
#include <asm/thread_info.h>
#include <asm/inst.h>
#include <asm/local.h>
@ -36,6 +36,7 @@ struct mips_fpu_emulator_stats {
unsigned long emulated;
unsigned long loads;
unsigned long stores;
unsigned long branches;
unsigned long cp1ops;
unsigned long cp1xops;
unsigned long errors;
@ -45,6 +46,121 @@ struct mips_fpu_emulator_stats {
unsigned long ieee754_zerodiv;
unsigned long ieee754_invalidop;
unsigned long ds_emul;
unsigned long abs_s;
unsigned long abs_d;
unsigned long add_s;
unsigned long add_d;
unsigned long bc1eqz;
unsigned long bc1nez;
unsigned long ceil_w_s;
unsigned long ceil_w_d;
unsigned long ceil_l_s;
unsigned long ceil_l_d;
unsigned long class_s;
unsigned long class_d;
unsigned long cmp_af_s;
unsigned long cmp_af_d;
unsigned long cmp_eq_s;
unsigned long cmp_eq_d;
unsigned long cmp_le_s;
unsigned long cmp_le_d;
unsigned long cmp_lt_s;
unsigned long cmp_lt_d;
unsigned long cmp_ne_s;
unsigned long cmp_ne_d;
unsigned long cmp_or_s;
unsigned long cmp_or_d;
unsigned long cmp_ueq_s;
unsigned long cmp_ueq_d;
unsigned long cmp_ule_s;
unsigned long cmp_ule_d;
unsigned long cmp_ult_s;
unsigned long cmp_ult_d;
unsigned long cmp_un_s;
unsigned long cmp_un_d;
unsigned long cmp_une_s;
unsigned long cmp_une_d;
unsigned long cmp_saf_s;
unsigned long cmp_saf_d;
unsigned long cmp_seq_s;
unsigned long cmp_seq_d;
unsigned long cmp_sle_s;
unsigned long cmp_sle_d;
unsigned long cmp_slt_s;
unsigned long cmp_slt_d;
unsigned long cmp_sne_s;
unsigned long cmp_sne_d;
unsigned long cmp_sor_s;
unsigned long cmp_sor_d;
unsigned long cmp_sueq_s;
unsigned long cmp_sueq_d;
unsigned long cmp_sule_s;
unsigned long cmp_sule_d;
unsigned long cmp_sult_s;
unsigned long cmp_sult_d;
unsigned long cmp_sun_s;
unsigned long cmp_sun_d;
unsigned long cmp_sune_s;
unsigned long cmp_sune_d;
unsigned long cvt_d_l;
unsigned long cvt_d_s;
unsigned long cvt_d_w;
unsigned long cvt_l_s;
unsigned long cvt_l_d;
unsigned long cvt_s_d;
unsigned long cvt_s_l;
unsigned long cvt_s_w;
unsigned long cvt_w_s;
unsigned long cvt_w_d;
unsigned long div_s;
unsigned long div_d;
unsigned long floor_w_s;
unsigned long floor_w_d;
unsigned long floor_l_s;
unsigned long floor_l_d;
unsigned long maddf_s;
unsigned long maddf_d;
unsigned long max_s;
unsigned long max_d;
unsigned long maxa_s;
unsigned long maxa_d;
unsigned long min_s;
unsigned long min_d;
unsigned long mina_s;
unsigned long mina_d;
unsigned long mov_s;
unsigned long mov_d;
unsigned long msubf_s;
unsigned long msubf_d;
unsigned long mul_s;
unsigned long mul_d;
unsigned long neg_s;
unsigned long neg_d;
unsigned long recip_s;
unsigned long recip_d;
unsigned long rint_s;
unsigned long rint_d;
unsigned long round_w_s;
unsigned long round_w_d;
unsigned long round_l_s;
unsigned long round_l_d;
unsigned long rsqrt_s;
unsigned long rsqrt_d;
unsigned long sel_s;
unsigned long sel_d;
unsigned long seleqz_s;
unsigned long seleqz_d;
unsigned long selnez_s;
unsigned long selnez_d;
unsigned long sqrt_s;
unsigned long sqrt_d;
unsigned long sub_s;
unsigned long sub_d;
unsigned long trunc_w_s;
unsigned long trunc_w_d;
unsigned long trunc_l_s;
unsigned long trunc_l_d;
};
DECLARE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats);
@ -60,27 +176,18 @@ do { \
#define MIPS_FPU_EMU_INC_STATS(M) do { } while (0)
#endif /* CONFIG_DEBUG_FS */
extern int mips_dsemul(struct pt_regs *regs, mips_instruction ir,
unsigned long cpc);
extern int do_dsemulret(struct pt_regs *xcp);
extern int fpu_emulator_cop1Handler(struct pt_regs *xcp,
struct mips_fpu_struct *ctx, int has_fpu,
void *__user *fault_addr);
void force_fcr31_sig(unsigned long fcr31, void __user *fault_addr,
struct task_struct *tsk);
int process_fpemu_return(int sig, void __user *fault_addr,
unsigned long fcr31);
int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
unsigned long *contpc);
int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
unsigned long *contpc);
/*
* Instruction inserted following the badinst to further tag the sequence
*/
#define BD_COOKIE 0x0000bd36 /* tne $0, $0 with baggage */
/*
* Break instruction with special math emu break code set
*/
#define BREAK_MATH (0x0000000d | (BRK_MEMU << 16))
#define SIGNALLING_NAN 0x7ff800007ff80000LL
static inline void fpu_emulator_init_fpu(void)
@ -92,4 +199,15 @@ static inline void fpu_emulator_init_fpu(void)
set_fpr64(&t->thread.fpu.fpr[i], 0, SIGNALLING_NAN);
}
/*
* Mask the FCSR Cause bits according to the Enable bits, observing
* that Unimplemented is always enabled.
*/
static inline unsigned long mask_fcr31_x(unsigned long fcr31)
{
return fcr31 & (FPU_CSR_UNI_X |
((fcr31 & FPU_CSR_ALL_E) <<
(ffs(FPU_CSR_ALL_X) - ffs(FPU_CSR_ALL_E))));
}
#endif /* _ASM_FPU_EMULATOR_H */

10
arch/mips/include/asm/irq_regs.h
View file

@ -18,4 +18,14 @@ static inline struct pt_regs *get_irq_regs(void)
return current_thread_info()->regs;
}
static inline struct pt_regs *set_irq_regs(struct pt_regs *new_regs)
{
struct pt_regs *old_regs;
old_regs = get_irq_regs();
current_thread_info()->regs = new_regs;
return old_regs;
}
#endif /* __ASM_IRQ_REGS_H */

2
arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h
View file

@ -100,7 +100,7 @@ typedef volatile struct au1xxx_ddma_desc {
u32 dscr_nxtptr; /* Next descriptor pointer (mostly) */
/*
* First 32 bytes are HW specific!!!
* Lets have some SW data following -- make sure it's 32 bytes.
* Let's have some SW data following -- make sure it's 32 bytes.
*/
u32 sw_status;
u32 sw_context;

2
arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h
View file

@ -141,7 +141,7 @@ octeon_main_processor:
.endm
/*
* Do SMP slave processor setup necessary before we can savely execute C code.
* Do SMP slave processor setup necessary before we can safely execute C code.
*/
.macro smp_slave_setup
.endm

14
arch/mips/include/asm/mach-generic/dma-coherence.h
View file

@ -49,7 +49,19 @@ static inline int plat_dma_supported(struct device *dev, u64 mask)
static inline int plat_device_is_coherent(struct device *dev)
{
return coherentio;
#ifdef CONFIG_DMA_PERDEV_COHERENT
return dev->archdata.dma_coherent;
#else
switch (coherentio) {
default:
case IO_COHERENCE_DEFAULT:
return hw_coherentio;
case IO_COHERENCE_ENABLED:
return 1;
case IO_COHERENCE_DISABLED:
return 0;
}
#endif
}
#ifndef plat_post_dma_flush

2
arch/mips/include/asm/mach-generic/kernel-entry-init.h
View file

@ -16,7 +16,7 @@
.endm
/*
* Do SMP slave processor setup necessary before we can savely execute C code.
* Do SMP slave processor setup necessary before we can safely execute C code.
*/
.macro smp_slave_setup
.endm

2
arch/mips/include/asm/mach-ip27/irq.h
View file

@ -11,7 +11,7 @@
#define __ASM_MACH_IP27_IRQ_H
/*
* A hardwired interrupt number is completly stupid for this system - a
* A hardwired interrupt number is completely stupid for this system - a
* large configuration might have thousands if not tenthousands of
* interrupts.
*/

2
arch/mips/include/asm/mach-ip27/kernel-entry-init.h
View file

@ -81,7 +81,7 @@
.endm
/*
* Do SMP slave processor setup necessary before we can savely execute C code.
* Do SMP slave processor setup necessary before we can safely execute C code.
*/
.macro smp_slave_setup
GET_NASID_ASM t1

2
arch/mips/include/asm/mach-jz4740/gpio.h
View file

@ -27,7 +27,7 @@ enum jz_gpio_function {
/*
Usually a driver for a SoC component has to request several gpio pins and
configure them as funcion pins.
configure them as function pins.
jz_gpio_bulk_request can be used to ease this process.
Usually one would do something like:

2
arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
View file

@ -22,7 +22,7 @@
/*
* during early_printk no ioremap possible at this early stage
* lets use KSEG1 instead
* let's use KSEG1 instead
*/
#define LTQ_ASC0_BASE_ADDR 0x1E100C00
#define LTQ_EARLY_ASC KSEG1ADDR(LTQ_ASC0_BASE_ADDR)

2
arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
View file

@ -75,7 +75,7 @@ extern __iomem void *ltq_cgu_membase;
/*
* during early_printk no ioremap is possible
* lets use KSEG1 instead
* let's use KSEG1 instead
*/
#define LTQ_ASC1_BASE_ADDR 0x1E100C00
#define LTQ_EARLY_ASC KSEG1ADDR(LTQ_ASC1_BASE_ADDR)

63
arch/mips/include/asm/machine.h Normal file
View file

@ -0,0 +1,63 @@
/*
* Copyright (C) 2016 Imagination Technologies
* Author: Paul Burton <paul.burton@imgtec.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __MIPS_ASM_MACHINE_H__
#define __MIPS_ASM_MACHINE_H__
#include <linux/libfdt.h>
#include <linux/of.h>
struct mips_machine {
const struct of_device_id *matches;
const void *fdt;
bool (*detect)(void);
const void *(*fixup_fdt)(const void *fdt, const void *match_data);
unsigned int (*measure_hpt_freq)(void);
};
extern long __mips_machines_start;
extern long __mips_machines_end;
#define MIPS_MACHINE(name) \
static const struct mips_machine __mips_mach_##name \
__used __section(.mips.machines.init)
#define for_each_mips_machine(mach) \
for ((mach) = (struct mips_machine *)&__mips_machines_start; \
(mach) < (struct mips_machine *)&__mips_machines_end; \
(mach)++)
/**
* mips_machine_is_compatible() - check if a machine is compatible with an FDT
* @mach: the machine struct to check
* @fdt: the FDT to check for compatibility with
*
* Check whether the given machine @mach is compatible with the given flattened
* device tree @fdt, based upon the compatibility property of the root node.
*
* Return: the device id matched if any, else NULL
*/
static inline const struct of_device_id *
mips_machine_is_compatible(const struct mips_machine *mach, const void *fdt)
{
const struct of_device_id *match;
if (!mach->matches)
return NULL;
for (match = mach->matches; match->compatible; match++) {
if (fdt_node_check_compatible(fdt, 0, match->compatible) == 0)
return match;
}
return NULL;
}
#endif /* __MIPS_ASM_MACHINE_H__ */

6
arch/mips/include/asm/mips-cm.h
View file

@ -28,7 +28,7 @@ extern void __iomem *mips_cm_l2sync_base;
* This function returns the physical base address of the Coherence Manager
* global control block, or 0 if no Coherence Manager is present. It provides
* a default implementation which reads the CMGCRBase register where available,
* and may be overriden by platforms which determine this address in a
* and may be overridden by platforms which determine this address in a
* different way by defining a function with the same prototype except for the
* name mips_cm_phys_base (without underscores).
*/
@ -208,6 +208,7 @@ BUILD_CM_RW(l2_config, MIPS_CM_GCB_OFS + 0x130)
BUILD_CM_RW(sys_config2, MIPS_CM_GCB_OFS + 0x150)
BUILD_CM_RW(l2_pft_control, MIPS_CM_GCB_OFS + 0x300)
BUILD_CM_RW(l2_pft_control_b, MIPS_CM_GCB_OFS + 0x308)
BUILD_CM_RW(bev_base, MIPS_CM_GCB_OFS + 0x680)
/* Core Local & Core Other register accessor functions */
BUILD_CM_Cx_RW(reset_release, 0x00)
@ -457,7 +458,10 @@ static inline unsigned int mips_cm_max_vp_width(void)
if (mips_cm_revision() >= CM_REV_CM3)
return read_gcr_sys_config2() & CM_GCR_SYS_CONFIG2_MAXVPW_MSK;
if (config_enabled(CONFIG_SMP))
return smp_num_siblings;
return 1;
}
/**

3
arch/mips/include/asm/mips-cpc.h
View file

@ -106,6 +106,9 @@ BUILD_CPC_R_(revision, MIPS_CPC_GCB_OFS + 0x20)
BUILD_CPC_Cx_RW(cmd, 0x00)
BUILD_CPC_Cx_RW(stat_conf, 0x08)
BUILD_CPC_Cx_RW(other, 0x10)
BUILD_CPC_Cx_RW(vp_stop, 0x20)
BUILD_CPC_Cx_RW(vp_run, 0x28)
BUILD_CPC_Cx_RW(vp_running, 0x30)
/* CPC_Cx_CMD register fields */
#define CPC_Cx_CMD_SHF 0

4
arch/mips/include/asm/mips-r2-to-r6-emul.h
View file

@ -52,7 +52,7 @@ do { \
__this_cpu_inc(mipsr2emustats.M); \
err = __get_user(nir, (u32 __user *)regs->cp0_epc); \
if (!err) { \
if (nir == BREAK_MATH) \
if (nir == BREAK_MATH(0)) \
__this_cpu_inc(mipsr2bdemustats.M); \
} \
preempt_enable(); \
@ -79,7 +79,7 @@ struct r2_decoder_table {
};
extern void do_trap_or_bp(struct pt_regs *regs, unsigned int code,
extern void do_trap_or_bp(struct pt_regs *regs, unsigned int code, int si_code,
const char *str);
#ifndef CONFIG_MIPSR2_TO_R6_EMULATOR

1
arch/mips/include/asm/mipsregs.h
View file

@ -589,6 +589,7 @@
#define MIPS_CONF5_MRP (_ULCAST_(1) << 3)
#define MIPS_CONF5_LLB (_ULCAST_(1) << 4)
#define MIPS_CONF5_MVH (_ULCAST_(1) << 5)
#define MIPS_CONF5_VP (_ULCAST_(1) << 7)
#define MIPS_CONF5_FRE (_ULCAST_(1) << 8)
#define MIPS_CONF5_UFE (_ULCAST_(1) << 9)
#define MIPS_CONF5_MSAEN (_ULCAST_(1) << 27)

9
arch/mips/include/asm/mmu.h
View file

@ -2,11 +2,20 @@
#define __ASM_MMU_H
#include <linux/atomic.h>
#include <linux/spinlock.h>
#include <linux/wait.h>
typedef struct {
unsigned long asid[NR_CPUS];
void *vdso;
atomic_t fp_mode_switching;
/* lock to be held whilst modifying fp_bd_emupage_allocmap */
spinlock_t bd_emupage_lock;
/* bitmap tracking allocation of fp_bd_emupage */
unsigned long *bd_emupage_allocmap;
/* wait queue for threads requiring an emuframe */
wait_queue_head_t bd_emupage_queue;
} mm_context_t;
#endif /* __ASM_MMU_H */

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