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Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus

Browse source 
Pull MIPS updates from Ralf Baechle:
 "Eight fixes across arch/mips.  Nothing stands particuarly out nor is
  complicated but fixes keep coming in at a higher than comfortable
  rate"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
  MIPS: KVM: Do not sign extend on unsigned MMIO load
  MIPS: BPF: Fix stack pointer allocation
  MIPS: Loongson-3: Fix a cpu-hotplug issue in loongson3_ipi_interrupt()
  MIPS: Fix enabling of DEBUG_STACKOVERFLOW
  MIPS: c-r4k: Fix typo in probe_scache()
  MIPS: Avoid an FPE exception in FCSR mask probing
  MIPS: ath79: Add a missing new line in log message
  MIPS: ralink: Fix clearing the illegal access interrupt
This commit is contained in:
Linus Torvalds 2015-06-07 16:56:10 -07:00
commit 866e6441a4
8 changed files with 8 additions and 13 deletions
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2
arch/mips/ath79/setup.c
View file

@ -225,7 +225,7 @@ void __init plat_time_init(void)
ddr_clk_rate = ath79_get_sys_clk_rate("ddr"); ddr_clk_rate = ath79_get_sys_clk_rate("ddr");
ref_clk_rate = ath79_get_sys_clk_rate("ref"); ref_clk_rate = ath79_get_sys_clk_rate("ref");
pr_info("Clocks: CPU:%lu.%03luMHz, DDR:%lu.%03luMHz, AHB:%lu.%03luMHz, Ref:%lu.%03luMHz", pr_info("Clocks: CPU:%lu.%03luMHz, DDR:%lu.%03luMHz, AHB:%lu.%03luMHz, Ref:%lu.%03luMHz\n",
cpu_clk_rate / 1000000, (cpu_clk_rate / 1000) % 1000, cpu_clk_rate / 1000000, (cpu_clk_rate / 1000) % 1000,
ddr_clk_rate / 1000000, (ddr_clk_rate / 1000) % 1000, ddr_clk_rate / 1000000, (ddr_clk_rate / 1000) % 1000,
ahb_clk_rate / 1000000, (ahb_clk_rate / 1000) % 1000, ahb_clk_rate / 1000000, (ahb_clk_rate / 1000) % 1000,

3
arch/mips/kernel/cpu-probe.c
View file

@ -74,13 +74,12 @@ static inline void cpu_set_fpu_fcsr_mask(struct cpuinfo_mips *c)
{ {
unsigned long sr, mask, fcsr, fcsr0, fcsr1; unsigned long sr, mask, fcsr, fcsr0, fcsr1;
fcsr = c->fpu_csr31;
mask = FPU_CSR_ALL_X | FPU_CSR_ALL_E | FPU_CSR_ALL_S | FPU_CSR_RM; mask = FPU_CSR_ALL_X | FPU_CSR_ALL_E | FPU_CSR_ALL_S | FPU_CSR_RM;
sr = read_c0_status(); sr = read_c0_status();
__enable_fpu(FPU_AS_IS); __enable_fpu(FPU_AS_IS);
fcsr = read_32bit_cp1_register(CP1_STATUS);
fcsr0 = fcsr & mask; fcsr0 = fcsr & mask;
write_32bit_cp1_register(CP1_STATUS, fcsr0); write_32bit_cp1_register(CP1_STATUS, fcsr0);
fcsr0 = read_32bit_cp1_register(CP1_STATUS); fcsr0 = read_32bit_cp1_register(CP1_STATUS);

2
arch/mips/kernel/irq.c
View file

@ -109,7 +109,7 @@ void __init init_IRQ(void)
#endif #endif
} }
#ifdef DEBUG_STACKOVERFLOW #ifdef CONFIG_DEBUG_STACKOVERFLOW
static inline void check_stack_overflow(void) static inline void check_stack_overflow(void)
{ {
unsigned long sp; unsigned long sp;

2
arch/mips/kvm/emulate.c
View file

@ -2409,7 +2409,7 @@ enum emulation_result kvm_mips_complete_mmio_load(struct kvm_vcpu *vcpu,
if (vcpu->mmio_needed == 2) if (vcpu->mmio_needed == 2)
*gpr = *(int16_t *) run->mmio.data; *gpr = *(int16_t *) run->mmio.data;
else else
*gpr = *(int16_t *) run->mmio.data; *gpr = *(uint16_t *)run->mmio.data;
break; break;
case 1: case 1:

2
arch/mips/loongson/loongson-3/smp.c
View file

@ -272,7 +272,7 @@ void loongson3_ipi_interrupt(struct pt_regs *regs)
if (action & SMP_ASK_C0COUNT) { if (action & SMP_ASK_C0COUNT) {
BUG_ON(cpu != 0); BUG_ON(cpu != 0);
c0count = read_c0_count(); c0count = read_c0_count();
for (i = 1; i < loongson_sysconf.nr_cpus; i++) for (i = 1; i < num_possible_cpus(); i++)
per_cpu(core0_c0count, i) = c0count; per_cpu(core0_c0count, i) = c0count;
} }
} }

2
arch/mips/mm/c-r4k.c
View file

@ -1372,7 +1372,7 @@ static int probe_scache(void)
scache_size = addr; scache_size = addr;
c->scache.linesz = 16 << ((config & R4K_CONF_SB) >> 22); c->scache.linesz = 16 << ((config & R4K_CONF_SB) >> 22);
c->scache.ways = 1; c->scache.ways = 1;
c->dcache.waybit = 0; /* does not matter */ c->scache.waybit = 0; /* does not matter */
return 1; return 1;
} }

6
arch/mips/net/bpf_jit.c
View file

@ -681,11 +681,7 @@ static unsigned int get_stack_depth(struct jit_ctx *ctx)
sp_off += config_enabled(CONFIG_64BIT) ? sp_off += config_enabled(CONFIG_64BIT) ?
(ARGS_USED_BY_JIT + 1) * RSIZE : RSIZE; (ARGS_USED_BY_JIT + 1) * RSIZE : RSIZE;
/* return sp_off;
* Subtract the bytes for the last registers since we only care about
* the location on the stack pointer.
*/
return sp_off - RSIZE;
} }
static void build_prologue(struct jit_ctx *ctx) static void build_prologue(struct jit_ctx *ctx)

2
arch/mips/ralink/ill_acc.c
View file

@ -41,7 +41,7 @@ static irqreturn_t ill_acc_irq_handler(int irq, void *_priv)
addr, (type >> ILL_ACC_OFF_S) & ILL_ACC_OFF_M, addr, (type >> ILL_ACC_OFF_S) & ILL_ACC_OFF_M,
type & ILL_ACC_LEN_M); type & ILL_ACC_LEN_M);
rt_memc_w32(REG_ILL_ACC_TYPE, REG_ILL_ACC_TYPE); rt_memc_w32(ILL_INT_STATUS, REG_ILL_ACC_TYPE);
return IRQ_HANDLED; return IRQ_HANDLED;
} }