From 86d54e985a1a495377aab070438aa33bc435b1c9 Mon Sep 17 00:00:00 2001 From: Neeti Desai Date: Thu, 30 Apr 2015 19:11:44 -0700 Subject: [PATCH] iommu/arm-smmu: change IOMMU_EXEC to IOMMU_NOEXEC Exposing the XN flag of the SMMU driver as IOMMU_NOEXEC instead of IOMMU_EXEC makes it enforceable, since for IOMMUs that don't support the XN flag pages will always be executable. Change-Id: Ib785acd8a188fa95aea9991116139a392862764e Signed-off-by: Antonios Motakis Acked-by: Joerg Roedel Signed-off-by: Will Deacon Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git Git-commit: a720b41c41f5a7e4c51558cf087882c57331581f [rvaswani@codeaurora.org: resolve trivial merge conflicts] Signed-off-by: Rohit Vaswani --- drivers/iommu/arm-smmu.c | 9 +++++---- include/linux/iommu.h | 2 +- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 7b6ff4ea4bd2..af4c703ca498 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -1645,7 +1645,7 @@ static int arm_smmu_alloc_init_pte(struct arm_smmu_domain *smmu_domain, unsigned long pfn, int prot, int stage) { pte_t *pte, *start; - pteval_t pteval = ARM_SMMU_PTE_PAGE | ARM_SMMU_PTE_AF | ARM_SMMU_PTE_XN; + pteval_t pteval = ARM_SMMU_PTE_PAGE | ARM_SMMU_PTE_AF; int ret; if (pmd_none(*pmd)) { @@ -1695,10 +1695,11 @@ static int arm_smmu_alloc_init_pte(struct arm_smmu_domain *smmu_domain, pteval |= ARM_SMMU_PTE_MEMATTR_DEV; } + if (prot & IOMMU_NOEXEC) + pteval |= ARM_SMMU_PTE_XN; + /* If no access, create a faulting entry to avoid TLB fills */ - if (prot & IOMMU_EXEC) - pteval &= ~ARM_SMMU_PTE_XN; - else if (!(prot & (IOMMU_READ | IOMMU_WRITE))) + if (!(prot & (IOMMU_READ | IOMMU_WRITE))) pteval &= ~ARM_SMMU_PTE_PAGE; pteval |= ARM_SMMU_PTE_SH_IS; diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 01025881a680..d68f9574e24a 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -27,7 +27,7 @@ #define IOMMU_READ (1 << 0) #define IOMMU_WRITE (1 << 1) #define IOMMU_CACHE (1 << 2) /* DMA cache coherency */ -#define IOMMU_EXEC (1 << 3) +#define IOMMU_NOEXEC (1 << 3) #define IOMMU_PRIV (1 << 4) #define IOMMU_DEVICE (1 << 5) /* Indicates access to device memory */