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usb: dwc3: Make cfg_ahb_clk optional

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dwc3 USB driver is not required to not manage gcc_usb_phy_cfg_ahb2phy_clk
clock. It will stay always ON except when in XO-shutdown. RPM will
manage this clock.

Change-Id: Icc33e63a52b3c5ce83ef2fc56d68eae20278cac0
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
This commit is contained in:
Hemant Kumar 2016-07-19 15:25:14 -07:00
parent aa958278d1
commit 89e2052bd5
2 changed files with 33 additions and 5 deletions
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21
Documentation/devicetree/bindings/usb/msm-ssusb.txt
View file

@ -10,6 +10,11 @@ Required properties :
"hs_phy_irq" : Interrupt from HS PHY for asynchronous events in LPM.
"pwr_event_irq" : Interrupt to controller for asynchronous events in LPM.
Used for SS-USB power events.
- clocks: a list of phandles to the controller clocks. Use as per
Documentation/devicetree/bindings/clock/clock-bindings.txt
- clock-names: Names of the clocks in 1-1 correspondence with the "clocks"
property. Required clocks are "xo", "iface_clk", "core_clk", "sleep_clk"
and "utmi_clk".
Optional properties :
- reg: Additional registers
@ -27,6 +32,10 @@ Optional properties :
- interrupt-names : Optional interrupt resource entries are:
"pmic_id_irq" : Interrupt from PMIC for external ID pin notification.
"ss_phy_irq" : Interrupt from super speed phy for wake up notification.
- clocks: a list of phandles to the controller clocks. Use as per
Documentation/devicetree/bindings/clock/clock-bindings.txt
- clock-names: Names of the clocks in 1-1 correspondence with the "clocks"
property. Optional clocks are "bus_aggr_clk" and "cfg_ahb_clk".
- qcom,charging-disabled: If present then battery charging using USB
is disabled.
- vbus_dwc3-supply: phandle to the 5V VBUS supply regulator used for host mode.
@ -77,6 +86,18 @@ Example MSM USB3.0 controller device node :
qcom,msm_bus,vectors =
<61 512 0 0>,
<61 512 240000000 960000000>;
clocks = <&clock_gcc clk_gcc_usb30_master_clk>,
<&clock_gcc clk_gcc_cfg_noc_usb3_axi_clk>,
<&clock_gcc clk_gcc_aggre1_usb3_axi_clk>,
<&clock_gcc clk_gcc_usb30_mock_utmi_clk>,
<&clock_gcc clk_gcc_usb30_sleep_clk>,
<&clock_gcc clk_gcc_usb_phy_cfg_ahb2phy_clk>,
<&clock_gcc clk_cxo_dwc3_clk>;
clock-names = "core_clk", "iface_clk", "bus_aggr_clk",
"utmi_clk", "sleep_clk", "cfg_ahb_clk", "xo";
dwc3@f9200000 {
compatible = "synopsys,dwc3";
reg = <0xf9200000 0xfc000>;

17
drivers/usb/dwc3/dwc3-msm.c
View file

@ -2332,11 +2332,18 @@ static int dwc3_msm_get_clk_gdsc(struct dwc3_msm *mdwc)
if (IS_ERR(mdwc->bus_aggr_clk))
mdwc->bus_aggr_clk = NULL;
mdwc->cfg_ahb_clk = devm_clk_get(mdwc->dev, "cfg_ahb_clk");
if (IS_ERR(mdwc->cfg_ahb_clk)) {
dev_err(mdwc->dev, "failed to get cfg_ahb_clk\n");
ret = PTR_ERR(mdwc->cfg_ahb_clk);
return ret;
if (of_property_match_string(mdwc->dev->of_node,
"clock-names", "cfg_ahb_clk") >= 0) {
mdwc->cfg_ahb_clk = devm_clk_get(mdwc->dev, "cfg_ahb_clk");
if (IS_ERR(mdwc->cfg_ahb_clk)) {
ret = PTR_ERR(mdwc->cfg_ahb_clk);
mdwc->cfg_ahb_clk = NULL;
if (ret != -EPROBE_DEFER)
dev_err(mdwc->dev,
"failed to get cfg_ahb_clk ret %d\n",
ret);
return ret;
}
}
return 0;