From 8af0bacd05fb05dcb113f4d92c584e96355ec24b Mon Sep 17 00:00:00 2001 From: Amit Nischal Date: Thu, 16 Feb 2017 17:59:19 +0530 Subject: [PATCH] clk: qcom: Move gcc_usb3_phy_pipe_clk to branch clock A clk_disable on gate clocks would hold a global spinlock and it would wait for a halt_delay. In some race conditions(due to longer delays for gate clocks) if any other CPU would also invoke a clk_disable then it could result in a spinlock lockup. Avoid this by moving the gcc_usb3_phy_pipe_clk clk to branch clock. CRs-Fixed: 2008439 Change-Id: I177349844c571964637e16a150f93c5912f7dafe Signed-off-by: Amit Nischal --- drivers/clk/qcom/gcc-sdm660.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/clk/qcom/gcc-sdm660.c b/drivers/clk/qcom/gcc-sdm660.c index 3413859a56ef..e17a551017e3 100644 --- a/drivers/clk/qcom/gcc-sdm660.c +++ b/drivers/clk/qcom/gcc-sdm660.c @@ -2493,14 +2493,15 @@ static struct clk_branch gcc_usb3_phy_aux_clk = { }, }; -static struct clk_gate2 gcc_usb3_phy_pipe_clk = { - .udelay = 50, +static struct clk_branch gcc_usb3_phy_pipe_clk = { + .halt_reg = 0x50004, + .halt_check = BRANCH_HALT_DELAY, .clkr = { .enable_reg = 0x50004, .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb3_phy_pipe_clk", - .ops = &clk_gate2_ops, + .ops = &clk_branch2_ops, }, }, };