From 8cde77d6b1c294c3a1d2f5d25ccdd2c624375534 Mon Sep 17 00:00:00 2001 From: Deepak Katragadda Date: Thu, 1 Sep 2016 10:25:54 -0700 Subject: [PATCH] clk: msm: clock: Update the supported frequencies for hmss_ahb_clk_src Update the frequency table for the hmss_ahb_clk_src to support it running at 50MHz and 100MHz. CRs-Fixed: 1063082 Change-Id: Iab131f0e40f0796a47d76d8db7c31748e30b8366 Signed-off-by: Deepak Katragadda --- drivers/clk/msm/clock-gcc-cobalt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/msm/clock-gcc-cobalt.c b/drivers/clk/msm/clock-gcc-cobalt.c index 2049a0bf7dd2..5c3e9f6225e4 100644 --- a/drivers/clk/msm/clock-gcc-cobalt.c +++ b/drivers/clk/msm/clock-gcc-cobalt.c @@ -240,8 +240,8 @@ DEFINE_EXT_CLK(gpll4_out_main, &gpll4.c); static struct clk_freq_tbl ftbl_hmss_ahb_clk_src[] = { F( 19200000, cxo_clk_src_ao, 1, 0, 0), - F( 37500000, gpll0_out_main, 16, 0, 0), - F( 75000000, gpll0_out_main, 8, 0, 0), + F( 50000000, gpll0_out_main, 12, 0, 0), + F( 100000000, gpll0_out_main, 6, 0, 0), F_END };