ASoC: Audio codec driver changes for kernel 4.4
Audio codec driver changes for kernel 4.4. Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
This commit is contained in:
Sudheer Papothi
David Keitel
parent
03f5d7efe2
commit
8dc812f2d4
11 changed files with 431 additions and 456 deletions
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@ -18,285 +18,285 @@
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#include <linux/device.h>
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#include "wcd9xxx-regmap.h"
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static const struct reg_default wcd9335_1_x_defaults[] = {
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{ WCD9335_CODEC_RPM_CLK_GATE , 0x03 },
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{ WCD9335_CODEC_RPM_PWR_CPE_DRAM1_SHUTDOWN , 0x1f },
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{ WCD9335_CHIP_TIER_CTRL_CHIP_ID_BYTE0 , 0x00 },
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{ WCD9335_CHIP_TIER_CTRL_EFUSE_CTL , 0x00 },
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{ WCD9335_DATA_HUB_DATA_HUB_RX0_INP_CFG , 0x00 },
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{ WCD9335_DATA_HUB_DATA_HUB_RX1_INP_CFG , 0x00 },
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{ WCD9335_DATA_HUB_DATA_HUB_RX2_INP_CFG , 0x00 },
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{ WCD9335_DATA_HUB_DATA_HUB_RX3_INP_CFG , 0x00 },
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{ WCD9335_CPE_SS_CPARMAD_BUFRDY_INT_PERIOD , 0x14 },
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{ WCD9335_CPE_SS_SS_ERROR_INT_MASK , 0x3f },
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{ WCD9335_SOC_MAD_AUDIO_IIR_CTL_VAL , 0x00 },
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{ WCD9335_BIAS_VBG_FINE_ADJ , 0x55 },
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{ WCD9335_SIDO_SIDO_CCL_2 , 0x6c },
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{ WCD9335_SIDO_SIDO_CCL_3 , 0x2d },
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{ WCD9335_SIDO_SIDO_CCL_8 , 0x6c },
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{ WCD9335_SIDO_SIDO_CCL_10 , 0x6c },
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{ WCD9335_SIDO_SIDO_DRIVER_2 , 0x77 },
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{ WCD9335_SIDO_SIDO_DRIVER_3 , 0x77 },
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{ WCD9335_SIDO_SIDO_TEST_2 , 0x00 },
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{ WCD9335_MBHC_ZDET_ANA_CTL , 0x00 },
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{ WCD9335_MBHC_FSM_DEBUG , 0xc0 },
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{ WCD9335_TX_1_2_ATEST_REFCTL , 0x08 },
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{ WCD9335_TX_3_4_ATEST_REFCTL , 0x08 },
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{ WCD9335_TX_5_6_ATEST_REFCTL , 0x08 },
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{ WCD9335_FLYBACK_VNEG_CTRL_1 , 0x67 },
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{ WCD9335_FLYBACK_VNEG_CTRL_4 , 0x5f },
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{ WCD9335_FLYBACK_VNEG_CTRL_9 , 0x50 },
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{ WCD9335_FLYBACK_VNEG_DAC_CTRL_1 , 0x65 },
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{ WCD9335_FLYBACK_VNEG_DAC_CTRL_4 , 0x40 },
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{ WCD9335_RX_BIAS_HPH_PA , 0xaa },
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{ WCD9335_RX_BIAS_HPH_LOWPOWER , 0x62 },
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{ WCD9335_HPH_PA_CTL2 , 0x40 },
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{ WCD9335_HPH_L_EN , 0x00 },
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{ WCD9335_HPH_R_EN , 0x00 },
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{ WCD9335_HPH_R_ATEST , 0x50 },
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{ WCD9335_HPH_RDAC_LDO_CTL , 0x00 },
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{ WCD9335_CDC_TX0_TX_PATH_CFG0 , 0x00 },
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{ WCD9335_CDC_TX0_TX_PATH_CFG1 , 0x00 },
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{ WCD9335_CDC_TX0_TX_PATH_SEC2 , 0x00 },
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{ WCD9335_CDC_TX0_TX_PATH_SEC3 , 0x0c },
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{ WCD9335_CDC_TX1_TX_PATH_CFG0 , 0x00 },
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{ WCD9335_CDC_TX1_TX_PATH_CFG1 , 0x00 },
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{ WCD9335_CDC_TX1_TX_PATH_SEC2 , 0x00 },
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{ WCD9335_CDC_TX1_TX_PATH_SEC3 , 0x0c },
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{ WCD9335_CDC_TX2_TX_PATH_CFG0 , 0x00 },
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{ WCD9335_CDC_TX3_TX_PATH_CFG0 , 0x00 },
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{ WCD9335_CDC_TX4_TX_PATH_CFG0 , 0x00 },
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{ WCD9335_CDC_TX5_TX_PATH_CFG0 , 0x00 },
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{ WCD9335_CDC_TX6_TX_PATH_CFG0 , 0x00 },
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{ WCD9335_CDC_TX7_TX_PATH_CFG0 , 0x00 },
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{ WCD9335_CDC_TX8_TX_PATH_CFG0 , 0x00 },
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{ WCD9335_CDC_TX2_TX_PATH_CFG1 , 0x00 },
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{ WCD9335_CDC_TX3_TX_PATH_CFG1 , 0x00 },
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{ WCD9335_CDC_TX4_TX_PATH_CFG1 , 0x00 },
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{ WCD9335_CDC_TX5_TX_PATH_CFG1 , 0x00 },
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{ WCD9335_CDC_TX6_TX_PATH_CFG1 , 0x00 },
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{ WCD9335_CDC_TX7_TX_PATH_CFG1 , 0x00 },
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{ WCD9335_CDC_TX8_TX_PATH_CFG1 , 0x00 },
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{ WCD9335_CDC_TX2_TX_PATH_SEC2 , 0x00 },
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{ WCD9335_CDC_TX3_TX_PATH_SEC2 , 0x00 },
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{ WCD9335_CDC_TX4_TX_PATH_SEC2 , 0x00 },
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{ WCD9335_CDC_TX5_TX_PATH_SEC2 , 0x00 },
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{ WCD9335_CDC_TX6_TX_PATH_SEC2 , 0x00 },
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{ WCD9335_CDC_TX7_TX_PATH_SEC2 , 0x00 },
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{ WCD9335_CDC_TX8_TX_PATH_SEC2 , 0x00 },
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{ WCD9335_CDC_TX2_TX_PATH_SEC3 , 0x0c },
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{ WCD9335_CDC_TX3_TX_PATH_SEC3 , 0x0c },
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{ WCD9335_CDC_TX4_TX_PATH_SEC3 , 0x0c },
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{ WCD9335_CDC_TX5_TX_PATH_SEC3 , 0x0c },
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{ WCD9335_CDC_TX6_TX_PATH_SEC3 , 0x0c },
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{ WCD9335_CDC_TX7_TX_PATH_SEC3 , 0x0c },
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{ WCD9335_CDC_TX8_TX_PATH_SEC3 , 0x0c },
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{ WCD9335_CDC_COMPANDER1_CTL7 , 0x0c },
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{ WCD9335_CDC_COMPANDER2_CTL7 , 0x0c },
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{ WCD9335_CDC_COMPANDER3_CTL7 , 0x0c },
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{ WCD9335_CDC_COMPANDER4_CTL7 , 0x0c },
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{ WCD9335_CDC_COMPANDER5_CTL7 , 0x0c },
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{ WCD9335_CDC_COMPANDER6_CTL7 , 0x0c },
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{ WCD9335_CDC_COMPANDER7_CTL7 , 0x0c },
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{ WCD9335_CDC_COMPANDER8_CTL7 , 0x0c },
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{ WCD9335_CDC_RX0_RX_PATH_CFG1 , 0x04 },
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{ WCD9335_CDC_RX0_RX_PATH_MIX_CFG , 0x0e },
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{ WCD9335_CDC_RX0_RX_PATH_SEC0 , 0x00 },
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{ WCD9335_CDC_RX0_RX_PATH_SEC1 , 0x00 },
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{ WCD9335_CDC_RX0_RX_PATH_MIX_SEC0 , 0x00 },
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{ WCD9335_CDC_RX1_RX_PATH_CFG1 , 0x04 },
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{ WCD9335_CDC_RX1_RX_PATH_MIX_CFG , 0x0e },
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{ WCD9335_CDC_RX1_RX_PATH_SEC0 , 0x00 },
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{ WCD9335_CDC_RX1_RX_PATH_SEC1 , 0x00 },
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{ WCD9335_CDC_RX1_RX_PATH_MIX_SEC0 , 0x00 },
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{ WCD9335_CDC_RX2_RX_PATH_CFG1 , 0x04 },
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{ WCD9335_CDC_RX2_RX_PATH_MIX_CFG , 0x0e },
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{ WCD9335_CDC_RX2_RX_PATH_SEC0 , 0x00 },
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{ WCD9335_CDC_RX2_RX_PATH_SEC1 , 0x00 },
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{ WCD9335_CDC_RX2_RX_PATH_MIX_SEC0 , 0x00 },
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{ WCD9335_CDC_RX3_RX_PATH_CFG1 , 0x04 },
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{ WCD9335_CDC_RX3_RX_PATH_MIX_CFG , 0x0e },
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{ WCD9335_CDC_RX3_RX_PATH_SEC0 , 0x00 },
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{ WCD9335_CDC_RX3_RX_PATH_SEC1 , 0x00 },
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{ WCD9335_CDC_RX3_RX_PATH_MIX_SEC0 , 0x00 },
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{ WCD9335_CDC_RX4_RX_PATH_CFG1 , 0x04 },
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{ WCD9335_CDC_RX4_RX_PATH_MIX_CFG , 0x0e },
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{ WCD9335_CDC_RX4_RX_PATH_SEC0 , 0x00 },
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{ WCD9335_CDC_RX4_RX_PATH_SEC1 , 0x00 },
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{ WCD9335_CDC_RX4_RX_PATH_MIX_SEC0 , 0x00 },
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{ WCD9335_CDC_RX5_RX_PATH_CFG1 , 0x04 },
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{ WCD9335_CDC_RX5_RX_PATH_MIX_CFG , 0x0e },
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{ WCD9335_CDC_RX5_RX_PATH_SEC0 , 0x00 },
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{ WCD9335_CDC_RX5_RX_PATH_SEC1 , 0x00 },
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{ WCD9335_CDC_RX5_RX_PATH_MIX_SEC0 , 0x00 },
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{ WCD9335_CDC_RX6_RX_PATH_CFG1 , 0x04 },
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{ WCD9335_CDC_RX6_RX_PATH_MIX_CFG , 0x0e },
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{ WCD9335_CDC_RX6_RX_PATH_SEC0 , 0x00 },
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{ WCD9335_CDC_RX6_RX_PATH_SEC1 , 0x00 },
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{ WCD9335_CDC_RX6_RX_PATH_MIX_SEC0 , 0x00 },
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{ WCD9335_CDC_RX7_RX_PATH_CFG1 , 0x04 },
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{ WCD9335_CDC_RX7_RX_PATH_MIX_CFG , 0x0e },
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{ WCD9335_CDC_RX7_RX_PATH_SEC0 , 0x00 },
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{ WCD9335_CDC_RX7_RX_PATH_SEC1 , 0x00 },
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{ WCD9335_CDC_RX7_RX_PATH_MIX_SEC0 , 0x00 },
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{ WCD9335_CDC_RX8_RX_PATH_CFG1 , 0x04 },
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{ WCD9335_CDC_RX8_RX_PATH_MIX_CFG , 0x0e },
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{ WCD9335_CDC_RX8_RX_PATH_SEC0 , 0x00 },
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{ WCD9335_CDC_RX8_RX_PATH_SEC1 , 0x00 },
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{ WCD9335_CDC_RX8_RX_PATH_MIX_SEC0 , 0x00 },
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{ WCD9335_SPLINE_SRC0_CLK_RST_CTL_0 , 0x00 },
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{ WCD9335_SPLINE_SRC1_CLK_RST_CTL_0 , 0x00 },
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{ WCD9335_SPLINE_SRC2_CLK_RST_CTL_0 , 0x00 },
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{ WCD9335_SPLINE_SRC3_CLK_RST_CTL_0 , 0x00 },
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{ WCD9335_CDC_CLK_RST_CTRL_FS_CNT_CONTROL , 0x00 },
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{ WCD9335_TEST_DEBUG_NPL_DLY_TEST_1 , 0x00 },
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{ WCD9335_TEST_DEBUG_NPL_DLY_TEST_2 , 0x00 },
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static const struct reg_sequence wcd9335_1_x_defaults[] = {
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{ WCD9335_CODEC_RPM_CLK_GATE , 0x03 , 0x00 },
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{ WCD9335_CODEC_RPM_PWR_CPE_DRAM1_SHUTDOWN , 0x1f , 0x00 },
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{ WCD9335_CHIP_TIER_CTRL_CHIP_ID_BYTE0 , 0x00 , 0x00 },
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{ WCD9335_CHIP_TIER_CTRL_EFUSE_CTL , 0x00 , 0x00 },
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{ WCD9335_DATA_HUB_DATA_HUB_RX0_INP_CFG , 0x00 , 0x00 },
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{ WCD9335_DATA_HUB_DATA_HUB_RX1_INP_CFG , 0x00 , 0x00 },
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{ WCD9335_DATA_HUB_DATA_HUB_RX2_INP_CFG , 0x00 , 0x00 },
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{ WCD9335_DATA_HUB_DATA_HUB_RX3_INP_CFG , 0x00 , 0x00 },
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{ WCD9335_CPE_SS_CPARMAD_BUFRDY_INT_PERIOD , 0x14 , 0x00 },
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{ WCD9335_CPE_SS_SS_ERROR_INT_MASK , 0x3f , 0x00 },
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{ WCD9335_SOC_MAD_AUDIO_IIR_CTL_VAL , 0x00 , 0x00 },
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{ WCD9335_BIAS_VBG_FINE_ADJ , 0x55 , 0x00 },
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{ WCD9335_SIDO_SIDO_CCL_2 , 0x6c , 0x00 },
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{ WCD9335_SIDO_SIDO_CCL_3 , 0x2d , 0x00 },
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{ WCD9335_SIDO_SIDO_CCL_8 , 0x6c , 0x00 },
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{ WCD9335_SIDO_SIDO_CCL_10 , 0x6c , 0x00 },
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{ WCD9335_SIDO_SIDO_DRIVER_2 , 0x77 , 0x00 },
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{ WCD9335_SIDO_SIDO_DRIVER_3 , 0x77 , 0x00 },
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{ WCD9335_SIDO_SIDO_TEST_2 , 0x00 , 0x00 },
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{ WCD9335_MBHC_ZDET_ANA_CTL , 0x00 , 0x00 },
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{ WCD9335_MBHC_FSM_DEBUG , 0xc0 , 0x00 },
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{ WCD9335_TX_1_2_ATEST_REFCTL , 0x08 , 0x00 },
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{ WCD9335_TX_3_4_ATEST_REFCTL , 0x08 , 0x00 },
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{ WCD9335_TX_5_6_ATEST_REFCTL , 0x08 , 0x00 },
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{ WCD9335_FLYBACK_VNEG_CTRL_1 , 0x67 , 0x00 },
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{ WCD9335_FLYBACK_VNEG_CTRL_4 , 0x5f , 0x00 },
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{ WCD9335_FLYBACK_VNEG_CTRL_9 , 0x50 , 0x00 },
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{ WCD9335_FLYBACK_VNEG_DAC_CTRL_1 , 0x65 , 0x00 },
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{ WCD9335_FLYBACK_VNEG_DAC_CTRL_4 , 0x40 , 0x00 },
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{ WCD9335_RX_BIAS_HPH_PA , 0xaa , 0x00 },
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{ WCD9335_RX_BIAS_HPH_LOWPOWER , 0x62 , 0x00 },
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{ WCD9335_HPH_PA_CTL2 , 0x40 , 0x00 },
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{ WCD9335_HPH_L_EN , 0x00 , 0x00 },
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{ WCD9335_HPH_R_EN , 0x00 , 0x00 },
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{ WCD9335_HPH_R_ATEST , 0x50 , 0x00 },
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{ WCD9335_HPH_RDAC_LDO_CTL , 0x00 , 0x00 },
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{ WCD9335_CDC_TX0_TX_PATH_CFG0 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX0_TX_PATH_CFG1 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX0_TX_PATH_SEC2 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX0_TX_PATH_SEC3 , 0x0c , 0x00 },
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{ WCD9335_CDC_TX1_TX_PATH_CFG0 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX1_TX_PATH_CFG1 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX1_TX_PATH_SEC2 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX1_TX_PATH_SEC3 , 0x0c , 0x00 },
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{ WCD9335_CDC_TX2_TX_PATH_CFG0 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX3_TX_PATH_CFG0 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX4_TX_PATH_CFG0 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX5_TX_PATH_CFG0 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX6_TX_PATH_CFG0 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX7_TX_PATH_CFG0 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX8_TX_PATH_CFG0 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX2_TX_PATH_CFG1 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX3_TX_PATH_CFG1 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX4_TX_PATH_CFG1 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX5_TX_PATH_CFG1 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX6_TX_PATH_CFG1 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX7_TX_PATH_CFG1 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX8_TX_PATH_CFG1 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX2_TX_PATH_SEC2 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX3_TX_PATH_SEC2 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX4_TX_PATH_SEC2 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX5_TX_PATH_SEC2 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX6_TX_PATH_SEC2 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX7_TX_PATH_SEC2 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX8_TX_PATH_SEC2 , 0x00 , 0x00 },
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{ WCD9335_CDC_TX2_TX_PATH_SEC3 , 0x0c , 0x00 },
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{ WCD9335_CDC_TX3_TX_PATH_SEC3 , 0x0c , 0x00 },
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{ WCD9335_CDC_TX4_TX_PATH_SEC3 , 0x0c , 0x00 },
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{ WCD9335_CDC_TX5_TX_PATH_SEC3 , 0x0c , 0x00 },
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{ WCD9335_CDC_TX6_TX_PATH_SEC3 , 0x0c , 0x00 },
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{ WCD9335_CDC_TX7_TX_PATH_SEC3 , 0x0c , 0x00 },
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{ WCD9335_CDC_TX8_TX_PATH_SEC3 , 0x0c , 0x00 },
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{ WCD9335_CDC_COMPANDER1_CTL7 , 0x0c , 0x00 },
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{ WCD9335_CDC_COMPANDER2_CTL7 , 0x0c , 0x00 },
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{ WCD9335_CDC_COMPANDER3_CTL7 , 0x0c , 0x00 },
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{ WCD9335_CDC_COMPANDER4_CTL7 , 0x0c , 0x00 },
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{ WCD9335_CDC_COMPANDER5_CTL7 , 0x0c , 0x00 },
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{ WCD9335_CDC_COMPANDER6_CTL7 , 0x0c , 0x00 },
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{ WCD9335_CDC_COMPANDER7_CTL7 , 0x0c , 0x00 },
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{ WCD9335_CDC_COMPANDER8_CTL7 , 0x0c , 0x00 },
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{ WCD9335_CDC_RX0_RX_PATH_CFG1 , 0x04 , 0x00 },
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{ WCD9335_CDC_RX0_RX_PATH_MIX_CFG , 0x0e , 0x00 },
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{ WCD9335_CDC_RX0_RX_PATH_SEC0 , 0x00 , 0x00 },
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{ WCD9335_CDC_RX0_RX_PATH_SEC1 , 0x00 , 0x00 },
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{ WCD9335_CDC_RX0_RX_PATH_MIX_SEC0 , 0x00 , 0x00 },
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{ WCD9335_CDC_RX1_RX_PATH_CFG1 , 0x04 , 0x00 },
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{ WCD9335_CDC_RX1_RX_PATH_MIX_CFG , 0x0e , 0x00 },
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{ WCD9335_CDC_RX1_RX_PATH_SEC0 , 0x00 , 0x00 },
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{ WCD9335_CDC_RX1_RX_PATH_SEC1 , 0x00 , 0x00 },
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{ WCD9335_CDC_RX1_RX_PATH_MIX_SEC0 , 0x00 , 0x00 },
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{ WCD9335_CDC_RX2_RX_PATH_CFG1 , 0x04 , 0x00 },
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{ WCD9335_CDC_RX2_RX_PATH_MIX_CFG , 0x0e , 0x00 },
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{ WCD9335_CDC_RX2_RX_PATH_SEC0 , 0x00 , 0x00 },
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{ WCD9335_CDC_RX2_RX_PATH_SEC1 , 0x00 , 0x00 },
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{ WCD9335_CDC_RX2_RX_PATH_MIX_SEC0 , 0x00 , 0x00 },
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{ WCD9335_CDC_RX3_RX_PATH_CFG1 , 0x04 , 0x00 },
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{ WCD9335_CDC_RX3_RX_PATH_MIX_CFG , 0x0e , 0x00 },
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{ WCD9335_CDC_RX3_RX_PATH_SEC0 , 0x00 , 0x00 },
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{ WCD9335_CDC_RX3_RX_PATH_SEC1 , 0x00 , 0x00 },
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{ WCD9335_CDC_RX3_RX_PATH_MIX_SEC0 , 0x00 , 0x00 },
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{ WCD9335_CDC_RX4_RX_PATH_CFG1 , 0x04 , 0x00 },
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{ WCD9335_CDC_RX4_RX_PATH_MIX_CFG , 0x0e , 0x00 },
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{ WCD9335_CDC_RX4_RX_PATH_SEC0 , 0x00 , 0x00 },
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{ WCD9335_CDC_RX4_RX_PATH_SEC1 , 0x00 , 0x00 },
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{ WCD9335_CDC_RX4_RX_PATH_MIX_SEC0 , 0x00 , 0x00 },
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{ WCD9335_CDC_RX5_RX_PATH_CFG1 , 0x04 , 0x00 },
|
||||
{ WCD9335_CDC_RX5_RX_PATH_MIX_CFG , 0x0e , 0x00 },
|
||||
{ WCD9335_CDC_RX5_RX_PATH_SEC0 , 0x00 , 0x00 },
|
||||
{ WCD9335_CDC_RX5_RX_PATH_SEC1 , 0x00 , 0x00 },
|
||||
{ WCD9335_CDC_RX5_RX_PATH_MIX_SEC0 , 0x00 , 0x00 },
|
||||
{ WCD9335_CDC_RX6_RX_PATH_CFG1 , 0x04 , 0x00 },
|
||||
{ WCD9335_CDC_RX6_RX_PATH_MIX_CFG , 0x0e , 0x00 },
|
||||
{ WCD9335_CDC_RX6_RX_PATH_SEC0 , 0x00 , 0x00 },
|
||||
{ WCD9335_CDC_RX6_RX_PATH_SEC1 , 0x00 , 0x00 },
|
||||
{ WCD9335_CDC_RX6_RX_PATH_MIX_SEC0 , 0x00 , 0x00 },
|
||||
{ WCD9335_CDC_RX7_RX_PATH_CFG1 , 0x04 , 0x00 },
|
||||
{ WCD9335_CDC_RX7_RX_PATH_MIX_CFG , 0x0e , 0x00 },
|
||||
{ WCD9335_CDC_RX7_RX_PATH_SEC0 , 0x00 , 0x00 },
|
||||
{ WCD9335_CDC_RX7_RX_PATH_SEC1 , 0x00 , 0x00 },
|
||||
{ WCD9335_CDC_RX7_RX_PATH_MIX_SEC0 , 0x00 , 0x00 },
|
||||
{ WCD9335_CDC_RX8_RX_PATH_CFG1 , 0x04 , 0x00 },
|
||||
{ WCD9335_CDC_RX8_RX_PATH_MIX_CFG , 0x0e , 0x00 },
|
||||
{ WCD9335_CDC_RX8_RX_PATH_SEC0 , 0x00 , 0x00 },
|
||||
{ WCD9335_CDC_RX8_RX_PATH_SEC1 , 0x00 , 0x00 },
|
||||
{ WCD9335_CDC_RX8_RX_PATH_MIX_SEC0 , 0x00 , 0x00 },
|
||||
{ WCD9335_SPLINE_SRC0_CLK_RST_CTL_0 , 0x00 , 0x00 },
|
||||
{ WCD9335_SPLINE_SRC1_CLK_RST_CTL_0 , 0x00 , 0x00 },
|
||||
{ WCD9335_SPLINE_SRC2_CLK_RST_CTL_0 , 0x00 , 0x00 },
|
||||
{ WCD9335_SPLINE_SRC3_CLK_RST_CTL_0 , 0x00 , 0x00 },
|
||||
{ WCD9335_CDC_CLK_RST_CTRL_FS_CNT_CONTROL , 0x00 , 0x00 },
|
||||
{ WCD9335_TEST_DEBUG_NPL_DLY_TEST_1 , 0x00 , 0x00 },
|
||||
{ WCD9335_TEST_DEBUG_NPL_DLY_TEST_2 , 0x00 , 0x00 },
|
||||
};
|
||||
|
||||
static const struct reg_default wcd9335_2_0_defaults[] = {
|
||||
{ WCD9335_CODEC_RPM_CLK_GATE , 0x07 },
|
||||
{ WCD9335_CODEC_RPM_PWR_CPE_DRAM1_SHUTDOWN , 0x3f },
|
||||
{ WCD9335_CHIP_TIER_CTRL_CHIP_ID_BYTE0 , 0x01 },
|
||||
{ WCD9335_CHIP_TIER_CTRL_EFUSE_CTL , 0x10 },
|
||||
{ WCD9335_DATA_HUB_DATA_HUB_RX0_INP_CFG , 0x08 },
|
||||
{ WCD9335_DATA_HUB_DATA_HUB_RX1_INP_CFG , 0x08 },
|
||||
{ WCD9335_DATA_HUB_DATA_HUB_RX2_INP_CFG , 0x08 },
|
||||
{ WCD9335_DATA_HUB_DATA_HUB_RX3_INP_CFG , 0x08 },
|
||||
{ WCD9335_CPE_SS_CPARMAD_BUFRDY_INT_PERIOD , 0x13 },
|
||||
{ WCD9335_CPE_SS_SS_ERROR_INT_MASK , 0xff },
|
||||
{ WCD9335_SOC_MAD_AUDIO_IIR_CTL_VAL , 0x40 },
|
||||
{ WCD9335_BIAS_VBG_FINE_ADJ , 0xc5 },
|
||||
{ WCD9335_SIDO_SIDO_CCL_2 , 0x92 },
|
||||
{ WCD9335_SIDO_SIDO_CCL_3 , 0x35 },
|
||||
{ WCD9335_SIDO_SIDO_CCL_8 , 0x6e },
|
||||
{ WCD9335_SIDO_SIDO_CCL_10 , 0x6e },
|
||||
{ WCD9335_SIDO_SIDO_DRIVER_2 , 0x55 },
|
||||
{ WCD9335_SIDO_SIDO_DRIVER_3 , 0x55 },
|
||||
{ WCD9335_SIDO_SIDO_TEST_2 , 0x0f },
|
||||
{ WCD9335_MBHC_ZDET_ANA_CTL , 0x0f },
|
||||
{ WCD9335_TX_1_2_ATEST_REFCTL , 0x0a },
|
||||
{ WCD9335_TX_3_4_ATEST_REFCTL , 0x0a },
|
||||
{ WCD9335_TX_5_6_ATEST_REFCTL , 0x0a },
|
||||
{ WCD9335_FLYBACK_VNEG_CTRL_1 , 0xeb },
|
||||
{ WCD9335_FLYBACK_VNEG_CTRL_4 , 0x7f },
|
||||
{ WCD9335_FLYBACK_VNEG_CTRL_9 , 0x64 },
|
||||
{ WCD9335_FLYBACK_VNEG_DAC_CTRL_1 , 0xed },
|
||||
{ WCD9335_RX_BIAS_HPH_PA , 0x9a },
|
||||
{ WCD9335_RX_BIAS_HPH_LOWPOWER , 0x82 },
|
||||
{ WCD9335_HPH_PA_CTL2 , 0x50 },
|
||||
{ WCD9335_HPH_L_EN , 0x80 },
|
||||
{ WCD9335_HPH_R_EN , 0x80 },
|
||||
{ WCD9335_HPH_R_ATEST , 0x54 },
|
||||
{ WCD9335_HPH_RDAC_LDO_CTL , 0x33 },
|
||||
{ WCD9335_CDC_TX0_TX_PATH_CFG0 , 0x10 },
|
||||
{ WCD9335_CDC_TX0_TX_PATH_CFG1 , 0x02 },
|
||||
{ WCD9335_CDC_TX0_TX_PATH_SEC2 , 0x01 },
|
||||
{ WCD9335_CDC_TX0_TX_PATH_SEC3 , 0x3c },
|
||||
{ WCD9335_CDC_TX1_TX_PATH_CFG0 , 0x10 },
|
||||
{ WCD9335_CDC_TX1_TX_PATH_CFG1 , 0x02 },
|
||||
{ WCD9335_CDC_TX1_TX_PATH_SEC2 , 0x01 },
|
||||
{ WCD9335_CDC_TX1_TX_PATH_SEC3 , 0x3c },
|
||||
{ WCD9335_CDC_TX2_TX_PATH_CFG0 , 0x10 },
|
||||
{ WCD9335_CDC_TX3_TX_PATH_CFG0 , 0x10 },
|
||||
{ WCD9335_CDC_TX4_TX_PATH_CFG0 , 0x10 },
|
||||
{ WCD9335_CDC_TX5_TX_PATH_CFG0 , 0x10 },
|
||||
{ WCD9335_CDC_TX6_TX_PATH_CFG0 , 0x10 },
|
||||
{ WCD9335_CDC_TX7_TX_PATH_CFG0 , 0x10 },
|
||||
{ WCD9335_CDC_TX8_TX_PATH_CFG0 , 0x10 },
|
||||
{ WCD9335_CDC_TX2_TX_PATH_CFG1 , 0x02 },
|
||||
{ WCD9335_CDC_TX3_TX_PATH_CFG1 , 0x02 },
|
||||
{ WCD9335_CDC_TX4_TX_PATH_CFG1 , 0x02 },
|
||||
{ WCD9335_CDC_TX5_TX_PATH_CFG1 , 0x02 },
|
||||
{ WCD9335_CDC_TX6_TX_PATH_CFG1 , 0x02 },
|
||||
{ WCD9335_CDC_TX7_TX_PATH_CFG1 , 0x02 },
|
||||
{ WCD9335_CDC_TX8_TX_PATH_CFG1 , 0x02 },
|
||||
{ WCD9335_CDC_TX2_TX_PATH_SEC2 , 0x01 },
|
||||
{ WCD9335_CDC_TX3_TX_PATH_SEC2 , 0x01 },
|
||||
{ WCD9335_CDC_TX4_TX_PATH_SEC2 , 0x01 },
|
||||
{ WCD9335_CDC_TX5_TX_PATH_SEC2 , 0x01 },
|
||||
{ WCD9335_CDC_TX6_TX_PATH_SEC2 , 0x01 },
|
||||
{ WCD9335_CDC_TX7_TX_PATH_SEC2 , 0x01 },
|
||||
{ WCD9335_CDC_TX8_TX_PATH_SEC2 , 0x01 },
|
||||
{ WCD9335_CDC_TX2_TX_PATH_SEC3 , 0x3c },
|
||||
{ WCD9335_CDC_TX3_TX_PATH_SEC3 , 0x3c },
|
||||
{ WCD9335_CDC_TX4_TX_PATH_SEC3 , 0x3c },
|
||||
{ WCD9335_CDC_TX5_TX_PATH_SEC3 , 0x3c },
|
||||
{ WCD9335_CDC_TX6_TX_PATH_SEC3 , 0x3c },
|
||||
{ WCD9335_CDC_TX7_TX_PATH_SEC3 , 0x3c },
|
||||
{ WCD9335_CDC_TX8_TX_PATH_SEC3 , 0x3c },
|
||||
{ WCD9335_CDC_COMPANDER1_CTL7 , 0x08 },
|
||||
{ WCD9335_CDC_COMPANDER2_CTL7 , 0x08 },
|
||||
{ WCD9335_CDC_COMPANDER3_CTL7 , 0x08 },
|
||||
{ WCD9335_CDC_COMPANDER4_CTL7 , 0x08 },
|
||||
{ WCD9335_CDC_COMPANDER5_CTL7 , 0x08 },
|
||||
{ WCD9335_CDC_COMPANDER6_CTL7 , 0x08 },
|
||||
{ WCD9335_CDC_COMPANDER7_CTL7 , 0x08 },
|
||||
{ WCD9335_CDC_COMPANDER8_CTL7 , 0x08 },
|
||||
{ WCD9335_CDC_RX0_RX_PATH_CFG1 , 0x44 },
|
||||
{ WCD9335_CDC_RX0_RX_PATH_MIX_CFG , 0x1e },
|
||||
{ WCD9335_CDC_RX0_RX_PATH_SEC0 , 0xfc },
|
||||
{ WCD9335_CDC_RX0_RX_PATH_SEC1 , 0x08 },
|
||||
{ WCD9335_CDC_RX0_RX_PATH_MIX_SEC0 , 0x08 },
|
||||
{ WCD9335_CDC_RX1_RX_PATH_CFG1 , 0x44 },
|
||||
{ WCD9335_CDC_RX1_RX_PATH_MIX_CFG , 0x1e },
|
||||
{ WCD9335_CDC_RX1_RX_PATH_SEC0 , 0xfc },
|
||||
{ WCD9335_CDC_RX1_RX_PATH_SEC1 , 0x08 },
|
||||
{ WCD9335_CDC_RX1_RX_PATH_MIX_SEC0 , 0x08 },
|
||||
{ WCD9335_CDC_RX2_RX_PATH_CFG1 , 0x44 },
|
||||
{ WCD9335_CDC_RX2_RX_PATH_MIX_CFG , 0x1e },
|
||||
{ WCD9335_CDC_RX2_RX_PATH_SEC0 , 0xfc },
|
||||
{ WCD9335_CDC_RX2_RX_PATH_SEC1 , 0x08 },
|
||||
{ WCD9335_CDC_RX2_RX_PATH_MIX_SEC0 , 0x08 },
|
||||
{ WCD9335_CDC_RX3_RX_PATH_CFG1 , 0x44 },
|
||||
{ WCD9335_CDC_RX3_RX_PATH_MIX_CFG , 0x1e },
|
||||
{ WCD9335_CDC_RX3_RX_PATH_SEC0 , 0xfc },
|
||||
{ WCD9335_CDC_RX3_RX_PATH_SEC1 , 0x08 },
|
||||
{ WCD9335_CDC_RX3_RX_PATH_MIX_SEC0 , 0x08 },
|
||||
{ WCD9335_CDC_RX4_RX_PATH_CFG1 , 0x44 },
|
||||
{ WCD9335_CDC_RX4_RX_PATH_MIX_CFG , 0x1e },
|
||||
{ WCD9335_CDC_RX4_RX_PATH_SEC0 , 0xfc },
|
||||
{ WCD9335_CDC_RX4_RX_PATH_SEC1 , 0x08 },
|
||||
{ WCD9335_CDC_RX4_RX_PATH_MIX_SEC0 , 0x08 },
|
||||
{ WCD9335_CDC_RX5_RX_PATH_CFG1 , 0x44 },
|
||||
{ WCD9335_CDC_RX5_RX_PATH_MIX_CFG , 0x1e },
|
||||
{ WCD9335_CDC_RX5_RX_PATH_SEC0 , 0xfc },
|
||||
{ WCD9335_CDC_RX5_RX_PATH_SEC1 , 0x08 },
|
||||
{ WCD9335_CDC_RX5_RX_PATH_MIX_SEC0 , 0x08 },
|
||||
{ WCD9335_CDC_RX6_RX_PATH_CFG1 , 0x44 },
|
||||
{ WCD9335_CDC_RX6_RX_PATH_MIX_CFG , 0x1e },
|
||||
{ WCD9335_CDC_RX6_RX_PATH_SEC0 , 0xfc },
|
||||
{ WCD9335_CDC_RX6_RX_PATH_SEC1 , 0x08 },
|
||||
{ WCD9335_CDC_RX6_RX_PATH_MIX_SEC0 , 0x08 },
|
||||
{ WCD9335_CDC_RX7_RX_PATH_CFG1 , 0x44 },
|
||||
{ WCD9335_CDC_RX7_RX_PATH_MIX_CFG , 0x1e },
|
||||
{ WCD9335_CDC_RX7_RX_PATH_SEC0 , 0xfc },
|
||||
{ WCD9335_CDC_RX7_RX_PATH_SEC1 , 0x08 },
|
||||
{ WCD9335_CDC_RX7_RX_PATH_MIX_SEC0 , 0x08 },
|
||||
{ WCD9335_CDC_RX8_RX_PATH_CFG1 , 0x44 },
|
||||
{ WCD9335_CDC_RX8_RX_PATH_MIX_CFG , 0x1e },
|
||||
{ WCD9335_CDC_RX8_RX_PATH_SEC0 , 0xfc },
|
||||
{ WCD9335_CDC_RX8_RX_PATH_SEC1 , 0x08 },
|
||||
{ WCD9335_CDC_RX8_RX_PATH_MIX_SEC0 , 0x08 },
|
||||
{ WCD9335_SPLINE_SRC0_CLK_RST_CTL_0 , 0x20 },
|
||||
{ WCD9335_SPLINE_SRC1_CLK_RST_CTL_0 , 0x20 },
|
||||
{ WCD9335_SPLINE_SRC2_CLK_RST_CTL_0 , 0x20 },
|
||||
{ WCD9335_SPLINE_SRC3_CLK_RST_CTL_0 , 0x20 },
|
||||
{ WCD9335_CDC_CLK_RST_CTRL_FS_CNT_CONTROL , 0x0c },
|
||||
{ WCD9335_TEST_DEBUG_NPL_DLY_TEST_1 , 0x10 },
|
||||
{ WCD9335_TEST_DEBUG_NPL_DLY_TEST_2 , 0x60 },
|
||||
{ WCD9335_DATA_HUB_NATIVE_FIFO_SYNC , 0x00 },
|
||||
{ WCD9335_DATA_HUB_NATIVE_FIFO_STATUS , 0x00 },
|
||||
{ WCD9335_CPE_SS_TX_PP_BUF_INT_PERIOD , 0x60 },
|
||||
{ WCD9335_CPE_SS_TX_PP_CFG , 0x3C },
|
||||
{ WCD9335_CPE_SS_SVA_CFG , 0x00 },
|
||||
{ WCD9335_MBHC_FSM_STATUS , 0x00 },
|
||||
{ WCD9335_FLYBACK_CTRL_1 , 0x45 },
|
||||
{ WCD9335_CDC_TX0_TX_PATH_SEC7 , 0x25 },
|
||||
{ WCD9335_SPLINE_SRC0_STATUS , 0x00 },
|
||||
{ WCD9335_SPLINE_SRC1_STATUS , 0x00 },
|
||||
{ WCD9335_SPLINE_SRC2_STATUS , 0x00 },
|
||||
{ WCD9335_SPLINE_SRC3_STATUS , 0x00 },
|
||||
{ WCD9335_CDC_PROX_DETECT_PROX_CTL_REPEAT_PAT , 0x00 },
|
||||
static const struct reg_sequence wcd9335_2_0_defaults[] = {
|
||||
{ WCD9335_CODEC_RPM_CLK_GATE , 0x07 , 0x00 },
|
||||
{ WCD9335_CODEC_RPM_PWR_CPE_DRAM1_SHUTDOWN , 0x3f , 0x00 },
|
||||
{ WCD9335_CHIP_TIER_CTRL_CHIP_ID_BYTE0 , 0x01 , 0x00 },
|
||||
{ WCD9335_CHIP_TIER_CTRL_EFUSE_CTL , 0x10 , 0x00 },
|
||||
{ WCD9335_DATA_HUB_DATA_HUB_RX0_INP_CFG , 0x08 , 0x00 },
|
||||
{ WCD9335_DATA_HUB_DATA_HUB_RX1_INP_CFG , 0x08 , 0x00 },
|
||||
{ WCD9335_DATA_HUB_DATA_HUB_RX2_INP_CFG , 0x08 , 0x00 },
|
||||
{ WCD9335_DATA_HUB_DATA_HUB_RX3_INP_CFG , 0x08 , 0x00 },
|
||||
{ WCD9335_CPE_SS_CPARMAD_BUFRDY_INT_PERIOD , 0x13 , 0x00 },
|
||||
{ WCD9335_CPE_SS_SS_ERROR_INT_MASK , 0xff , 0x00 },
|
||||
{ WCD9335_SOC_MAD_AUDIO_IIR_CTL_VAL , 0x40 , 0x00 },
|
||||
{ WCD9335_BIAS_VBG_FINE_ADJ , 0xc5 , 0x00 },
|
||||
{ WCD9335_SIDO_SIDO_CCL_2 , 0x92 , 0x00 },
|
||||
{ WCD9335_SIDO_SIDO_CCL_3 , 0x35 , 0x00 },
|
||||
{ WCD9335_SIDO_SIDO_CCL_8 , 0x6e , 0x00 },
|
||||
{ WCD9335_SIDO_SIDO_CCL_10 , 0x6e , 0x00 },
|
||||
{ WCD9335_SIDO_SIDO_DRIVER_2 , 0x55 , 0x00 },
|
||||
{ WCD9335_SIDO_SIDO_DRIVER_3 , 0x55 , 0x00 },
|
||||
{ WCD9335_SIDO_SIDO_TEST_2 , 0x0f , 0x00 },
|
||||
{ WCD9335_MBHC_ZDET_ANA_CTL , 0x0f , 0x00 },
|
||||
{ WCD9335_TX_1_2_ATEST_REFCTL , 0x0a , 0x00 },
|
||||
{ WCD9335_TX_3_4_ATEST_REFCTL , 0x0a , 0x00 },
|
||||
{ WCD9335_TX_5_6_ATEST_REFCTL , 0x0a , 0x00 },
|
||||
{ WCD9335_FLYBACK_VNEG_CTRL_1 , 0xeb , 0x00 },
|
||||
{ WCD9335_FLYBACK_VNEG_CTRL_4 , 0x7f , 0x00 },
|
||||
{ WCD9335_FLYBACK_VNEG_CTRL_9 , 0x64 , 0x00 },
|
||||
{ WCD9335_FLYBACK_VNEG_DAC_CTRL_1 , 0xed , 0x00 },
|
||||
{ WCD9335_RX_BIAS_HPH_PA , 0x9a , 0x00 },
|
||||
{ WCD9335_RX_BIAS_HPH_LOWPOWER , 0x82 , 0x00 },
|
||||
{ WCD9335_HPH_PA_CTL2 , 0x50 , 0x00 },
|
||||
{ WCD9335_HPH_L_EN , 0x80 , 0x00 },
|
||||
{ WCD9335_HPH_R_EN , 0x80 , 0x00 },
|
||||
{ WCD9335_HPH_R_ATEST , 0x54 , 0x00 },
|
||||
{ WCD9335_HPH_RDAC_LDO_CTL , 0x33 , 0x00 },
|
||||
{ WCD9335_CDC_TX0_TX_PATH_CFG0 , 0x10 , 0x00 },
|
||||
{ WCD9335_CDC_TX0_TX_PATH_CFG1 , 0x02 , 0x00 },
|
||||
{ WCD9335_CDC_TX0_TX_PATH_SEC2 , 0x01 , 0x00 },
|
||||
{ WCD9335_CDC_TX0_TX_PATH_SEC3 , 0x3c , 0x00 },
|
||||
{ WCD9335_CDC_TX1_TX_PATH_CFG0 , 0x10 , 0x00 },
|
||||
{ WCD9335_CDC_TX1_TX_PATH_CFG1 , 0x02 , 0x00 },
|
||||
{ WCD9335_CDC_TX1_TX_PATH_SEC2 , 0x01 , 0x00 },
|
||||
{ WCD9335_CDC_TX1_TX_PATH_SEC3 , 0x3c , 0x00 },
|
||||
{ WCD9335_CDC_TX2_TX_PATH_CFG0 , 0x10 , 0x00 },
|
||||
{ WCD9335_CDC_TX3_TX_PATH_CFG0 , 0x10 , 0x00 },
|
||||
{ WCD9335_CDC_TX4_TX_PATH_CFG0 , 0x10 , 0x00 },
|
||||
{ WCD9335_CDC_TX5_TX_PATH_CFG0 , 0x10 , 0x00 },
|
||||
{ WCD9335_CDC_TX6_TX_PATH_CFG0 , 0x10 , 0x00 },
|
||||
{ WCD9335_CDC_TX7_TX_PATH_CFG0 , 0x10 , 0x00 },
|
||||
{ WCD9335_CDC_TX8_TX_PATH_CFG0 , 0x10 , 0x00 },
|
||||
{ WCD9335_CDC_TX2_TX_PATH_CFG1 , 0x02 , 0x00 },
|
||||
{ WCD9335_CDC_TX3_TX_PATH_CFG1 , 0x02 , 0x00 },
|
||||
{ WCD9335_CDC_TX4_TX_PATH_CFG1 , 0x02 , 0x00 },
|
||||
{ WCD9335_CDC_TX5_TX_PATH_CFG1 , 0x02 , 0x00 },
|
||||
{ WCD9335_CDC_TX6_TX_PATH_CFG1 , 0x02 , 0x00 },
|
||||
{ WCD9335_CDC_TX7_TX_PATH_CFG1 , 0x02 , 0x00 },
|
||||
{ WCD9335_CDC_TX8_TX_PATH_CFG1 , 0x02 , 0x00 },
|
||||
{ WCD9335_CDC_TX2_TX_PATH_SEC2 , 0x01 , 0x00 },
|
||||
{ WCD9335_CDC_TX3_TX_PATH_SEC2 , 0x01 , 0x00 },
|
||||
{ WCD9335_CDC_TX4_TX_PATH_SEC2 , 0x01 , 0x00 },
|
||||
{ WCD9335_CDC_TX5_TX_PATH_SEC2 , 0x01 , 0x00 },
|
||||
{ WCD9335_CDC_TX6_TX_PATH_SEC2 , 0x01 , 0x00 },
|
||||
{ WCD9335_CDC_TX7_TX_PATH_SEC2 , 0x01 , 0x00 },
|
||||
{ WCD9335_CDC_TX8_TX_PATH_SEC2 , 0x01 , 0x00 },
|
||||
{ WCD9335_CDC_TX2_TX_PATH_SEC3 , 0x3c , 0x00 },
|
||||
{ WCD9335_CDC_TX3_TX_PATH_SEC3 , 0x3c , 0x00 },
|
||||
{ WCD9335_CDC_TX4_TX_PATH_SEC3 , 0x3c , 0x00 },
|
||||
{ WCD9335_CDC_TX5_TX_PATH_SEC3 , 0x3c , 0x00 },
|
||||
{ WCD9335_CDC_TX6_TX_PATH_SEC3 , 0x3c , 0x00 },
|
||||
{ WCD9335_CDC_TX7_TX_PATH_SEC3 , 0x3c , 0x00 },
|
||||
{ WCD9335_CDC_TX8_TX_PATH_SEC3 , 0x3c , 0x00 },
|
||||
{ WCD9335_CDC_COMPANDER1_CTL7 , 0x08 , 0x00 },
|
||||
{ WCD9335_CDC_COMPANDER2_CTL7 , 0x08 , 0x00 },
|
||||
{ WCD9335_CDC_COMPANDER3_CTL7 , 0x08 , 0x00 },
|
||||
{ WCD9335_CDC_COMPANDER4_CTL7 , 0x08 , 0x00 },
|
||||
{ WCD9335_CDC_COMPANDER5_CTL7 , 0x08 , 0x00 },
|
||||
{ WCD9335_CDC_COMPANDER6_CTL7 , 0x08 , 0x00 },
|
||||
{ WCD9335_CDC_COMPANDER7_CTL7 , 0x08 , 0x00 },
|
||||
{ WCD9335_CDC_COMPANDER8_CTL7 , 0x08 , 0x00 },
|
||||
{ WCD9335_CDC_RX0_RX_PATH_CFG1 , 0x44 , 0x00 },
|
||||
{ WCD9335_CDC_RX0_RX_PATH_MIX_CFG , 0x1e , 0x00 },
|
||||
{ WCD9335_CDC_RX0_RX_PATH_SEC0 , 0xfc , 0x00 },
|
||||
{ WCD9335_CDC_RX0_RX_PATH_SEC1 , 0x08 , 0x00 },
|
||||
{ WCD9335_CDC_RX0_RX_PATH_MIX_SEC0 , 0x08 , 0x00 },
|
||||
{ WCD9335_CDC_RX1_RX_PATH_CFG1 , 0x44 , 0x00 },
|
||||
{ WCD9335_CDC_RX1_RX_PATH_MIX_CFG , 0x1e , 0x00 },
|
||||
{ WCD9335_CDC_RX1_RX_PATH_SEC0 , 0xfc , 0x00 },
|
||||
{ WCD9335_CDC_RX1_RX_PATH_SEC1 , 0x08 , 0x00 },
|
||||
{ WCD9335_CDC_RX1_RX_PATH_MIX_SEC0 , 0x08 , 0x00 },
|
||||
{ WCD9335_CDC_RX2_RX_PATH_CFG1 , 0x44 , 0x00 },
|
||||
{ WCD9335_CDC_RX2_RX_PATH_MIX_CFG , 0x1e , 0x00 },
|
||||
{ WCD9335_CDC_RX2_RX_PATH_SEC0 , 0xfc , 0x00 },
|
||||
{ WCD9335_CDC_RX2_RX_PATH_SEC1 , 0x08 , 0x00 },
|
||||
{ WCD9335_CDC_RX2_RX_PATH_MIX_SEC0 , 0x08 , 0x00 },
|
||||
{ WCD9335_CDC_RX3_RX_PATH_CFG1 , 0x44 , 0x00 },
|
||||
{ WCD9335_CDC_RX3_RX_PATH_MIX_CFG , 0x1e , 0x00 },
|
||||
{ WCD9335_CDC_RX3_RX_PATH_SEC0 , 0xfc , 0x00 },
|
||||
{ WCD9335_CDC_RX3_RX_PATH_SEC1 , 0x08 , 0x00 },
|
||||
{ WCD9335_CDC_RX3_RX_PATH_MIX_SEC0 , 0x08 , 0x00 },
|
||||
{ WCD9335_CDC_RX4_RX_PATH_CFG1 , 0x44 , 0x00 },
|
||||
{ WCD9335_CDC_RX4_RX_PATH_MIX_CFG , 0x1e , 0x00 },
|
||||
{ WCD9335_CDC_RX4_RX_PATH_SEC0 , 0xfc , 0x00 },
|
||||
{ WCD9335_CDC_RX4_RX_PATH_SEC1 , 0x08 , 0x00 },
|
||||
{ WCD9335_CDC_RX4_RX_PATH_MIX_SEC0 , 0x08 , 0x00 },
|
||||
{ WCD9335_CDC_RX5_RX_PATH_CFG1 , 0x44 , 0x00 },
|
||||
{ WCD9335_CDC_RX5_RX_PATH_MIX_CFG , 0x1e , 0x00 },
|
||||
{ WCD9335_CDC_RX5_RX_PATH_SEC0 , 0xfc , 0x00 },
|
||||
{ WCD9335_CDC_RX5_RX_PATH_SEC1 , 0x08 , 0x00 },
|
||||
{ WCD9335_CDC_RX5_RX_PATH_MIX_SEC0 , 0x08 , 0x00 },
|
||||
{ WCD9335_CDC_RX6_RX_PATH_CFG1 , 0x44 , 0x00 },
|
||||
{ WCD9335_CDC_RX6_RX_PATH_MIX_CFG , 0x1e , 0x00 },
|
||||
{ WCD9335_CDC_RX6_RX_PATH_SEC0 , 0xfc , 0x00 },
|
||||
{ WCD9335_CDC_RX6_RX_PATH_SEC1 , 0x08 , 0x00 },
|
||||
{ WCD9335_CDC_RX6_RX_PATH_MIX_SEC0 , 0x08 , 0x00 },
|
||||
{ WCD9335_CDC_RX7_RX_PATH_CFG1 , 0x44 , 0x00 },
|
||||
{ WCD9335_CDC_RX7_RX_PATH_MIX_CFG , 0x1e , 0x00 },
|
||||
{ WCD9335_CDC_RX7_RX_PATH_SEC0 , 0xfc , 0x00 },
|
||||
{ WCD9335_CDC_RX7_RX_PATH_SEC1 , 0x08 , 0x00 },
|
||||
{ WCD9335_CDC_RX7_RX_PATH_MIX_SEC0 , 0x08 , 0x00 },
|
||||
{ WCD9335_CDC_RX8_RX_PATH_CFG1 , 0x44 , 0x00 },
|
||||
{ WCD9335_CDC_RX8_RX_PATH_MIX_CFG , 0x1e , 0x00 },
|
||||
{ WCD9335_CDC_RX8_RX_PATH_SEC0 , 0xfc , 0x00 },
|
||||
{ WCD9335_CDC_RX8_RX_PATH_SEC1 , 0x08 , 0x00 },
|
||||
{ WCD9335_CDC_RX8_RX_PATH_MIX_SEC0 , 0x08 , 0x00 },
|
||||
{ WCD9335_SPLINE_SRC0_CLK_RST_CTL_0 , 0x20 , 0x00 },
|
||||
{ WCD9335_SPLINE_SRC1_CLK_RST_CTL_0 , 0x20 , 0x00 },
|
||||
{ WCD9335_SPLINE_SRC2_CLK_RST_CTL_0 , 0x20 , 0x00 },
|
||||
{ WCD9335_SPLINE_SRC3_CLK_RST_CTL_0 , 0x20 , 0x00 },
|
||||
{ WCD9335_CDC_CLK_RST_CTRL_FS_CNT_CONTROL , 0x0c , 0x00 },
|
||||
{ WCD9335_TEST_DEBUG_NPL_DLY_TEST_1 , 0x10 , 0x00 },
|
||||
{ WCD9335_TEST_DEBUG_NPL_DLY_TEST_2 , 0x60 , 0x00 },
|
||||
{ WCD9335_DATA_HUB_NATIVE_FIFO_SYNC , 0x00 , 0x00 },
|
||||
{ WCD9335_DATA_HUB_NATIVE_FIFO_STATUS , 0x00 , 0x00 },
|
||||
{ WCD9335_CPE_SS_TX_PP_BUF_INT_PERIOD , 0x60 , 0x00 },
|
||||
{ WCD9335_CPE_SS_TX_PP_CFG , 0x3C , 0x00 },
|
||||
{ WCD9335_CPE_SS_SVA_CFG , 0x00 , 0x00 },
|
||||
{ WCD9335_MBHC_FSM_STATUS , 0x00 , 0x00 },
|
||||
{ WCD9335_FLYBACK_CTRL_1 , 0x45 , 0x00 },
|
||||
{ WCD9335_CDC_TX0_TX_PATH_SEC7 , 0x25 , 0x00 },
|
||||
{ WCD9335_SPLINE_SRC0_STATUS , 0x00 , 0x00 },
|
||||
{ WCD9335_SPLINE_SRC1_STATUS , 0x00 , 0x00 },
|
||||
{ WCD9335_SPLINE_SRC2_STATUS , 0x00 , 0x00 },
|
||||
{ WCD9335_SPLINE_SRC3_STATUS , 0x00 , 0x00 },
|
||||
{ WCD9335_CDC_PROX_DETECT_PROX_CTL_REPEAT_PAT , 0x00 , 0x00 },
|
||||
};
|
||||
|
||||
static const struct reg_default wcd9335_defaults[] = {
|
||||
|
|
|
|||
|
|
@ -1865,7 +1865,7 @@ static int wcd9xxx_init_supplies(struct wcd9xxx *wcd9xxx,
|
|||
goto err_get;
|
||||
}
|
||||
|
||||
ret = regulator_set_optimum_mode(wcd9xxx->supplies[i].consumer,
|
||||
ret = regulator_set_load(wcd9xxx->supplies[i].consumer,
|
||||
pdata->regulator[i].optimum_uA);
|
||||
if (ret < 0) {
|
||||
pr_err("%s: Setting regulator optimum mode failed for regulator %s err = %d\n",
|
||||
|
|
@ -1947,7 +1947,7 @@ static void wcd9xxx_release_supplies(struct wcd9xxx *wcd9xxx,
|
|||
continue;
|
||||
regulator_set_voltage(wcd9xxx->supplies[i].consumer, 0,
|
||||
pdata->regulator[i].max_uV);
|
||||
regulator_set_optimum_mode(wcd9xxx->supplies[i].consumer, 0);
|
||||
regulator_set_load(wcd9xxx->supplies[i].consumer, 0);
|
||||
}
|
||||
regulator_bulk_free(wcd9xxx->num_of_supplies, wcd9xxx->supplies);
|
||||
kfree(wcd9xxx->supplies);
|
||||
|
|
@ -3078,9 +3078,10 @@ static int wcd9xxx_slim_resume(struct slim_device *sldev)
|
|||
return wcd9xxx_core_res_resume(&wcd9xxx->core_res);
|
||||
}
|
||||
|
||||
static int wcd9xxx_i2c_resume(struct i2c_client *i2cdev)
|
||||
static int wcd9xxx_i2c_resume(struct device *dev)
|
||||
{
|
||||
struct wcd9xxx *wcd9xxx = dev_get_drvdata(&i2cdev->dev);
|
||||
struct wcd9xxx *wcd9xxx = dev_get_drvdata(dev);
|
||||
|
||||
if (wcd9xxx)
|
||||
return wcd9xxx_core_res_resume(&wcd9xxx->core_res);
|
||||
else
|
||||
|
|
@ -3093,9 +3094,11 @@ static int wcd9xxx_slim_suspend(struct slim_device *sldev, pm_message_t pmesg)
|
|||
return wcd9xxx_core_res_suspend(&wcd9xxx->core_res, pmesg);
|
||||
}
|
||||
|
||||
static int wcd9xxx_i2c_suspend(struct i2c_client *i2cdev, pm_message_t pmesg)
|
||||
static int wcd9xxx_i2c_suspend(struct device *dev)
|
||||
{
|
||||
struct wcd9xxx *wcd9xxx = dev_get_drvdata(&i2cdev->dev);
|
||||
struct wcd9xxx *wcd9xxx = dev_get_drvdata(dev);
|
||||
pm_message_t pmesg = {0};
|
||||
|
||||
if (wcd9xxx)
|
||||
return wcd9xxx_core_res_suspend(&wcd9xxx->core_res, pmesg);
|
||||
else
|
||||
|
|
@ -3270,40 +3273,42 @@ static struct i2c_device_id tabla_id_table[] = {
|
|||
};
|
||||
MODULE_DEVICE_TABLE(i2c, tabla_id_table);
|
||||
|
||||
static const struct dev_pm_ops wcd9xxx_i2c_pm_ops = {
|
||||
.suspend = wcd9xxx_i2c_suspend,
|
||||
.resume = wcd9xxx_i2c_resume,
|
||||
};
|
||||
|
||||
static struct i2c_driver tabla_i2c_driver = {
|
||||
.driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.name = "tabla-i2c-core",
|
||||
.pm = &wcd9xxx_i2c_pm_ops,
|
||||
},
|
||||
.id_table = tabla_id_table,
|
||||
.probe = wcd9xxx_i2c_probe,
|
||||
.remove = wcd9xxx_i2c_remove,
|
||||
.resume = wcd9xxx_i2c_resume,
|
||||
.suspend = wcd9xxx_i2c_suspend,
|
||||
};
|
||||
|
||||
static struct i2c_driver wcd9xxx_i2c_driver = {
|
||||
.driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.name = "wcd9xxx-i2c-core",
|
||||
.pm = &wcd9xxx_i2c_pm_ops,
|
||||
},
|
||||
.id_table = wcd9xxx_id_table,
|
||||
.probe = wcd9xxx_i2c_probe,
|
||||
.remove = wcd9xxx_i2c_remove,
|
||||
.resume = wcd9xxx_i2c_resume,
|
||||
.suspend = wcd9xxx_i2c_suspend,
|
||||
};
|
||||
|
||||
static struct i2c_driver wcd9335_i2c_driver = {
|
||||
.driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.name = "tasha-i2c-core",
|
||||
.pm = &wcd9xxx_i2c_pm_ops,
|
||||
},
|
||||
.id_table = tasha_id_table,
|
||||
.probe = wcd9xxx_i2c_probe,
|
||||
.remove = wcd9xxx_i2c_remove,
|
||||
.resume = wcd9xxx_i2c_resume,
|
||||
.suspend = wcd9xxx_i2c_suspend,
|
||||
};
|
||||
|
||||
static int __init wcd9xxx_init(void)
|
||||
|
|
|
|||
|
|
@ -536,15 +536,7 @@ int wcd9xxx_request_irq(struct wcd9xxx_core_resource *wcd9xxx_res,
|
|||
|
||||
virq = phyirq_to_virq(wcd9xxx_res, irq);
|
||||
|
||||
/*
|
||||
* ARM needs us to explicitly flag the IRQ as valid
|
||||
* and will set them noprobe when we do so.
|
||||
*/
|
||||
#if defined(CONFIG_ARM) || defined(CONFIG_ARM64)
|
||||
set_irq_flags(virq, IRQF_VALID);
|
||||
#else
|
||||
set_irq_noprobe(virq);
|
||||
#endif
|
||||
irq_modify_status(virq, IRQ_NOREQUEST, (IRQ_NOPROBE | IRQ_NOAUTOEN));
|
||||
|
||||
return request_threaded_irq(virq, NULL, handler, IRQF_TRIGGER_RISING,
|
||||
name, data);
|
||||
|
|
|
|||
|
|
@ -474,7 +474,7 @@ static int swrm_read(struct swr_master *master, u8 dev_num, u16 reg_addr,
|
|||
{
|
||||
struct swr_mstr_ctrl *swrm = swr_get_ctrl_data(master);
|
||||
int ret = 0;
|
||||
int val;
|
||||
int val = 0;
|
||||
u8 *reg_val = (u8 *)buf;
|
||||
|
||||
if (!swrm) {
|
||||
|
|
@ -990,7 +990,7 @@ static int swrm_get_logical_dev_num(struct swr_master *mstr, u64 dev_id,
|
|||
u8 *dev_num)
|
||||
{
|
||||
int i;
|
||||
u64 id;
|
||||
u64 id = 0;
|
||||
int ret = -EINVAL;
|
||||
struct swr_mstr_ctrl *swrm = swr_get_ctrl_data(mstr);
|
||||
|
||||
|
|
@ -1270,7 +1270,7 @@ static int swrm_clk_pause(struct swr_mstr_ctrl *swrm)
|
|||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM_RUNTIME
|
||||
#ifdef CONFIG_PM
|
||||
static int swrm_runtime_resume(struct device *dev)
|
||||
{
|
||||
struct platform_device *pdev = to_platform_device(dev);
|
||||
|
|
@ -1343,7 +1343,7 @@ exit:
|
|||
mutex_unlock(&swrm->reslock);
|
||||
return ret;
|
||||
}
|
||||
#endif /* CONFIG_PM_RUNTIME */
|
||||
#endif /* CONFIG_PM */
|
||||
|
||||
static int swrm_device_down(struct device *dev)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -35,8 +35,7 @@
|
|||
SND_JACK_UNSUPPORTED | SND_JACK_MECHANICAL)
|
||||
#define WCD_MBHC_JACK_BUTTON_MASK (SND_JACK_BTN_0 | SND_JACK_BTN_1 | \
|
||||
SND_JACK_BTN_2 | SND_JACK_BTN_3 | \
|
||||
SND_JACK_BTN_4 | SND_JACK_BTN_5 | \
|
||||
SND_JACK_BTN_6 | SND_JACK_BTN_7)
|
||||
SND_JACK_BTN_4 | SND_JACK_BTN_5 )
|
||||
#define OCP_ATTEMPT 1
|
||||
#define HS_DETECT_PLUG_TIME_MS (3 * 1000)
|
||||
#define SPECIAL_HS_DETECT_TIME_MS (2 * 1000)
|
||||
|
|
@ -1380,12 +1379,6 @@ static int wcd_mbhc_get_button_mask(struct wcd_mbhc *mbhc)
|
|||
case 5:
|
||||
mask = SND_JACK_BTN_5;
|
||||
break;
|
||||
case 6:
|
||||
mask = SND_JACK_BTN_6;
|
||||
break;
|
||||
case 7:
|
||||
mask = SND_JACK_BTN_7;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
|
@ -1967,12 +1960,6 @@ int wcd_mbhc_set_keycode(struct wcd_mbhc *mbhc)
|
|||
case 5:
|
||||
type = SND_JACK_BTN_5;
|
||||
break;
|
||||
case 6:
|
||||
type = SND_JACK_BTN_6;
|
||||
break;
|
||||
case 7:
|
||||
type = SND_JACK_BTN_7;
|
||||
break;
|
||||
default:
|
||||
WARN_ONCE(1, "Wrong button number:%d\n", i);
|
||||
result = -1;
|
||||
|
|
@ -2119,16 +2106,18 @@ int wcd_mbhc_init(struct wcd_mbhc *mbhc, struct snd_soc_codec *codec,
|
|||
}
|
||||
|
||||
if (mbhc->headset_jack.jack == NULL) {
|
||||
ret = snd_soc_jack_new(codec, "Headset Jack",
|
||||
WCD_MBHC_JACK_MASK, &mbhc->headset_jack);
|
||||
ret = snd_soc_card_jack_new(codec->component.card,
|
||||
"Headset Jack", WCD_MBHC_JACK_MASK,
|
||||
&mbhc->headset_jack, NULL, 0);
|
||||
if (ret) {
|
||||
pr_err("%s: Failed to create new jack\n", __func__);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = snd_soc_jack_new(codec, "Button Jack",
|
||||
WCD_MBHC_JACK_BUTTON_MASK,
|
||||
&mbhc->button_jack);
|
||||
ret = snd_soc_card_jack_new(codec->component.card,
|
||||
"Button Jack",
|
||||
WCD_MBHC_JACK_BUTTON_MASK,
|
||||
&mbhc->button_jack, NULL, 0);
|
||||
if (ret) {
|
||||
pr_err("Failed to create new jack\n");
|
||||
return ret;
|
||||
|
|
|
|||
|
|
@ -598,7 +598,7 @@ struct tomtom_priv {
|
|||
unsigned int rx_port_value;
|
||||
unsigned int tx_port_value;
|
||||
|
||||
struct mutex lock;
|
||||
struct mutex codec_mutex;
|
||||
};
|
||||
|
||||
static const u32 comp_shift[] = {
|
||||
|
|
@ -782,7 +782,7 @@ static int tomtom_put_anc_func(struct snd_kcontrol *kcontrol,
|
|||
struct snd_soc_dapm_context *dapm =
|
||||
snd_soc_codec_get_dapm(codec);
|
||||
|
||||
mutex_lock(&tomtom->lock);
|
||||
mutex_lock(&tomtom->codec_mutex);
|
||||
tomtom->anc_func = (!ucontrol->value.integer.value[0] ? false : true);
|
||||
|
||||
dev_dbg(codec->dev, "%s: anc_func %x", __func__, tomtom->anc_func);
|
||||
|
|
@ -810,7 +810,7 @@ static int tomtom_put_anc_func(struct snd_kcontrol *kcontrol,
|
|||
snd_soc_dapm_enable_pin(dapm, "EAR PA");
|
||||
snd_soc_dapm_enable_pin(dapm, "EAR");
|
||||
}
|
||||
mutex_unlock(&tomtom->lock);
|
||||
mutex_unlock(&tomtom->codec_mutex);
|
||||
snd_soc_dapm_sync(dapm);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -2517,13 +2517,13 @@ static int slim_tx_mixer_put(struct snd_kcontrol *kcontrol,
|
|||
widget->name, ucontrol->id.name, tomtom_p->tx_port_value,
|
||||
widget->shift, ucontrol->value.integer.value[0]);
|
||||
|
||||
mutex_lock(&tomtom_p->lock);
|
||||
mutex_lock(&tomtom_p->codec_mutex);
|
||||
|
||||
if (tomtom_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS) {
|
||||
if (dai_id != AIF1_CAP) {
|
||||
dev_err(codec->dev, "%s: invalid AIF for I2C mode\n",
|
||||
__func__);
|
||||
mutex_unlock(&tomtom_p->lock);
|
||||
mutex_unlock(&tomtom_p->codec_mutex);
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
|
@ -2548,7 +2548,7 @@ static int slim_tx_mixer_put(struct snd_kcontrol *kcontrol,
|
|||
tomtom_p->dai, NUM_CODEC_DAIS)) {
|
||||
dev_dbg(codec->dev, "%s: TX%u is used by other virtual port\n",
|
||||
__func__, port_id + 1);
|
||||
mutex_unlock(&tomtom_p->lock);
|
||||
mutex_unlock(&tomtom_p->codec_mutex);
|
||||
return 0;
|
||||
}
|
||||
tomtom_p->tx_port_value |= 1 << port_id;
|
||||
|
|
@ -2569,20 +2569,20 @@ static int slim_tx_mixer_put(struct snd_kcontrol *kcontrol,
|
|||
"this virtual port\n",
|
||||
__func__, port_id + 1);
|
||||
/* avoid update power function */
|
||||
mutex_unlock(&tomtom_p->lock);
|
||||
mutex_unlock(&tomtom_p->codec_mutex);
|
||||
return 0;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
pr_err("Unknown AIF %d\n", dai_id);
|
||||
mutex_unlock(&tomtom_p->lock);
|
||||
mutex_unlock(&tomtom_p->codec_mutex);
|
||||
return -EINVAL;
|
||||
}
|
||||
pr_debug("%s: name %s sname %s updated value %u shift %d\n", __func__,
|
||||
widget->name, widget->sname, tomtom_p->tx_port_value,
|
||||
widget->shift);
|
||||
|
||||
mutex_unlock(&tomtom_p->lock);
|
||||
mutex_unlock(&tomtom_p->codec_mutex);
|
||||
snd_soc_dapm_mixer_update_power(widget->dapm, kcontrol, enable, update);
|
||||
|
||||
return 0;
|
||||
|
|
@ -2624,7 +2624,7 @@ static int slim_rx_mux_put(struct snd_kcontrol *kcontrol,
|
|||
|
||||
tomtom_p->rx_port_value = ucontrol->value.enumerated.item[0];
|
||||
|
||||
mutex_lock(&tomtom_p->lock);
|
||||
mutex_lock(&tomtom_p->codec_mutex);
|
||||
|
||||
if (tomtom_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS) {
|
||||
if (tomtom_p->rx_port_value > 2) {
|
||||
|
|
@ -2677,13 +2677,13 @@ static int slim_rx_mux_put(struct snd_kcontrol *kcontrol,
|
|||
goto err;
|
||||
}
|
||||
rtn:
|
||||
mutex_unlock(&tomtom_p->lock);
|
||||
mutex_unlock(&tomtom_p->codec_mutex);
|
||||
snd_soc_dapm_mux_update_power(widget->dapm, kcontrol,
|
||||
tomtom_p->rx_port_value, e, update);
|
||||
|
||||
return 0;
|
||||
err:
|
||||
mutex_unlock(&tomtom_p->lock);
|
||||
mutex_unlock(&tomtom_p->codec_mutex);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
|
@ -3960,7 +3960,7 @@ static int __tomtom_codec_enable_ldo_h(struct snd_soc_dapm_widget *w,
|
|||
switch (event) {
|
||||
case SND_SOC_DAPM_PRE_PMU:
|
||||
/*
|
||||
* ldo_h_users is protected by tomtom->lock, don't need
|
||||
* ldo_h_users is protected by tomtom->codec_mutex, don't need
|
||||
* additional mutex
|
||||
*/
|
||||
if (++priv->ldo_h_users == 1) {
|
||||
|
|
@ -8292,7 +8292,7 @@ static int tomtom_post_reset_cb(struct wcd9xxx *wcd9xxx)
|
|||
snd_soc_card_change_online_state(codec->component.card, 1);
|
||||
clear_bit(BUS_DOWN, &tomtom->status_mask);
|
||||
|
||||
mutex_lock(&tomtom->lock);
|
||||
mutex_lock(&tomtom->codec_mutex);
|
||||
|
||||
tomtom_update_reg_defaults(codec);
|
||||
if (wcd9xxx->mclk_rate == TOMTOM_MCLK_CLK_12P288MHZ)
|
||||
|
|
@ -8343,7 +8343,7 @@ static int tomtom_post_reset_cb(struct wcd9xxx *wcd9xxx)
|
|||
* handling is finished.
|
||||
*/
|
||||
tomtom_enable_qfuse_sensing(codec);
|
||||
mutex_unlock(&tomtom->lock);
|
||||
mutex_unlock(&tomtom->codec_mutex);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
@ -8772,13 +8772,13 @@ static int tomtom_codec_probe(struct snd_soc_codec *codec)
|
|||
}
|
||||
|
||||
atomic_set(&kp_tomtom_priv, (unsigned long)tomtom);
|
||||
mutex_lock(&tomtom->lock);
|
||||
mutex_lock(&tomtom->codec_mutex);
|
||||
snd_soc_dapm_disable_pin(dapm, "ANC HPHL");
|
||||
snd_soc_dapm_disable_pin(dapm, "ANC HPHR");
|
||||
snd_soc_dapm_disable_pin(dapm, "ANC HEADPHONE");
|
||||
snd_soc_dapm_disable_pin(dapm, "ANC EAR PA");
|
||||
snd_soc_dapm_disable_pin(dapm, "ANC EAR");
|
||||
mutex_unlock(&tomtom->lock);
|
||||
mutex_unlock(&tomtom->codec_mutex);
|
||||
snd_soc_dapm_sync(dapm);
|
||||
|
||||
codec->component.ignore_pmdown_time = 1;
|
||||
|
|
@ -8894,14 +8894,14 @@ static int tomtom_probe(struct platform_device *pdev)
|
|||
else if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_I2C)
|
||||
ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tomtom,
|
||||
tomtom_i2s_dai, ARRAY_SIZE(tomtom_i2s_dai));
|
||||
mutex_init(&tomtom->lock);
|
||||
mutex_init(&tomtom->codec_mutex);
|
||||
return ret;
|
||||
}
|
||||
static int tomtom_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct tomtom_priv *tomtom = platform_get_drvdata(pdev);
|
||||
|
||||
mutex_destroy(&tomtom->lock);
|
||||
mutex_destroy(&tomtom->codec_mutex);
|
||||
snd_soc_unregister_codec(&pdev->dev);
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
39
sound/soc/codecs/wcd9335.c
Normal file → Executable file
39
sound/soc/codecs/wcd9335.c
Normal file → Executable file
|
|
@ -757,6 +757,7 @@ struct tasha_priv {
|
|||
int spkr_mode;
|
||||
struct hpf_work tx_hpf_work[TASHA_NUM_DECIMATORS];
|
||||
struct tx_mute_work tx_mute_dwork[TASHA_NUM_DECIMATORS];
|
||||
struct mutex codec_mutex;
|
||||
};
|
||||
|
||||
static int tasha_codec_vote_max_bw(struct snd_soc_codec *codec,
|
||||
|
|
@ -1930,7 +1931,7 @@ static int tasha_put_anc_func(struct snd_kcontrol *kcontrol,
|
|||
struct tasha_priv *tasha = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
|
||||
|
||||
mutex_lock(&tasha->lock);
|
||||
mutex_lock(&tasha->codec_mutex);
|
||||
tasha->anc_func = (!ucontrol->value.integer.value[0] ? false : true);
|
||||
|
||||
dev_dbg(codec->dev, "%s: anc_func %x", __func__, tasha->anc_func);
|
||||
|
|
@ -1978,7 +1979,7 @@ static int tasha_put_anc_func(struct snd_kcontrol *kcontrol,
|
|||
snd_soc_dapm_enable_pin(dapm, "EAR PA");
|
||||
snd_soc_dapm_enable_pin(dapm, "EAR");
|
||||
}
|
||||
mutex_unlock(&tasha->lock);
|
||||
mutex_unlock(&tasha->codec_mutex);
|
||||
snd_soc_dapm_sync(dapm);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -2093,7 +2094,7 @@ static int tasha_vi_feed_mixer_put(struct snd_kcontrol *kcontrol,
|
|||
|
||||
tasha_p->vi_feed_value = ucontrol->value.integer.value[0];
|
||||
|
||||
mutex_lock(&tasha_p->lock);
|
||||
mutex_lock(&tasha_p->codec_mutex);
|
||||
if (enable) {
|
||||
if (port_id == TASHA_TX14 && !test_bit(VI_SENSE_1,
|
||||
&tasha_p->status_mask)) {
|
||||
|
|
@ -2119,7 +2120,7 @@ static int tasha_vi_feed_mixer_put(struct snd_kcontrol *kcontrol,
|
|||
clear_bit(VI_SENSE_2, &tasha_p->status_mask);
|
||||
}
|
||||
}
|
||||
mutex_unlock(&tasha_p->lock);
|
||||
mutex_unlock(&tasha_p->codec_mutex);
|
||||
snd_soc_dapm_mixer_update_power(widget->dapm, kcontrol, enable, NULL);
|
||||
|
||||
return 0;
|
||||
|
|
@ -2162,12 +2163,12 @@ static int slim_tx_mixer_put(struct snd_kcontrol *kcontrol,
|
|||
widget->name, ucontrol->id.name, tasha_p->tx_port_value,
|
||||
widget->shift, ucontrol->value.integer.value[0]);
|
||||
|
||||
mutex_lock(&tasha_p->lock);
|
||||
mutex_lock(&tasha_p->codec_mutex);
|
||||
|
||||
if (dai_id >= ARRAY_SIZE(vport_check_table)) {
|
||||
dev_err(codec->dev, "%s: dai_id: %d, out of bounds\n",
|
||||
__func__, dai_id);
|
||||
mutex_unlock(&tasha_p->lock);
|
||||
mutex_unlock(&tasha_p->codec_mutex);
|
||||
return -EINVAL;
|
||||
}
|
||||
vtable = vport_check_table[dai_id];
|
||||
|
|
@ -2175,7 +2176,7 @@ static int slim_tx_mixer_put(struct snd_kcontrol *kcontrol,
|
|||
if (dai_id != AIF1_CAP) {
|
||||
dev_err(codec->dev, "%s: invalid AIF for I2C mode\n",
|
||||
__func__);
|
||||
mutex_unlock(&tasha_p->lock);
|
||||
mutex_unlock(&tasha_p->codec_mutex);
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
|
@ -2190,7 +2191,7 @@ static int slim_tx_mixer_put(struct snd_kcontrol *kcontrol,
|
|||
tasha_p->dai, NUM_CODEC_DAIS)) {
|
||||
dev_dbg(codec->dev, "%s: TX%u is used by other virtual port\n",
|
||||
__func__, port_id);
|
||||
mutex_unlock(&tasha_p->lock);
|
||||
mutex_unlock(&tasha_p->codec_mutex);
|
||||
return 0;
|
||||
}
|
||||
tasha_p->tx_port_value |= 1 << port_id;
|
||||
|
|
@ -2211,7 +2212,7 @@ static int slim_tx_mixer_put(struct snd_kcontrol *kcontrol,
|
|||
"this virtual port\n",
|
||||
__func__, port_id);
|
||||
/* avoid update power function */
|
||||
mutex_unlock(&tasha_p->lock);
|
||||
mutex_unlock(&tasha_p->codec_mutex);
|
||||
return 0;
|
||||
}
|
||||
break;
|
||||
|
|
@ -2219,14 +2220,14 @@ static int slim_tx_mixer_put(struct snd_kcontrol *kcontrol,
|
|||
break;
|
||||
default:
|
||||
pr_err("Unknown AIF %d\n", dai_id);
|
||||
mutex_unlock(&tasha_p->lock);
|
||||
mutex_unlock(&tasha_p->codec_mutex);
|
||||
return -EINVAL;
|
||||
}
|
||||
pr_debug("%s: name %s sname %s updated value %u shift %d\n", __func__,
|
||||
widget->name, widget->sname, tasha_p->tx_port_value,
|
||||
widget->shift);
|
||||
|
||||
mutex_unlock(&tasha_p->lock);
|
||||
mutex_unlock(&tasha_p->codec_mutex);
|
||||
snd_soc_dapm_mixer_update_power(widget->dapm, kcontrol, enable, update);
|
||||
|
||||
return 0;
|
||||
|
|
@ -2268,7 +2269,7 @@ static int slim_rx_mux_put(struct snd_kcontrol *kcontrol,
|
|||
|
||||
tasha_p->rx_port_value = ucontrol->value.enumerated.item[0];
|
||||
|
||||
mutex_lock(&tasha_p->lock);
|
||||
mutex_lock(&tasha_p->codec_mutex);
|
||||
|
||||
if (tasha_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS) {
|
||||
if (tasha_p->rx_port_value > 2) {
|
||||
|
|
@ -2331,13 +2332,13 @@ static int slim_rx_mux_put(struct snd_kcontrol *kcontrol,
|
|||
goto err;
|
||||
}
|
||||
rtn:
|
||||
mutex_unlock(&tasha_p->lock);
|
||||
mutex_unlock(&tasha_p->codec_mutex);
|
||||
snd_soc_dapm_mux_update_power(widget->dapm, kcontrol,
|
||||
tasha_p->rx_port_value, e, update);
|
||||
|
||||
return 0;
|
||||
err:
|
||||
mutex_unlock(&tasha_p->lock);
|
||||
mutex_unlock(&tasha_p->codec_mutex);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
|
@ -11707,7 +11708,7 @@ static int tasha_post_reset_cb(struct wcd9xxx *wcd9xxx)
|
|||
WCD_REGION_POWER_COLLAPSE_REMOVE,
|
||||
WCD9XXX_DIG_CORE_REGION_1);
|
||||
|
||||
mutex_lock(&tasha->lock);
|
||||
mutex_lock(&tasha->codec_mutex);
|
||||
|
||||
tasha_slimbus_slave_port_cfg.slave_dev_intfdev_la =
|
||||
control->slim_slave->laddr;
|
||||
|
|
@ -11781,7 +11782,7 @@ static int tasha_post_reset_cb(struct wcd9xxx *wcd9xxx)
|
|||
wcd_cpe_ssr_event(tasha->cpe_core, WCD_CPE_BUS_UP_EVENT);
|
||||
|
||||
err:
|
||||
mutex_unlock(&tasha->lock);
|
||||
mutex_unlock(&tasha->codec_mutex);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
@ -11944,7 +11945,7 @@ static int tasha_codec_probe(struct snd_soc_codec *codec)
|
|||
tasha_tx_mute_update_callback);
|
||||
}
|
||||
|
||||
mutex_lock(&tasha->lock);
|
||||
mutex_lock(&tasha->codec_mutex);
|
||||
snd_soc_dapm_disable_pin(dapm, "ANC LINEOUT1");
|
||||
snd_soc_dapm_disable_pin(dapm, "ANC LINEOUT2");
|
||||
snd_soc_dapm_disable_pin(dapm, "ANC LINEOUT1 PA");
|
||||
|
|
@ -11955,7 +11956,7 @@ static int tasha_codec_probe(struct snd_soc_codec *codec)
|
|||
snd_soc_dapm_disable_pin(dapm, "ANC HPHR PA");
|
||||
snd_soc_dapm_disable_pin(dapm, "ANC EAR PA");
|
||||
snd_soc_dapm_disable_pin(dapm, "ANC EAR");
|
||||
mutex_unlock(&tasha->lock);
|
||||
mutex_unlock(&tasha->codec_mutex);
|
||||
snd_soc_dapm_sync(dapm);
|
||||
|
||||
return ret;
|
||||
|
|
@ -12359,6 +12360,7 @@ static int tasha_probe(struct platform_device *pdev)
|
|||
goto cdc_reg_fail;
|
||||
}
|
||||
}
|
||||
mutex_init(&tasha->codec_mutex);
|
||||
/*
|
||||
* Init resource manager so that if child nodes such as SoundWire
|
||||
* requests for clock, resource manager can honor the request
|
||||
|
|
@ -12420,6 +12422,7 @@ static int tasha_remove(struct platform_device *pdev)
|
|||
|
||||
tasha = platform_get_drvdata(pdev);
|
||||
|
||||
mutex_destroy(&tasha->codec_mutex);
|
||||
clk_put(tasha->wcd_ext_clk);
|
||||
if (tasha->wcd_native_clk)
|
||||
clk_put(tasha->wcd_native_clk);
|
||||
|
|
|
|||
|
|
@ -28,6 +28,7 @@
|
|||
#include <sound/pcm_params.h>
|
||||
#include <sound/soc.h>
|
||||
#include <sound/soc-dapm.h>
|
||||
#include <sound/jack.h>
|
||||
#include <sound/tlv.h>
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/delay.h>
|
||||
|
|
@ -35,7 +36,6 @@
|
|||
#include <linux/kernel.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/input.h>
|
||||
#include "wcd9320.h"
|
||||
#include "wcd9xxx-mbhc.h"
|
||||
#include "wcdcal-hwdep.h"
|
||||
#include "wcd9xxx-resmgr.h"
|
||||
|
|
@ -47,8 +47,7 @@
|
|||
SND_JACK_MECHANICAL)
|
||||
#define WCD9XXX_JACK_BUTTON_MASK (SND_JACK_BTN_0 | SND_JACK_BTN_1 | \
|
||||
SND_JACK_BTN_2 | SND_JACK_BTN_3 | \
|
||||
SND_JACK_BTN_4 | SND_JACK_BTN_5 | \
|
||||
SND_JACK_BTN_6 | SND_JACK_BTN_7)
|
||||
SND_JACK_BTN_4 | SND_JACK_BTN_5 )
|
||||
|
||||
#define NUM_DCE_PLUG_DETECT 3
|
||||
#define NUM_DCE_PLUG_INS_DETECT 5
|
||||
|
|
@ -3561,12 +3560,6 @@ static int wcd9xxx_get_button_mask(const int btn)
|
|||
case 5:
|
||||
mask = SND_JACK_BTN_5;
|
||||
break;
|
||||
case 6:
|
||||
mask = SND_JACK_BTN_6;
|
||||
break;
|
||||
case 7:
|
||||
mask = SND_JACK_BTN_7;
|
||||
break;
|
||||
}
|
||||
return mask;
|
||||
}
|
||||
|
|
@ -4277,8 +4270,7 @@ static int wcd9xxx_setup_jack_detect_irq(struct wcd9xxx_mbhc *mbhc)
|
|||
ret = request_threaded_irq(mbhc->mbhc_cfg->gpio_irq, NULL,
|
||||
wcd9xxx_mech_plug_detect_irq,
|
||||
(IRQF_TRIGGER_RISING |
|
||||
IRQF_TRIGGER_FALLING |
|
||||
IRQF_DISABLED),
|
||||
IRQF_TRIGGER_FALLING),
|
||||
"headset detect", mbhc);
|
||||
if (ret) {
|
||||
pr_err("%s: Failed to request gpio irq %d\n", __func__,
|
||||
|
|
@ -4563,7 +4555,7 @@ static void wcd9xxx_cleanup_debugfs(struct wcd9xxx_mbhc *mbhc)
|
|||
|
||||
int wcd9xxx_mbhc_set_keycode(struct wcd9xxx_mbhc *mbhc)
|
||||
{
|
||||
enum snd_jack_types type;
|
||||
enum snd_jack_types type = SND_JACK_BTN_0;
|
||||
int i, ret, result = 0;
|
||||
int *btn_key_code;
|
||||
|
||||
|
|
@ -4590,12 +4582,6 @@ int wcd9xxx_mbhc_set_keycode(struct wcd9xxx_mbhc *mbhc)
|
|||
case 5:
|
||||
type = SND_JACK_BTN_5;
|
||||
break;
|
||||
case 6:
|
||||
type = SND_JACK_BTN_6;
|
||||
break;
|
||||
case 7:
|
||||
type = SND_JACK_BTN_7;
|
||||
break;
|
||||
default:
|
||||
WARN_ONCE(1, "Wrong button number:%d\n", i);
|
||||
result = -1;
|
||||
|
|
@ -5251,8 +5237,6 @@ static int wcd9xxx_detect_impedance(struct wcd9xxx_mbhc *mbhc, uint32_t *zl,
|
|||
* enable PAs and etc. Therefore codec drvier including ALSA
|
||||
* shouldn't read and write hardware registers during detection.
|
||||
*/
|
||||
mutex_lock(&codec->mutex);
|
||||
|
||||
wcd9xxx_onoff_ext_mclk(mbhc, true);
|
||||
|
||||
/*
|
||||
|
|
@ -5413,8 +5397,6 @@ static int wcd9xxx_detect_impedance(struct wcd9xxx_mbhc *mbhc, uint32_t *zl,
|
|||
if (mbhc->mbhc_cb->zdet_error_approx)
|
||||
mbhc->mbhc_cb->zdet_error_approx(mbhc, zl, zr);
|
||||
|
||||
mutex_unlock(&codec->mutex);
|
||||
|
||||
wcd9xxx_onoff_ext_mclk(mbhc, false);
|
||||
|
||||
if (!override_en)
|
||||
|
|
@ -5495,16 +5477,18 @@ int wcd9xxx_mbhc_init(struct wcd9xxx_mbhc *mbhc, struct wcd9xxx_resmgr *resmgr,
|
|||
}
|
||||
|
||||
if (mbhc->headset_jack.jack == NULL) {
|
||||
ret = snd_soc_jack_new(codec, "Headset Jack", WCD9XXX_JACK_MASK,
|
||||
&mbhc->headset_jack);
|
||||
ret = snd_soc_card_jack_new(codec->component.card,
|
||||
"Headset Jack", WCD9XXX_JACK_MASK,
|
||||
&mbhc->headset_jack, NULL, 0);
|
||||
if (ret) {
|
||||
pr_err("%s: Failed to create new jack\n", __func__);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = snd_soc_jack_new(codec, "Button Jack",
|
||||
WCD9XXX_JACK_BUTTON_MASK,
|
||||
&mbhc->button_jack);
|
||||
ret = snd_soc_card_jack_new(codec->component.card,
|
||||
"Button Jack",
|
||||
WCD9XXX_JACK_BUTTON_MASK,
|
||||
&mbhc->button_jack, NULL, 0);
|
||||
if (ret) {
|
||||
pr_err("Failed to create new jack\n");
|
||||
return ret;
|
||||
|
|
|
|||
2
sound/soc/codecs/wcdcal-hwdep.c
Normal file → Executable file
2
sound/soc/codecs/wcdcal-hwdep.c
Normal file → Executable file
|
|
@ -11,6 +11,8 @@
|
|||
* GNU General Public License for more details.
|
||||
*
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/ioctl.h>
|
||||
#include <linux/bitops.h>
|
||||
|
|
|
|||
|
|
@ -155,54 +155,54 @@ static struct reg_default wsa881x_defaults[] = {
|
|||
};
|
||||
|
||||
/* Default register reset values for WSA881x rev 1.0 or 1.1 */
|
||||
static struct reg_default wsa881x_rev_1_x[] = {
|
||||
{WSA881X_INTR_MASK, 0x1F},
|
||||
{WSA881X_OTP_REG_28, 0xFF},
|
||||
{WSA881X_OTP_REG_29, 0xFF},
|
||||
{WSA881X_OTP_REG_30, 0xFF},
|
||||
{WSA881X_OTP_REG_31, 0xFF},
|
||||
{WSA881X_TEMP_ADC_CTRL, 0x00},
|
||||
{WSA881X_ADC_SEL_IBIAS, 0x25},
|
||||
{WSA881X_SPKR_DRV_GAIN, 0x01},
|
||||
{WSA881X_SPKR_DAC_CTL, 0x40},
|
||||
{WSA881X_SPKR_BBM_CTL, 0x00},
|
||||
{WSA881X_SPKR_MISC_CTL1, 0x80},
|
||||
{WSA881X_SPKR_MISC_CTL2, 0x00},
|
||||
{WSA881X_SPKR_BIAS_INT, 0x56},
|
||||
{WSA881X_SPKR_BIAS_PSRR, 0x54},
|
||||
{WSA881X_BOOST_PS_CTL, 0xC0},
|
||||
{WSA881X_BOOST_PRESET_OUT1, 0x77},
|
||||
{WSA881X_BOOST_LOOP_STABILITY, 0xAD},
|
||||
{WSA881X_SPKR_PROT_ATEST2, 0x00},
|
||||
{WSA881X_BONGO_RESRV_REG1, 0x00},
|
||||
{WSA881X_BONGO_RESRV_REG2, 0x00},
|
||||
static struct reg_sequence wsa881x_rev_1_x[] = {
|
||||
{WSA881X_INTR_MASK, 0x1F, 0x00},
|
||||
{WSA881X_OTP_REG_28, 0xFF, 0x00},
|
||||
{WSA881X_OTP_REG_29, 0xFF, 0x00},
|
||||
{WSA881X_OTP_REG_30, 0xFF, 0x00},
|
||||
{WSA881X_OTP_REG_31, 0xFF, 0x00},
|
||||
{WSA881X_TEMP_ADC_CTRL, 0x00, 0x00},
|
||||
{WSA881X_ADC_SEL_IBIAS, 0x25, 0x00},
|
||||
{WSA881X_SPKR_DRV_GAIN, 0x01, 0x00},
|
||||
{WSA881X_SPKR_DAC_CTL, 0x40, 0x00},
|
||||
{WSA881X_SPKR_BBM_CTL, 0x00, 0x00},
|
||||
{WSA881X_SPKR_MISC_CTL1, 0x80, 0x00},
|
||||
{WSA881X_SPKR_MISC_CTL2, 0x00, 0x00},
|
||||
{WSA881X_SPKR_BIAS_INT, 0x56, 0x00},
|
||||
{WSA881X_SPKR_BIAS_PSRR, 0x54, 0x00},
|
||||
{WSA881X_BOOST_PS_CTL, 0xC0, 0x00},
|
||||
{WSA881X_BOOST_PRESET_OUT1, 0x77, 0x00},
|
||||
{WSA881X_BOOST_LOOP_STABILITY, 0xAD, 0x00},
|
||||
{WSA881X_SPKR_PROT_ATEST2, 0x00, 0x00},
|
||||
{WSA881X_BONGO_RESRV_REG1, 0x00, 0x00},
|
||||
{WSA881X_BONGO_RESRV_REG2, 0x00, 0x00},
|
||||
};
|
||||
|
||||
/* Default register reset values for WSA881x rev 2.0 */
|
||||
static struct reg_default wsa881x_rev_2_0[] = {
|
||||
{WSA881X_RESET_CTL, 0x00},
|
||||
{WSA881X_TADC_VALUE_CTL, 0x01},
|
||||
{WSA881X_INTR_MASK, 0x1B},
|
||||
{WSA881X_IOPAD_CTL, 0x00},
|
||||
{WSA881X_OTP_REG_28, 0x3F},
|
||||
{WSA881X_OTP_REG_29, 0x3F},
|
||||
{WSA881X_OTP_REG_30, 0x01},
|
||||
{WSA881X_OTP_REG_31, 0x01},
|
||||
{WSA881X_TEMP_ADC_CTRL, 0x03},
|
||||
{WSA881X_ADC_SEL_IBIAS, 0x45},
|
||||
{WSA881X_SPKR_DRV_GAIN, 0xC1},
|
||||
{WSA881X_SPKR_DAC_CTL, 0x42},
|
||||
{WSA881X_SPKR_BBM_CTL, 0x02},
|
||||
{WSA881X_SPKR_MISC_CTL1, 0x40},
|
||||
{WSA881X_SPKR_MISC_CTL2, 0x07},
|
||||
{WSA881X_SPKR_BIAS_INT, 0x5F},
|
||||
{WSA881X_SPKR_BIAS_PSRR, 0x44},
|
||||
{WSA881X_BOOST_PS_CTL, 0xA0},
|
||||
{WSA881X_BOOST_PRESET_OUT1, 0xB7},
|
||||
{WSA881X_BOOST_LOOP_STABILITY, 0x8D},
|
||||
{WSA881X_SPKR_PROT_ATEST2, 0x02},
|
||||
{WSA881X_BONGO_RESRV_REG1, 0x5E},
|
||||
{WSA881X_BONGO_RESRV_REG2, 0x07},
|
||||
static struct reg_sequence wsa881x_rev_2_0[] = {
|
||||
{WSA881X_RESET_CTL, 0x00, 0x00},
|
||||
{WSA881X_TADC_VALUE_CTL, 0x01, 0x00},
|
||||
{WSA881X_INTR_MASK, 0x1B, 0x00},
|
||||
{WSA881X_IOPAD_CTL, 0x00, 0x00},
|
||||
{WSA881X_OTP_REG_28, 0x3F, 0x00},
|
||||
{WSA881X_OTP_REG_29, 0x3F, 0x00},
|
||||
{WSA881X_OTP_REG_30, 0x01, 0x00},
|
||||
{WSA881X_OTP_REG_31, 0x01, 0x00},
|
||||
{WSA881X_TEMP_ADC_CTRL, 0x03, 0x00},
|
||||
{WSA881X_ADC_SEL_IBIAS, 0x45, 0x00},
|
||||
{WSA881X_SPKR_DRV_GAIN, 0xC1, 0x00},
|
||||
{WSA881X_SPKR_DAC_CTL, 0x42, 0x00},
|
||||
{WSA881X_SPKR_BBM_CTL, 0x02, 0x00},
|
||||
{WSA881X_SPKR_MISC_CTL1, 0x40, 0x00},
|
||||
{WSA881X_SPKR_MISC_CTL2, 0x07, 0x00},
|
||||
{WSA881X_SPKR_BIAS_INT, 0x5F, 0x00},
|
||||
{WSA881X_SPKR_BIAS_PSRR, 0x44, 0x00},
|
||||
{WSA881X_BOOST_PS_CTL, 0xA0, 0x00},
|
||||
{WSA881X_BOOST_PRESET_OUT1, 0xB7, 0x00},
|
||||
{WSA881X_BOOST_LOOP_STABILITY, 0x8D, 0x00},
|
||||
{WSA881X_SPKR_PROT_ATEST2, 0x02, 0x00},
|
||||
{WSA881X_BONGO_RESRV_REG1, 0x5E, 0x00},
|
||||
{WSA881X_BONGO_RESRV_REG2, 0x07, 0x00},
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -392,37 +392,37 @@ static const struct file_operations codec_debug_ops = {
|
|||
.read = codec_debug_read,
|
||||
};
|
||||
|
||||
static const struct reg_default wsa881x_pre_pmu_pa[] = {
|
||||
{WSA881X_SPKR_DRV_GAIN, 0x41},
|
||||
{WSA881X_SPKR_MISC_CTL1, 0x01},
|
||||
{WSA881X_ADC_EN_DET_TEST_I, 0x01},
|
||||
{WSA881X_ADC_EN_MODU_V, 0x02},
|
||||
{WSA881X_ADC_EN_DET_TEST_V, 0x10},
|
||||
{WSA881X_SPKR_PWRSTG_DBG, 0xA0},
|
||||
static const struct reg_sequence wsa881x_pre_pmu_pa[] = {
|
||||
{WSA881X_SPKR_DRV_GAIN, 0x41, 0},
|
||||
{WSA881X_SPKR_MISC_CTL1, 0x01, 0},
|
||||
{WSA881X_ADC_EN_DET_TEST_I, 0x01, 0},
|
||||
{WSA881X_ADC_EN_MODU_V, 0x02, 0},
|
||||
{WSA881X_ADC_EN_DET_TEST_V, 0x10, 0},
|
||||
{WSA881X_SPKR_PWRSTG_DBG, 0xA0, 0},
|
||||
};
|
||||
|
||||
static const struct reg_default wsa881x_pre_pmu_pa_2_0[] = {
|
||||
{WSA881X_SPKR_DRV_GAIN, 0x41},
|
||||
{WSA881X_SPKR_MISC_CTL1, 0x87},
|
||||
static const struct reg_sequence wsa881x_pre_pmu_pa_2_0[] = {
|
||||
{WSA881X_SPKR_DRV_GAIN, 0x41, 0},
|
||||
{WSA881X_SPKR_MISC_CTL1, 0x87, 0},
|
||||
};
|
||||
|
||||
static const struct reg_default wsa881x_post_pmu_pa[] = {
|
||||
{WSA881X_SPKR_PWRSTG_DBG, 0x00},
|
||||
{WSA881X_ADC_EN_DET_TEST_V, 0x00},
|
||||
{WSA881X_ADC_EN_MODU_V, 0x00},
|
||||
{WSA881X_ADC_EN_DET_TEST_I, 0x00},
|
||||
static const struct reg_sequence wsa881x_post_pmu_pa[] = {
|
||||
{WSA881X_SPKR_PWRSTG_DBG, 0x00, 0},
|
||||
{WSA881X_ADC_EN_DET_TEST_V, 0x00, 0},
|
||||
{WSA881X_ADC_EN_MODU_V, 0x00, 0},
|
||||
{WSA881X_ADC_EN_DET_TEST_I, 0x00, 0},
|
||||
};
|
||||
|
||||
static const struct reg_default wsa881x_vi_txfe_en[] = {
|
||||
{WSA881X_SPKR_PROT_FE_VSENSE_VCM, 0x85},
|
||||
{WSA881X_SPKR_PROT_ATEST2, 0x0A},
|
||||
{WSA881X_SPKR_PROT_FE_GAIN, 0xCF},
|
||||
static const struct reg_sequence wsa881x_vi_txfe_en[] = {
|
||||
{WSA881X_SPKR_PROT_FE_VSENSE_VCM, 0x85, 0},
|
||||
{WSA881X_SPKR_PROT_ATEST2, 0x0A, 0},
|
||||
{WSA881X_SPKR_PROT_FE_GAIN, 0xCF, 0},
|
||||
};
|
||||
|
||||
static const struct reg_default wsa881x_vi_txfe_en_2_0[] = {
|
||||
{WSA881X_SPKR_PROT_FE_VSENSE_VCM, 0x85},
|
||||
{WSA881X_SPKR_PROT_ATEST2, 0x0A},
|
||||
{WSA881X_SPKR_PROT_FE_GAIN, 0xCF},
|
||||
static const struct reg_sequence wsa881x_vi_txfe_en_2_0[] = {
|
||||
{WSA881X_SPKR_PROT_FE_VSENSE_VCM, 0x85, 0},
|
||||
{WSA881X_SPKR_PROT_ATEST2, 0x0A, 0},
|
||||
{WSA881X_SPKR_PROT_FE_GAIN, 0x47, 0},
|
||||
};
|
||||
|
||||
static int wsa881x_boost_ctrl(struct snd_soc_codec *codec, bool enable)
|
||||
|
|
@ -640,7 +640,7 @@ static int wsa881x_set_port(struct snd_soc_codec *codec, int port_idx,
|
|||
static int wsa881x_enable_swr_dac_port(struct snd_soc_dapm_widget *w,
|
||||
struct snd_kcontrol *kcontrol, int event)
|
||||
{
|
||||
struct snd_soc_codec *codec = w->codec;
|
||||
struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
|
||||
struct wsa881x_priv *wsa881x = snd_soc_codec_get_drvdata(codec);
|
||||
u8 port_id[WSA881X_MAX_SWR_PORTS];
|
||||
u8 num_ch[WSA881X_MAX_SWR_PORTS];
|
||||
|
|
@ -714,7 +714,7 @@ static int wsa881x_enable_swr_dac_port(struct snd_soc_dapm_widget *w,
|
|||
static int wsa881x_rdac_event(struct snd_soc_dapm_widget *w,
|
||||
struct snd_kcontrol *kcontrol, int event)
|
||||
{
|
||||
struct snd_soc_codec *codec = w->codec;
|
||||
struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
|
||||
struct wsa881x_priv *wsa881x = snd_soc_codec_get_drvdata(codec);
|
||||
|
||||
dev_dbg(codec->dev, "%s: %s %d boost %d visense %d\n", __func__,
|
||||
|
|
@ -778,7 +778,7 @@ static void wsa881x_ocp_ctl_work(struct work_struct *work)
|
|||
static int wsa881x_spkr_pa_event(struct snd_soc_dapm_widget *w,
|
||||
struct snd_kcontrol *kcontrol, int event)
|
||||
{
|
||||
struct snd_soc_codec *codec = w->codec;
|
||||
struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
|
||||
struct wsa881x_priv *wsa881x = snd_soc_codec_get_drvdata(codec);
|
||||
|
||||
dev_dbg(codec->dev, "%s: %s %d\n", __func__, w->name, event);
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue