msm: mdss: hdmi: hdcp: load keys separately before authentication
Retrieve and load the HDCP keys before starting authentication so that HDCP internal state machine can be initialized completely on cable connection to avoid possible authentication failures. Change-Id: I873fb02589bb6c19938743d44dc56ed1cfff7260 Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
This commit is contained in:
Ajay Singh Parmar
David Keitel
parent
aea583fcef
commit
8e9072d633
1 changed files with 116 additions and 137 deletions
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@ -245,17 +245,112 @@ static int hdcp_scm_call(struct scm_hdcp_req *req, u32 *resp)
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return ret;
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}
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static int hdmi_hdcp_load_keys(void *input)
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{
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int rc = 0;
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bool use_sw_keys = false;
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u32 reg_val;
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u32 ksv_lsb_addr, ksv_msb_addr;
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u32 aksv_lsb, aksv_msb;
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u8 aksv[5];
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struct dss_io_data *io;
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struct dss_io_data *qfprom_io;
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struct hdmi_hdcp_ctrl *hdcp_ctrl = input;
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if (!hdcp_ctrl || !hdcp_ctrl->init_data.core_io ||
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!hdcp_ctrl->init_data.qfprom_io) {
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DEV_ERR("%s: invalid input\n", __func__);
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rc = -EINVAL;
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goto end;
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}
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if ((HDCP_STATE_INACTIVE != hdcp_ctrl->hdcp_state) &&
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(HDCP_STATE_AUTH_FAIL != hdcp_ctrl->hdcp_state)) {
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DEV_ERR("%s: %s: invalid state. returning\n", __func__,
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HDCP_STATE_NAME);
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rc = -EINVAL;
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goto end;
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}
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io = hdcp_ctrl->init_data.core_io;
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qfprom_io = hdcp_ctrl->init_data.qfprom_io;
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/* On compatible hardware, use SW keys */
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reg_val = DSS_REG_R(qfprom_io, SEC_CTRL_HW_VERSION);
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if (reg_val >= HDCP_SEL_MIN_SEC_VERSION) {
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reg_val = DSS_REG_R(qfprom_io,
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QFPROM_RAW_FEAT_CONFIG_ROW0_MSB +
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QFPROM_RAW_VERSION_4);
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if (!(reg_val & BIT(23)))
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use_sw_keys = true;
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}
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if (use_sw_keys) {
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if (hdcp1_set_keys(&aksv_msb, &aksv_lsb)) {
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pr_err("%s: setting hdcp SW keys failed\n", __func__);
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rc = -EINVAL;
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goto end;
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}
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} else {
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/* Fetch aksv from QFPROM, this info should be public. */
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ksv_lsb_addr = HDCP_KSV_LSB;
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ksv_msb_addr = HDCP_KSV_MSB;
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if (hdcp_ctrl->hdmi_tx_ver_4) {
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ksv_lsb_addr += HDCP_KSV_VERSION_4_OFFSET;
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ksv_msb_addr += HDCP_KSV_VERSION_4_OFFSET;
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}
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aksv_lsb = DSS_REG_R(qfprom_io, ksv_lsb_addr);
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aksv_msb = DSS_REG_R(qfprom_io, ksv_msb_addr);
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}
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DEV_DBG("%s: %s: AKSV=%02x%08x\n", __func__, HDCP_STATE_NAME,
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aksv_msb, aksv_lsb);
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aksv[0] = aksv_lsb & 0xFF;
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aksv[1] = (aksv_lsb >> 8) & 0xFF;
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aksv[2] = (aksv_lsb >> 16) & 0xFF;
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aksv[3] = (aksv_lsb >> 24) & 0xFF;
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aksv[4] = aksv_msb & 0xFF;
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/* check there are 20 ones in AKSV */
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if (hdmi_hdcp_count_one(aksv, 5) != 20) {
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DEV_ERR("%s: AKSV bit count failed\n", __func__);
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rc = -EINVAL;
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goto end;
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}
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DSS_REG_W(io, HDMI_HDCP_SW_LOWER_AKSV, aksv_lsb);
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DSS_REG_W(io, HDMI_HDCP_SW_UPPER_AKSV, aksv_msb);
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/* Setup seed values for random number An */
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DSS_REG_W(io, HDMI_HDCP_ENTROPY_CTRL0, 0xB1FFB0FF);
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DSS_REG_W(io, HDMI_HDCP_ENTROPY_CTRL1, 0xF00DFACE);
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/* Disable the RngCipher state */
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DSS_REG_W(io, HDMI_HDCP_DEBUG_CTRL,
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DSS_REG_R(io, HDMI_HDCP_DEBUG_CTRL) & ~(BIT(2)));
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/* make sure hw is programmed */
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wmb();
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DSS_REG_W(io, HDMI_HDCP_CTRL, BIT(0));
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hdcp_ctrl->hdcp_state = HDCP_STATE_AUTHENTICATING;
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end:
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return rc;
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}
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static int hdmi_hdcp_authentication_part1(struct hdmi_hdcp_ctrl *hdcp_ctrl)
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{
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int rc;
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u32 reg_val;
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u32 qfprom_aksv_lsb, qfprom_aksv_msb;
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u32 link0_aksv_0, link0_aksv_1;
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u32 link0_bksv_0, link0_bksv_1;
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u32 link0_an_0, link0_an_1;
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u32 timeout_count;
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bool is_match, use_sw_keys = false;
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bool stale_an = false;
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bool is_match;
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struct dss_io_data *io;
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struct dss_io_data *hdcp_io;
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u8 aksv[5], *bksv = NULL;
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@ -264,7 +359,6 @@ static int hdmi_hdcp_authentication_part1(struct hdmi_hdcp_ctrl *hdcp_ctrl)
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struct hdmi_tx_ddc_data ddc_data;
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u32 link0_status, an_ready, keys_state;
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u8 buf[0xFF];
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u32 ksv_lsb_addr, ksv_msb_addr;
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struct scm_hdcp_req scm_buf[SCM_HDCP_MAX_REG];
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u32 phy_addr;
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@ -290,74 +384,8 @@ static int hdmi_hdcp_authentication_part1(struct hdmi_hdcp_ctrl *hdcp_ctrl)
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goto error;
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}
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/* On compatible hardware, use SW aksv */
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reg_val = DSS_REG_R(hdcp_ctrl->init_data.qfprom_io,
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SEC_CTRL_HW_VERSION);
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if (reg_val >= HDCP_SEL_MIN_SEC_VERSION) {
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reg_val = DSS_REG_R(hdcp_ctrl->init_data.qfprom_io,
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QFPROM_RAW_FEAT_CONFIG_ROW0_MSB +
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QFPROM_RAW_VERSION_4);
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if (!(reg_val & BIT(23)))
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use_sw_keys = true;
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}
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if (use_sw_keys) {
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if (hdcp1_set_keys(&qfprom_aksv_msb, &qfprom_aksv_lsb)) {
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pr_err("%s: setting of hdcp SW keys failed\n",
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__func__);
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rc = -EINVAL;
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goto error;
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}
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} else {
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/* Fetch aksv from QFPROM, this info should be public. */
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ksv_lsb_addr = HDCP_KSV_LSB;
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ksv_msb_addr = HDCP_KSV_MSB;
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if (hdcp_ctrl->hdmi_tx_ver_4) {
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ksv_lsb_addr += HDCP_KSV_VERSION_4_OFFSET;
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ksv_msb_addr += HDCP_KSV_VERSION_4_OFFSET;
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}
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qfprom_aksv_lsb = DSS_REG_R(hdcp_ctrl->init_data.qfprom_io,
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ksv_lsb_addr);
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qfprom_aksv_msb = DSS_REG_R(hdcp_ctrl->init_data.qfprom_io,
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ksv_msb_addr);
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}
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aksv[0] = qfprom_aksv_lsb & 0xFF;
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aksv[1] = (qfprom_aksv_lsb >> 8) & 0xFF;
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aksv[2] = (qfprom_aksv_lsb >> 16) & 0xFF;
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aksv[3] = (qfprom_aksv_lsb >> 24) & 0xFF;
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aksv[4] = qfprom_aksv_msb & 0xFF;
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/* check there are 20 ones in AKSV */
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if (hdmi_hdcp_count_one(aksv, 5) != 20) {
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DEV_ERR("%s: %s: AKSV QFPROM doesn't have 20 1's, 20 0's\n",
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__func__, HDCP_STATE_NAME);
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DEV_ERR("%s: %s: QFPROM AKSV chk failed (AKSV=%02x%08x)\n",
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__func__, HDCP_STATE_NAME, qfprom_aksv_msb,
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qfprom_aksv_lsb);
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rc = -EINVAL;
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goto error;
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}
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DEV_DBG("%s: %s: AKSV=%02x%08x\n", __func__, HDCP_STATE_NAME,
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qfprom_aksv_msb, qfprom_aksv_lsb);
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/*
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* Write AKSV read from QFPROM to the HDCP registers.
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* This step is needed for HDCP authentication and must be
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* written before enabling HDCP.
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*/
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DSS_REG_W(io, HDMI_HDCP_SW_LOWER_AKSV, qfprom_aksv_lsb);
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DSS_REG_W(io, HDMI_HDCP_SW_UPPER_AKSV, qfprom_aksv_msb);
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/* Check to see if link0_Status has stale values for An ready bit */
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link0_status = DSS_REG_R(io, HDMI_HDCP_LINK0_STATUS);
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DEV_DBG("%s: %s: Before enabling cipher Link0_status=0x%08x\n",
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__func__, HDCP_STATE_NAME, link0_status);
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if (link0_status & (BIT(8) | BIT(9))) {
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DEV_DBG("%s: %s: An ready even before enabling HDCP\n",
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__func__, HDCP_STATE_NAME);
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stale_an = true;
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}
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/* Clear any DDC failures from previous tries */
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reset_hdcp_ddc_failures(hdcp_ctrl);
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/*
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* Read BCAPS
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@ -387,35 +415,6 @@ static int hdmi_hdcp_authentication_part1(struct hdmi_hdcp_ctrl *hdcp_ctrl)
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hdcp_ctrl->current_tp.ds_type =
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(bcaps & BIT(6)) >> 6 ? DS_REPEATER : DS_RECEIVER;
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/*
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* HDCP setup prior to enabling HDCP_CTRL.
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* Setup seed values for random number An.
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*/
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DSS_REG_W(io, HDMI_HDCP_ENTROPY_CTRL0, 0xB1FFB0FF);
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DSS_REG_W(io, HDMI_HDCP_ENTROPY_CTRL1, 0xF00DFACE);
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/* Disable the RngCipher state */
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DSS_REG_W(io, HDMI_HDCP_DEBUG_CTRL,
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DSS_REG_R(io, HDMI_HDCP_DEBUG_CTRL) & ~(BIT(2)));
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DEV_DBG("%s: %s: HDCP_DEBUG_CTRL=0x%08x\n", __func__, HDCP_STATE_NAME,
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DSS_REG_R(io, HDMI_HDCP_DEBUG_CTRL));
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/*
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* Ensure that all register writes are completed before
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* enabling HDCP cipher
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*/
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wmb();
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/*
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* Enable HDCP
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* This needs to be done as early as possible in order for the
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* hardware to make An available to read
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*/
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DSS_REG_W(io, HDMI_HDCP_CTRL, BIT(0));
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/* Clear any DDC failures from previous tries */
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reset_hdcp_ddc_failures(hdcp_ctrl);
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/* Write BCAPS to the hardware */
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if (hdcp_ctrl->tz_hdcp) {
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memset(scm_buf, 0x00, sizeof(scm_buf));
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@ -437,19 +436,6 @@ static int hdmi_hdcp_authentication_part1(struct hdmi_hdcp_ctrl *hdcp_ctrl)
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DSS_REG_W(io, HDMI_HDCP_RCVPORT_DATA12, bcaps);
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}
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/*
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* If we had stale values for the An ready bit, it should most
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* likely be cleared now after enabling HDCP cipher
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*/
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link0_status = DSS_REG_R(io, HDMI_HDCP_LINK0_STATUS);
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DEV_DBG("%s: %s: After enabling HDCP Link0_Status=0x%08x\n",
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__func__, HDCP_STATE_NAME, link0_status);
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if (!(link0_status & (BIT(8) | BIT(9)))) {
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DEV_DBG("%s: %s: An not ready after enabling HDCP\n",
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__func__, HDCP_STATE_NAME);
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stale_an = false;
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}
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/* Wait for HDCP keys to be checked and validated */
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timeout_count = 100;
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keys_state = (link0_status >> 28) & 0x7;
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@ -497,15 +483,8 @@ static int hdmi_hdcp_authentication_part1(struct hdmi_hdcp_ctrl *hdcp_ctrl)
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goto error;
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}
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/*
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* In cases where An_ready bits had stale values, it would be
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* better to delay reading of An to avoid any potential of this
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* read being blocked
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*/
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if (stale_an) {
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msleep(200);
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stale_an = false;
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}
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/* As per hardware recommendations, wait before reading An */
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msleep(20);
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/* Read An0 and An1 */
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link0_an_0 = DSS_REG_R(io, HDMI_HDCP_RCVPORT_DATA5);
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@ -1334,11 +1313,13 @@ int hdmi_hdcp_authenticate(void *input)
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DEV_DBG("%s: %s: Queuing work to start HDCP authentication", __func__,
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HDCP_STATE_NAME);
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mutex_lock(hdcp_ctrl->init_data.mutex);
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hdcp_ctrl->hdcp_state = HDCP_STATE_AUTHENTICATING;
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mutex_unlock(hdcp_ctrl->init_data.mutex);
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queue_delayed_work(hdcp_ctrl->init_data.workq,
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&hdcp_ctrl->hdcp_auth_work, 0);
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if (!hdmi_hdcp_load_keys(input))
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queue_delayed_work(hdcp_ctrl->init_data.workq,
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&hdcp_ctrl->hdcp_auth_work, HZ/2);
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else
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queue_work(hdcp_ctrl->init_data.workq,
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&hdcp_ctrl->hdcp_int_work);
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return 0;
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} /* hdmi_hdcp_authenticate */
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@ -1380,14 +1361,12 @@ int hdmi_hdcp_reauthenticate(void *input)
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/* Disable encryption and disable the HDCP block */
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DSS_REG_W(io, HDMI_HDCP_CTRL, 0);
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/* Restart authentication attempt */
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DEV_DBG("%s: %s: Scheduling work to start HDCP authentication",
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__func__, HDCP_STATE_NAME);
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mutex_lock(hdcp_ctrl->init_data.mutex);
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hdcp_ctrl->hdcp_state = HDCP_STATE_AUTHENTICATING;
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mutex_unlock(hdcp_ctrl->init_data.mutex);
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queue_delayed_work(hdcp_ctrl->init_data.workq,
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&hdcp_ctrl->hdcp_auth_work, HZ/2);
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if (!hdmi_hdcp_load_keys(input))
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queue_delayed_work(hdcp_ctrl->init_data.workq,
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&hdcp_ctrl->hdcp_auth_work, HZ/2);
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else
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queue_work(hdcp_ctrl->init_data.workq,
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&hdcp_ctrl->hdcp_int_work);
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return ret;
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} /* hdmi_hdcp_reauthenticate */
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