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Linux 3.8-rc7

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Merge tag 'v3.8-rc7' into x86/asm

Merge in the updates to head_32.S from the previous urgent branch, as
upcoming patches will make further changes.

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
This commit is contained in:
H. Peter Anvin 2013-02-12 15:47:45 -08:00
commit 8ecba5af94
507 changed files with 4454 additions and 2604 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
Documentation/device-mapper/dm-raid.txt
View file

@ -141,3 +141,4 @@ Version History
1.2.0 Handle creation of arrays that contain failed devices. 1.2.0 Handle creation of arrays that contain failed devices.
1.3.0 Added support for RAID 10 1.3.0 Added support for RAID 10
1.3.1 Allow device replacement/rebuild for RAID 10 1.3.1 Allow device replacement/rebuild for RAID 10
1.3.2 Fix/improve redundancy checking for RAID10

5
Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
View file

@ -81,7 +81,8 @@ PA31 TXD4
Required properties for pin configuration node: Required properties for pin configuration node:
- atmel,pins: 4 integers array, represents a group of pins mux and config - atmel,pins: 4 integers array, represents a group of pins mux and config
setting. The format is atmel,pins = <PIN_BANK PIN_BANK_NUM PERIPH CONFIG>. setting. The format is atmel,pins = <PIN_BANK PIN_BANK_NUM PERIPH CONFIG>.
The PERIPH 0 means gpio. The PERIPH 0 means gpio, PERIPH 1 is periph A, PERIPH 2 is periph B...
PIN_BANK 0 is pioA, PIN_BANK 1 is pioB...
Bits used for CONFIG: Bits used for CONFIG:
PULL_UP (1 << 0): indicate this pin need a pull up. PULL_UP (1 << 0): indicate this pin need a pull up.
@ -126,7 +127,7 @@ pinctrl@fffff400 {
pinctrl_dbgu: dbgu-0 { pinctrl_dbgu: dbgu-0 {
atmel,pins = atmel,pins =
<1 14 0x1 0x0 /* PB14 periph A */ <1 14 0x1 0x0 /* PB14 periph A */
1 15 0x1 0x1>; /* PB15 periph with pullup */ 1 15 0x1 0x1>; /* PB15 periph A with pullup */
}; };
}; };
}; };

0
Documentation/hid/hid-sensor.txt Executable file → Normal file
View file

2
Documentation/kernel-parameters.txt
View file

@ -2438,7 +2438,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
real-time workloads. It can also improve energy real-time workloads. It can also improve energy
efficiency for asymmetric multiprocessors. efficiency for asymmetric multiprocessors.
rcu_nocbs_poll [KNL,BOOT] rcu_nocb_poll [KNL,BOOT]
Rather than requiring that offloaded CPUs Rather than requiring that offloaded CPUs
(specified by rcu_nocbs= above) explicitly (specified by rcu_nocbs= above) explicitly
awaken the corresponding "rcuoN" kthreads, awaken the corresponding "rcuoN" kthreads,

27
Documentation/x86/boot.txt
View file

@ -57,6 +57,10 @@ Protocol 2.10: (Kernel 2.6.31) Added a protocol for relaxed alignment
Protocol 2.11: (Kernel 3.6) Added a field for offset of EFI handover Protocol 2.11: (Kernel 3.6) Added a field for offset of EFI handover
protocol entry point. protocol entry point.
Protocol 2.12: (Kernel 3.8) Added the xloadflags field and extension fields
to struct boot_params for for loading bzImage and ramdisk
above 4G in 64bit.
**** MEMORY LAYOUT **** MEMORY LAYOUT
The traditional memory map for the kernel loader, used for Image or The traditional memory map for the kernel loader, used for Image or
@ -182,7 +186,7 @@ Offset Proto Name Meaning
0230/4 2.05+ kernel_alignment Physical addr alignment required for kernel 0230/4 2.05+ kernel_alignment Physical addr alignment required for kernel
0234/1 2.05+ relocatable_kernel Whether kernel is relocatable or not 0234/1 2.05+ relocatable_kernel Whether kernel is relocatable or not
0235/1 2.10+ min_alignment Minimum alignment, as a power of two 0235/1 2.10+ min_alignment Minimum alignment, as a power of two
0236/2 N/A pad3 Unused 0236/2 2.12+ xloadflags Boot protocol option flags
0238/4 2.06+ cmdline_size Maximum size of the kernel command line 0238/4 2.06+ cmdline_size Maximum size of the kernel command line
023C/4 2.07+ hardware_subarch Hardware subarchitecture 023C/4 2.07+ hardware_subarch Hardware subarchitecture
0240/8 2.07+ hardware_subarch_data Subarchitecture-specific data 0240/8 2.07+ hardware_subarch_data Subarchitecture-specific data
@ -582,6 +586,27 @@ Protocol: 2.10+
misaligned kernel. Therefore, a loader should typically try each misaligned kernel. Therefore, a loader should typically try each
power-of-two alignment from kernel_alignment down to this alignment. power-of-two alignment from kernel_alignment down to this alignment.
Field name: xloadflags
Type: read
Offset/size: 0x236/2
Protocol: 2.12+
This field is a bitmask.
Bit 0 (read): XLF_KERNEL_64
- If 1, this kernel has the legacy 64-bit entry point at 0x200.
Bit 1 (read): XLF_CAN_BE_LOADED_ABOVE_4G
- If 1, kernel/boot_params/cmdline/ramdisk can be above 4G.
Bit 2 (read): XLF_EFI_HANDOVER_32
- If 1, the kernel supports the 32-bit EFI handoff entry point
given at handover_offset.
Bit 3 (read): XLF_EFI_HANDOVER_64
- If 1, the kernel supports the 64-bit EFI handoff entry point
given at handover_offset + 0x200.
Field name: cmdline_size Field name: cmdline_size
Type: read Type: read
Offset/size: 0x238/4 Offset/size: 0x238/4

4
Documentation/x86/zero-page.txt
View file

@ -19,6 +19,9 @@ Offset Proto Name Meaning
090/010 ALL hd1_info hd1 disk parameter, OBSOLETE!! 090/010 ALL hd1_info hd1 disk parameter, OBSOLETE!!
0A0/010 ALL sys_desc_table System description table (struct sys_desc_table) 0A0/010 ALL sys_desc_table System description table (struct sys_desc_table)
0B0/010 ALL olpc_ofw_header OLPC's OpenFirmware CIF and friends 0B0/010 ALL olpc_ofw_header OLPC's OpenFirmware CIF and friends
0C0/004 ALL ext_ramdisk_image ramdisk_image high 32bits
0C4/004 ALL ext_ramdisk_size ramdisk_size high 32bits
0C8/004 ALL ext_cmd_line_ptr cmd_line_ptr high 32bits
140/080 ALL edid_info Video mode setup (struct edid_info) 140/080 ALL edid_info Video mode setup (struct edid_info)
1C0/020 ALL efi_info EFI 32 information (struct efi_info) 1C0/020 ALL efi_info EFI 32 information (struct efi_info)
1E0/004 ALL alk_mem_k Alternative mem check, in KB 1E0/004 ALL alk_mem_k Alternative mem check, in KB
@ -27,6 +30,7 @@ Offset Proto Name Meaning
1E9/001 ALL eddbuf_entries Number of entries in eddbuf (below) 1E9/001 ALL eddbuf_entries Number of entries in eddbuf (below)
1EA/001 ALL edd_mbr_sig_buf_entries Number of entries in edd_mbr_sig_buffer 1EA/001 ALL edd_mbr_sig_buf_entries Number of entries in edd_mbr_sig_buffer
(below) (below)
1EF/001 ALL sentinel Used to detect broken bootloaders
290/040 ALL edd_mbr_sig_buffer EDD MBR signatures 290/040 ALL edd_mbr_sig_buffer EDD MBR signatures
2D0/A00 ALL e820_map E820 memory map table 2D0/A00 ALL e820_map E820 memory map table
(array of struct e820entry) (array of struct e820entry)

10
MAINTAINERS
View file

@ -1489,7 +1489,7 @@ AVR32 ARCHITECTURE
M: Haavard Skinnemoen <hskinnemoen@gmail.com> M: Haavard Skinnemoen <hskinnemoen@gmail.com>
M: Hans-Christian Egtvedt <egtvedt@samfundet.no> M: Hans-Christian Egtvedt <egtvedt@samfundet.no>
W: http://www.atmel.com/products/AVR32/ W: http://www.atmel.com/products/AVR32/
W: http://avr32linux.org/ W: http://mirror.egtvedt.no/avr32linux.org/
W: http://avrfreaks.net/ W: http://avrfreaks.net/
S: Maintained S: Maintained
F: arch/avr32/ F: arch/avr32/
@ -2966,7 +2966,7 @@ S: Maintained
F: drivers/net/ethernet/i825xx/eexpress.* F: drivers/net/ethernet/i825xx/eexpress.*
ETHERNET BRIDGE ETHERNET BRIDGE
M: Stephen Hemminger <shemminger@vyatta.com> M: Stephen Hemminger <stephen@networkplumber.org>
L: bridge@lists.linux-foundation.org L: bridge@lists.linux-foundation.org
L: netdev@vger.kernel.org L: netdev@vger.kernel.org
W: http://www.linuxfoundation.org/en/Net:Bridge W: http://www.linuxfoundation.org/en/Net:Bridge
@ -4905,7 +4905,7 @@ S: Maintained
MARVELL GIGABIT ETHERNET DRIVERS (skge/sky2) MARVELL GIGABIT ETHERNET DRIVERS (skge/sky2)
M: Mirko Lindner <mlindner@marvell.com> M: Mirko Lindner <mlindner@marvell.com>
M: Stephen Hemminger <shemminger@vyatta.com> M: Stephen Hemminger <stephen@networkplumber.org>
L: netdev@vger.kernel.org L: netdev@vger.kernel.org
S: Maintained S: Maintained
F: drivers/net/ethernet/marvell/sk* F: drivers/net/ethernet/marvell/sk*
@ -5180,7 +5180,7 @@ S: Supported
F: drivers/infiniband/hw/nes/ F: drivers/infiniband/hw/nes/
NETEM NETWORK EMULATOR NETEM NETWORK EMULATOR
M: Stephen Hemminger <shemminger@vyatta.com> M: Stephen Hemminger <stephen@networkplumber.org>
L: netem@lists.linux-foundation.org L: netem@lists.linux-foundation.org
S: Maintained S: Maintained
F: net/sched/sch_netem.c F: net/sched/sch_netem.c
@ -7088,7 +7088,7 @@ F: include/uapi/sound/
F: sound/ F: sound/
SOUND - SOC LAYER / DYNAMIC AUDIO POWER MANAGEMENT (ASoC) SOUND - SOC LAYER / DYNAMIC AUDIO POWER MANAGEMENT (ASoC)
M: Liam Girdwood <lrg@ti.com> M: Liam Girdwood <lgirdwood@gmail.com>
M: Mark Brown <broonie@opensource.wolfsonmicro.com> M: Mark Brown <broonie@opensource.wolfsonmicro.com>
T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
L: alsa-devel@alsa-project.org (moderated for non-subscribers) L: alsa-devel@alsa-project.org (moderated for non-subscribers)

4
Makefile
View file

@ -1,8 +1,8 @@
VERSION = 3 VERSION = 3
PATCHLEVEL = 8 PATCHLEVEL = 8
SUBLEVEL = 0 SUBLEVEL = 0
EXTRAVERSION = -rc4 EXTRAVERSION = -rc7
NAME = Terrified Chipmunk NAME = Unicycling Gorilla
# *DOCUMENTATION* # *DOCUMENTATION*
# To see a list of typical targets execute "make help" # To see a list of typical targets execute "make help"

2
arch/arm/boot/dts/armada-370-db.dts
View file

@ -26,7 +26,7 @@
memory { memory {
device_type = "memory"; device_type = "memory";
reg = <0x00000000 0x20000000>; /* 512 MB */ reg = <0x00000000 0x40000000>; /* 1 GB */
}; };
soc { soc {

14
arch/arm/boot/dts/armada-xp-mv78230.dtsi
View file

@ -50,27 +50,25 @@
}; };
gpio0: gpio@d0018100 { gpio0: gpio@d0018100 {
compatible = "marvell,armadaxp-gpio"; compatible = "marvell,orion-gpio";
reg = <0xd0018100 0x40>, reg = <0xd0018100 0x40>;
<0xd0018800 0x30>;
ngpios = <32>; ngpios = <32>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
#interrupts-cells = <2>; #interrupts-cells = <2>;
interrupts = <16>, <17>, <18>, <19>; interrupts = <82>, <83>, <84>, <85>;
}; };
gpio1: gpio@d0018140 { gpio1: gpio@d0018140 {
compatible = "marvell,armadaxp-gpio"; compatible = "marvell,orion-gpio";
reg = <0xd0018140 0x40>, reg = <0xd0018140 0x40>;
<0xd0018840 0x30>;
ngpios = <17>; ngpios = <17>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
#interrupts-cells = <2>; #interrupts-cells = <2>;
interrupts = <20>, <21>, <22>; interrupts = <87>, <88>, <89>;
}; };
}; };
}; };

21
arch/arm/boot/dts/armada-xp-mv78260.dtsi
View file

@ -51,39 +51,36 @@
}; };
gpio0: gpio@d0018100 { gpio0: gpio@d0018100 {
compatible = "marvell,armadaxp-gpio"; compatible = "marvell,orion-gpio";
reg = <0xd0018100 0x40>, reg = <0xd0018100 0x40>;
<0xd0018800 0x30>;
ngpios = <32>; ngpios = <32>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
#interrupts-cells = <2>; #interrupts-cells = <2>;
interrupts = <16>, <17>, <18>, <19>; interrupts = <82>, <83>, <84>, <85>;
}; };
gpio1: gpio@d0018140 { gpio1: gpio@d0018140 {
compatible = "marvell,armadaxp-gpio"; compatible = "marvell,orion-gpio";
reg = <0xd0018140 0x40>, reg = <0xd0018140 0x40>;
<0xd0018840 0x30>;
ngpios = <32>; ngpios = <32>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
#interrupts-cells = <2>; #interrupts-cells = <2>;
interrupts = <20>, <21>, <22>, <23>; interrupts = <87>, <88>, <89>, <90>;
}; };
gpio2: gpio@d0018180 { gpio2: gpio@d0018180 {
compatible = "marvell,armadaxp-gpio"; compatible = "marvell,orion-gpio";
reg = <0xd0018180 0x40>, reg = <0xd0018180 0x40>;
<0xd0018870 0x30>;
ngpios = <3>; ngpios = <3>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
#interrupts-cells = <2>; #interrupts-cells = <2>;
interrupts = <24>; interrupts = <91>;
}; };
ethernet@d0034000 { ethernet@d0034000 {

21
arch/arm/boot/dts/armada-xp-mv78460.dtsi
View file

@ -66,39 +66,36 @@
}; };
gpio0: gpio@d0018100 { gpio0: gpio@d0018100 {
compatible = "marvell,armadaxp-gpio"; compatible = "marvell,orion-gpio";
reg = <0xd0018100 0x40>, reg = <0xd0018100 0x40>;
<0xd0018800 0x30>;
ngpios = <32>; ngpios = <32>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
#interrupts-cells = <2>; #interrupts-cells = <2>;
interrupts = <16>, <17>, <18>, <19>; interrupts = <82>, <83>, <84>, <85>;
}; };
gpio1: gpio@d0018140 { gpio1: gpio@d0018140 {
compatible = "marvell,armadaxp-gpio"; compatible = "marvell,orion-gpio";
reg = <0xd0018140 0x40>, reg = <0xd0018140 0x40>;
<0xd0018840 0x30>;
ngpios = <32>; ngpios = <32>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
#interrupts-cells = <2>; #interrupts-cells = <2>;
interrupts = <20>, <21>, <22>, <23>; interrupts = <87>, <88>, <89>, <90>;
}; };
gpio2: gpio@d0018180 { gpio2: gpio@d0018180 {
compatible = "marvell,armadaxp-gpio"; compatible = "marvell,orion-gpio";
reg = <0xd0018180 0x40>, reg = <0xd0018180 0x40>;
<0xd0018870 0x30>;
ngpios = <3>; ngpios = <3>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
#interrupts-cells = <2>; #interrupts-cells = <2>;
interrupts = <24>; interrupts = <91>;
}; };
ethernet@d0034000 { ethernet@d0034000 {

4
arch/arm/boot/dts/at91rm9200.dtsi
View file

@ -336,8 +336,8 @@
i2c@0 { i2c@0 {
compatible = "i2c-gpio"; compatible = "i2c-gpio";
gpios = <&pioA 23 0 /* sda */ gpios = <&pioA 25 0 /* sda */
&pioA 24 0 /* scl */ &pioA 26 0 /* scl */
>; >;
i2c-gpio,sda-open-drain; i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain; i2c-gpio,scl-open-drain;

60
arch/arm/boot/dts/at91sam9x5.dtsi
View file

@ -143,6 +143,11 @@
atmel,pins = atmel,pins =
<0 3 0x1 0x0>; /* PA3 periph A */ <0 3 0x1 0x0>; /* PA3 periph A */
}; };
pinctrl_usart0_sck: usart0_sck-0 {
atmel,pins =
<0 4 0x1 0x0>; /* PA4 periph A */
};
}; };
usart1 { usart1 {
@ -154,12 +159,17 @@
pinctrl_usart1_rts: usart1_rts-0 { pinctrl_usart1_rts: usart1_rts-0 {
atmel,pins = atmel,pins =
<3 27 0x3 0x0>; /* PC27 periph C */ <2 27 0x3 0x0>; /* PC27 periph C */
}; };
pinctrl_usart1_cts: usart1_cts-0 { pinctrl_usart1_cts: usart1_cts-0 {
atmel,pins = atmel,pins =
<3 28 0x3 0x0>; /* PC28 periph C */ <2 28 0x3 0x0>; /* PC28 periph C */
};
pinctrl_usart1_sck: usart1_sck-0 {
atmel,pins =
<2 28 0x3 0x0>; /* PC29 periph C */
}; };
}; };
@ -172,46 +182,56 @@
pinctrl_uart2_rts: uart2_rts-0 { pinctrl_uart2_rts: uart2_rts-0 {
atmel,pins = atmel,pins =
<0 0 0x2 0x0>; /* PB0 periph B */ <1 0 0x2 0x0>; /* PB0 periph B */
}; };
pinctrl_uart2_cts: uart2_cts-0 { pinctrl_uart2_cts: uart2_cts-0 {
atmel,pins = atmel,pins =
<0 1 0x2 0x0>; /* PB1 periph B */ <1 1 0x2 0x0>; /* PB1 periph B */
};
pinctrl_usart2_sck: usart2_sck-0 {
atmel,pins =
<1 2 0x2 0x0>; /* PB2 periph B */
}; };
}; };
usart3 { usart3 {
pinctrl_uart3: usart3-0 { pinctrl_uart3: usart3-0 {
atmel,pins = atmel,pins =
<3 23 0x2 0x1 /* PC22 periph B with pullup */ <2 23 0x2 0x1 /* PC22 periph B with pullup */
3 23 0x2 0x0>; /* PC23 periph B */ 2 23 0x2 0x0>; /* PC23 periph B */
}; };
pinctrl_usart3_rts: usart3_rts-0 { pinctrl_usart3_rts: usart3_rts-0 {
atmel,pins = atmel,pins =
<3 24 0x2 0x0>; /* PC24 periph B */ <2 24 0x2 0x0>; /* PC24 periph B */
}; };
pinctrl_usart3_cts: usart3_cts-0 { pinctrl_usart3_cts: usart3_cts-0 {
atmel,pins = atmel,pins =
<3 25 0x2 0x0>; /* PC25 periph B */ <2 25 0x2 0x0>; /* PC25 periph B */
};
pinctrl_usart3_sck: usart3_sck-0 {
atmel,pins =
<2 26 0x2 0x0>; /* PC26 periph B */
}; };
}; };
uart0 { uart0 {
pinctrl_uart0: uart0-0 { pinctrl_uart0: uart0-0 {
atmel,pins = atmel,pins =
<3 8 0x3 0x0 /* PC8 periph C */ <2 8 0x3 0x0 /* PC8 periph C */
3 9 0x3 0x1>; /* PC9 periph C with pullup */ 2 9 0x3 0x1>; /* PC9 periph C with pullup */
}; };
}; };
uart1 { uart1 {
pinctrl_uart1: uart1-0 { pinctrl_uart1: uart1-0 {
atmel,pins = atmel,pins =
<3 16 0x3 0x0 /* PC16 periph C */ <2 16 0x3 0x0 /* PC16 periph C */
3 17 0x3 0x1>; /* PC17 periph C with pullup */ 2 17 0x3 0x1>; /* PC17 periph C with pullup */
}; };
}; };
@ -240,14 +260,14 @@
pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 { pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
atmel,pins = atmel,pins =
<1 8 0x1 0x0 /* PA8 periph A */ <1 8 0x1 0x0 /* PB8 periph A */
1 11 0x1 0x0 /* PA11 periph A */ 1 11 0x1 0x0 /* PB11 periph A */
1 12 0x1 0x0 /* PA12 periph A */ 1 12 0x1 0x0 /* PB12 periph A */
1 13 0x1 0x0 /* PA13 periph A */ 1 13 0x1 0x0 /* PB13 periph A */
1 14 0x1 0x0 /* PA14 periph A */ 1 14 0x1 0x0 /* PB14 periph A */
1 15 0x1 0x0 /* PA15 periph A */ 1 15 0x1 0x0 /* PB15 periph A */
1 16 0x1 0x0 /* PA16 periph A */ 1 16 0x1 0x0 /* PB16 periph A */
1 17 0x1 0x0>; /* PA17 periph A */ 1 17 0x1 0x0>; /* PB17 periph A */
}; };
}; };

12
arch/arm/boot/dts/cros5250-common.dtsi
View file

@ -96,8 +96,8 @@
fifo-depth = <0x80>; fifo-depth = <0x80>;
card-detect-delay = <200>; card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3 3>; samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2 3>; samsung,dw-mshc-ddr-timing = <1 2>;
slot@0 { slot@0 {
reg = <0>; reg = <0>;
@ -120,8 +120,8 @@
fifo-depth = <0x80>; fifo-depth = <0x80>;
card-detect-delay = <200>; card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3 3>; samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2 3>; samsung,dw-mshc-ddr-timing = <1 2>;
slot@0 { slot@0 {
reg = <0>; reg = <0>;
@ -141,8 +141,8 @@
fifo-depth = <0x80>; fifo-depth = <0x80>;
card-detect-delay = <200>; card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3 3>; samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2 3>; samsung,dw-mshc-ddr-timing = <1 2>;
slot@0 { slot@0 {
reg = <0>; reg = <0>;

14
arch/arm/boot/dts/dove-cubox.dts
View file

@ -26,10 +26,15 @@
}; };
&uart0 { status = "okay"; }; &uart0 { status = "okay"; };
&sdio0 { status = "okay"; };
&sata0 { status = "okay"; }; &sata0 { status = "okay"; };
&i2c0 { status = "okay"; }; &i2c0 { status = "okay"; };
&sdio0 {
status = "okay";
/* sdio0 card detect is connected to wrong pin on CuBox */
cd-gpios = <&gpio0 12 1>;
};
&spi0 { &spi0 {
status = "okay"; status = "okay";
@ -42,9 +47,14 @@
}; };
&pinctrl { &pinctrl {
pinctrl-0 = <&pmx_gpio_18>; pinctrl-0 = <&pmx_gpio_12 &pmx_gpio_18>;
pinctrl-names = "default"; pinctrl-names = "default";
pmx_gpio_12: pmx-gpio-12 {
marvell,pins = "mpp12";
marvell,function = "gpio";
};
pmx_gpio_18: pmx-gpio-18 { pmx_gpio_18: pmx-gpio-18 {
marvell,pins = "mpp18"; marvell,pins = "mpp18";
marvell,function = "gpio"; marvell,function = "gpio";

8
arch/arm/boot/dts/exynos5250-smdk5250.dts
View file

@ -115,8 +115,8 @@
fifo-depth = <0x80>; fifo-depth = <0x80>;
card-detect-delay = <200>; card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3 3>; samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2 3>; samsung,dw-mshc-ddr-timing = <1 2>;
slot@0 { slot@0 {
reg = <0>; reg = <0>;
@ -139,8 +139,8 @@
fifo-depth = <0x80>; fifo-depth = <0x80>;
card-detect-delay = <200>; card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3 3>; samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2 3>; samsung,dw-mshc-ddr-timing = <1 2>;
slot@0 { slot@0 {
reg = <0>; reg = <0>;

16
arch/arm/boot/dts/kirkwood-ns2-common.dtsi
View file

@ -1,4 +1,5 @@
/include/ "kirkwood.dtsi" /include/ "kirkwood.dtsi"
/include/ "kirkwood-6281.dtsi"
/ { / {
chosen { chosen {
@ -6,6 +7,21 @@
}; };
ocp@f1000000 { ocp@f1000000 {
pinctrl: pinctrl@10000 {
pinctrl-0 = < &pmx_spi &pmx_twsi0 &pmx_uart0
&pmx_ns2_sata0 &pmx_ns2_sata1>;
pinctrl-names = "default";
pmx_ns2_sata0: pmx-ns2-sata0 {
marvell,pins = "mpp21";
marvell,function = "sata0";
};
pmx_ns2_sata1: pmx-ns2-sata1 {
marvell,pins = "mpp20";
marvell,function = "sata1";
};
};
serial@12000 { serial@12000 {
clock-frequency = <166666667>; clock-frequency = <166666667>;
status = "okay"; status = "okay";

2
arch/arm/boot/dts/kirkwood.dtsi
View file

@ -36,6 +36,7 @@
reg = <0x10100 0x40>; reg = <0x10100 0x40>;
ngpios = <32>; ngpios = <32>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>;
interrupts = <35>, <36>, <37>, <38>; interrupts = <35>, <36>, <37>, <38>;
}; };
@ -46,6 +47,7 @@
reg = <0x10140 0x40>; reg = <0x10140 0x40>;
ngpios = <18>; ngpios = <18>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>;
interrupts = <39>, <40>, <41>; interrupts = <39>, <40>, <41>;
}; };

2
arch/arm/boot/dts/kizbox.dts
View file

@ -48,6 +48,8 @@
macb0: ethernet@fffc4000 { macb0: ethernet@fffc4000 {
phy-mode = "mii"; phy-mode = "mii";
pinctrl-0 = <&pinctrl_macb_rmii
&pinctrl_macb_rmii_mii_alt>;
status = "okay"; status = "okay";
}; };

6
arch/arm/boot/dts/sunxi.dtsi
View file

@ -60,19 +60,21 @@
}; };
uart0: uart@01c28000 { uart0: uart@01c28000 {
compatible = "ns8250"; compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>; reg = <0x01c28000 0x400>;
interrupts = <1>; interrupts = <1>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>;
clock-frequency = <24000000>; clock-frequency = <24000000>;
status = "disabled"; status = "disabled";
}; };
uart1: uart@01c28400 { uart1: uart@01c28400 {
compatible = "ns8250"; compatible = "snps,dw-apb-uart";
reg = <0x01c28400 0x400>; reg = <0x01c28400 0x400>;
interrupts = <2>; interrupts = <2>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>;
clock-frequency = <24000000>; clock-frequency = <24000000>;
status = "disabled"; status = "disabled";
}; };

2
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
View file

@ -45,7 +45,6 @@
reg = <1>; reg = <1>;
}; };
/* A7s disabled till big.LITTLE patches are available...
cpu2: cpu@2 { cpu2: cpu@2 {
device_type = "cpu"; device_type = "cpu";
compatible = "arm,cortex-a7"; compatible = "arm,cortex-a7";
@ -63,7 +62,6 @@
compatible = "arm,cortex-a7"; compatible = "arm,cortex-a7";
reg = <0x102>; reg = <0x102>;
}; };
*/
}; };
memory@80000000 { memory@80000000 {

25
arch/arm/common/gic.c
View file

@ -351,6 +351,25 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq)
irq_set_chained_handler(irq, gic_handle_cascade_irq); irq_set_chained_handler(irq, gic_handle_cascade_irq);
} }
static u8 gic_get_cpumask(struct gic_chip_data *gic)
{
void __iomem *base = gic_data_dist_base(gic);
u32 mask, i;
for (i = mask = 0; i < 32; i += 4) {
mask = readl_relaxed(base + GIC_DIST_TARGET + i);
mask |= mask >> 16;
mask |= mask >> 8;
if (mask)
break;
}
if (!mask)
pr_crit("GIC CPU mask not found - kernel will fail to boot.\n");
return mask;
}
static void __init gic_dist_init(struct gic_chip_data *gic) static void __init gic_dist_init(struct gic_chip_data *gic)
{ {
unsigned int i; unsigned int i;
@ -369,7 +388,9 @@ static void __init gic_dist_init(struct gic_chip_data *gic)
/* /*
* Set all global interrupts to this CPU only. * Set all global interrupts to this CPU only.
*/ */
cpumask = readl_relaxed(base + GIC_DIST_TARGET + 0); cpumask = gic_get_cpumask(gic);
cpumask |= cpumask << 8;
cpumask |= cpumask << 16;
for (i = 32; i < gic_irqs; i += 4) for (i = 32; i < gic_irqs; i += 4)
writel_relaxed(cpumask, base + GIC_DIST_TARGET + i * 4 / 4); writel_relaxed(cpumask, base + GIC_DIST_TARGET + i * 4 / 4);
@ -400,7 +421,7 @@ static void __cpuinit gic_cpu_init(struct gic_chip_data *gic)
* Get what the GIC says our CPU mask is. * Get what the GIC says our CPU mask is.
*/ */
BUG_ON(cpu >= NR_GIC_CPU_IF); BUG_ON(cpu >= NR_GIC_CPU_IF);
cpu_mask = readl_relaxed(dist_base + GIC_DIST_TARGET + 0); cpu_mask = gic_get_cpumask(gic);
gic_cpu_map[cpu] = cpu_mask; gic_cpu_map[cpu] = cpu_mask;
/* /*

3
arch/arm/configs/at91_dt_defconfig
View file

@ -19,6 +19,7 @@ CONFIG_SOC_AT91SAM9260=y
CONFIG_SOC_AT91SAM9263=y CONFIG_SOC_AT91SAM9263=y
CONFIG_SOC_AT91SAM9G45=y CONFIG_SOC_AT91SAM9G45=y
CONFIG_SOC_AT91SAM9X5=y CONFIG_SOC_AT91SAM9X5=y
CONFIG_SOC_AT91SAM9N12=y
CONFIG_MACH_AT91SAM_DT=y CONFIG_MACH_AT91SAM_DT=y
CONFIG_AT91_PROGRAMMABLE_CLOCKS=y CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
CONFIG_AT91_TIMER_HZ=128 CONFIG_AT91_TIMER_HZ=128
@ -31,7 +32,7 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ARM_APPENDED_DTB=y CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ATAG_DTB_COMPAT=y CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_CMDLINE="mem=128M console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw" CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_AUTO_ZRELADDR=y CONFIG_AUTO_ZRELADDR=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set

2
arch/arm/include/asm/memory.h
View file

@ -37,7 +37,7 @@
*/ */
#define PAGE_OFFSET UL(CONFIG_PAGE_OFFSET) #define PAGE_OFFSET UL(CONFIG_PAGE_OFFSET)
#define TASK_SIZE (UL(CONFIG_PAGE_OFFSET) - UL(0x01000000)) #define TASK_SIZE (UL(CONFIG_PAGE_OFFSET) - UL(0x01000000))
#define TASK_UNMAPPED_BASE (UL(CONFIG_PAGE_OFFSET) / 3) #define TASK_UNMAPPED_BASE ALIGN(TASK_SIZE / 3, SZ_16M)
/* /*
* The maximum size of a 26-bit user space task. * The maximum size of a 26-bit user space task.

2
arch/arm/kernel/debug.S
View file

@ -100,12 +100,14 @@ ENTRY(printch)
b 1b b 1b
ENDPROC(printch) ENDPROC(printch)
#ifdef CONFIG_MMU
ENTRY(debug_ll_addr) ENTRY(debug_ll_addr)
addruart r2, r3, ip addruart r2, r3, ip
str r2, [r0] str r2, [r0]
str r3, [r1] str r3, [r1]
mov pc, lr mov pc, lr
ENDPROC(debug_ll_addr) ENDPROC(debug_ll_addr)
#endif
#else #else

5
arch/arm/kernel/head.S
View file

@ -246,6 +246,7 @@ __create_page_tables:
/* /*
* Then map boot params address in r2 if specified. * Then map boot params address in r2 if specified.
* We map 2 sections in case the ATAGs/DTB crosses a section boundary.
*/ */
mov r0, r2, lsr #SECTION_SHIFT mov r0, r2, lsr #SECTION_SHIFT
movs r0, r0, lsl #SECTION_SHIFT movs r0, r0, lsl #SECTION_SHIFT
@ -253,6 +254,8 @@ __create_page_tables:
addne r3, r3, #PAGE_OFFSET addne r3, r3, #PAGE_OFFSET
addne r3, r4, r3, lsr #(SECTION_SHIFT - PMD_ORDER) addne r3, r4, r3, lsr #(SECTION_SHIFT - PMD_ORDER)
orrne r6, r7, r0 orrne r6, r7, r0
strne r6, [r3], #1 << PMD_ORDER
addne r6, r6, #1 << SECTION_SHIFT
strne r6, [r3] strne r6, [r3]
#ifdef CONFIG_DEBUG_LL #ifdef CONFIG_DEBUG_LL
@ -331,7 +334,7 @@ ENTRY(secondary_startup)
* as it has already been validated by the primary processor. * as it has already been validated by the primary processor.
*/ */
#ifdef CONFIG_ARM_VIRT_EXT #ifdef CONFIG_ARM_VIRT_EXT
bl __hyp_stub_install bl __hyp_stub_install_secondary
#endif #endif
safe_svcmode_maskall r9 safe_svcmode_maskall r9

18
arch/arm/kernel/hyp-stub.S
View file

@ -99,7 +99,7 @@ ENTRY(__hyp_stub_install_secondary)
* immediately. * immediately.
*/ */
compare_cpu_mode_with_primary r4, r5, r6, r7 compare_cpu_mode_with_primary r4, r5, r6, r7
bxne lr movne pc, lr
/* /*
* Once we have given up on one CPU, we do not try to install the * Once we have given up on one CPU, we do not try to install the
@ -111,7 +111,7 @@ ENTRY(__hyp_stub_install_secondary)
*/ */
cmp r4, #HYP_MODE cmp r4, #HYP_MODE
bxne lr @ give up if the CPU is not in HYP mode movne pc, lr @ give up if the CPU is not in HYP mode
/* /*
* Configure HSCTLR to set correct exception endianness/instruction set * Configure HSCTLR to set correct exception endianness/instruction set
@ -120,7 +120,8 @@ ENTRY(__hyp_stub_install_secondary)
* Eventually, CPU-specific code might be needed -- assume not for now * Eventually, CPU-specific code might be needed -- assume not for now
* *
* This code relies on the "eret" instruction to synchronize the * This code relies on the "eret" instruction to synchronize the
* various coprocessor accesses. * various coprocessor accesses. This is done when we switch to SVC
* (see safe_svcmode_maskall).
*/ */
@ Now install the hypervisor stub: @ Now install the hypervisor stub:
adr r7, __hyp_stub_vectors adr r7, __hyp_stub_vectors
@ -155,14 +156,7 @@ THUMB( orr r7, #(1 << 30) ) @ HSCTLR.TE
1: 1:
#endif #endif
bic r7, r4, #MODE_MASK bx lr @ The boot CPU mode is left in r4.
orr r7, r7, #SVC_MODE
THUMB( orr r7, r7, #PSR_T_BIT )
msr spsr_cxsf, r7 @ This is SPSR_hyp.
__MSR_ELR_HYP(14) @ msr elr_hyp, lr
__ERET @ return, switching to SVC mode
@ The boot CPU mode is left in r4.
ENDPROC(__hyp_stub_install_secondary) ENDPROC(__hyp_stub_install_secondary)
__hyp_stub_do_trap: __hyp_stub_do_trap:
@ -200,7 +194,7 @@ ENDPROC(__hyp_get_vectors)
@ fall through @ fall through
ENTRY(__hyp_set_vectors) ENTRY(__hyp_set_vectors)
__HVC(0) __HVC(0)
bx lr mov pc, lr
ENDPROC(__hyp_set_vectors) ENDPROC(__hyp_set_vectors)
#ifndef ZIMAGE #ifndef ZIMAGE

2
arch/arm/mach-at91/setup.c
View file

@ -105,6 +105,8 @@ static void __init soc_detect(u32 dbgu_base)
switch (socid) { switch (socid) {
case ARCH_ID_AT91RM9200: case ARCH_ID_AT91RM9200:
at91_soc_initdata.type = AT91_SOC_RM9200; at91_soc_initdata.type = AT91_SOC_RM9200;
if (at91_soc_initdata.subtype == AT91_SOC_SUBTYPE_NONE)
at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
at91_boot_soc = at91rm9200_soc; at91_boot_soc = at91rm9200_soc;
break; break;

2
arch/arm/mach-exynos/Kconfig
View file

@ -414,7 +414,7 @@ config MACH_EXYNOS4_DT
select CPU_EXYNOS4210 select CPU_EXYNOS4210
select HAVE_SAMSUNG_KEYPAD if INPUT_KEYBOARD select HAVE_SAMSUNG_KEYPAD if INPUT_KEYBOARD
select PINCTRL select PINCTRL
select PINCTRL_EXYNOS4 select PINCTRL_EXYNOS
select USE_OF select USE_OF
help help
Machine support for Samsung Exynos4 machine with device tree enabled. Machine support for Samsung Exynos4 machine with device tree enabled.

1
arch/arm/mach-imx/Kconfig
View file

@ -851,6 +851,7 @@ config SOC_IMX6Q
select HAVE_CAN_FLEXCAN if CAN select HAVE_CAN_FLEXCAN if CAN
select HAVE_IMX_GPC select HAVE_IMX_GPC
select HAVE_IMX_MMDC select HAVE_IMX_MMDC
select HAVE_IMX_SRC
select HAVE_SMP select HAVE_SMP
select MFD_SYSCON select MFD_SYSCON
select PINCTRL select PINCTRL

3
arch/arm/mach-imx/clk-imx6q.c
View file

@ -436,6 +436,9 @@ int __init mx6q_clocks_init(void)
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
clk_prepare_enable(clk[clks_init_on[i]]); clk_prepare_enable(clk[clks_init_on[i]]);
/* Set initial power mode */
imx6q_set_lpm(WAIT_CLOCKED);
np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt"); np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt");
base = of_iomap(np, 0); base = of_iomap(np, 0);
WARN_ON(!base); WARN_ON(!base);

1
arch/arm/mach-imx/common.h
View file

@ -142,6 +142,7 @@ extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
extern void imx6q_clock_map_io(void); extern void imx6q_clock_map_io(void);
extern void imx_cpu_die(unsigned int cpu); extern void imx_cpu_die(unsigned int cpu);
extern int imx_cpu_kill(unsigned int cpu);
#ifdef CONFIG_PM #ifdef CONFIG_PM
extern void imx6q_pm_init(void); extern void imx6q_pm_init(void);

2
arch/arm/mach-imx/devices/platform-imx-fb.c
View file

@ -54,7 +54,7 @@ struct platform_device *__init imx_add_imx_fb(
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, },
}; };
return imx_add_platform_device_dmamask("imx-fb", 0, return imx_add_platform_device_dmamask(data->devid, 0,
res, ARRAY_SIZE(res), res, ARRAY_SIZE(res),
pdata, sizeof(*pdata), DMA_BIT_MASK(32)); pdata, sizeof(*pdata), DMA_BIT_MASK(32));
} }

12
arch/arm/mach-imx/hotplug.c
View file

@ -46,9 +46,11 @@ static inline void cpu_enter_lowpower(void)
void imx_cpu_die(unsigned int cpu) void imx_cpu_die(unsigned int cpu)
{ {
cpu_enter_lowpower(); cpu_enter_lowpower();
imx_enable_cpu(cpu, false); cpu_do_idle();
}
/* spin here until hardware takes it down */
while (1) int imx_cpu_kill(unsigned int cpu)
; {
imx_enable_cpu(cpu, false);
return 1;
} }

3
arch/arm/mach-imx/iram_alloc.c
View file

@ -22,8 +22,7 @@
#include <linux/module.h> #include <linux/module.h>
#include <linux/spinlock.h> #include <linux/spinlock.h>
#include <linux/genalloc.h> #include <linux/genalloc.h>
#include "linux/platform_data/imx-iram.h"
#include "iram.h"
static unsigned long iram_phys_base; static unsigned long iram_phys_base;
static void __iomem *iram_virt_base; static void __iomem *iram_virt_base;

1
arch/arm/mach-imx/platsmp.c
View file

@ -92,5 +92,6 @@ struct smp_operations imx_smp_ops __initdata = {
.smp_boot_secondary = imx_boot_secondary, .smp_boot_secondary = imx_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU #ifdef CONFIG_HOTPLUG_CPU
.cpu_die = imx_cpu_die, .cpu_die = imx_cpu_die,
.cpu_kill = imx_cpu_kill,
#endif #endif
}; };

1
arch/arm/mach-imx/pm-imx6q.c
View file

@ -41,6 +41,7 @@ static int imx6q_pm_enter(suspend_state_t state)
cpu_suspend(0, imx6q_suspend_finish); cpu_suspend(0, imx6q_suspend_finish);
imx_smp_prepare(); imx_smp_prepare();
imx_gpc_post_resume(); imx_gpc_post_resume();
imx6q_set_lpm(WAIT_CLOCKED);
break; break;
default: default:
return -EINVAL; return -EINVAL;

14
arch/arm/mach-integrator/pci_v3.c
View file

@ -475,13 +475,12 @@ int __init pci_v3_setup(int nr, struct pci_sys_data *sys)
{ {
int ret = 0; int ret = 0;
if (!ap_syscon_base)
return -EINVAL;
if (nr == 0) { if (nr == 0) {
sys->mem_offset = PHYS_PCI_MEM_BASE; sys->mem_offset = PHYS_PCI_MEM_BASE;
ret = pci_v3_setup_resources(sys); ret = pci_v3_setup_resources(sys);
/* Remap the Integrator system controller */
ap_syscon_base = ioremap(INTEGRATOR_SC_BASE, 0x100);
if (!ap_syscon_base)
return -EINVAL;
} }
return ret; return ret;
@ -497,6 +496,13 @@ void __init pci_v3_preinit(void)
unsigned int temp; unsigned int temp;
int ret; int ret;
/* Remap the Integrator system controller */
ap_syscon_base = ioremap(INTEGRATOR_SC_BASE, 0x100);
if (!ap_syscon_base) {
pr_err("unable to remap the AP syscon for PCIv3\n");
return;
}
pcibios_min_mem = 0x00100000; pcibios_min_mem = 0x00100000;
/* /*

38
arch/arm/mach-kirkwood/board-ns2.c
View file

@ -18,47 +18,11 @@
#include <linux/gpio.h> #include <linux/gpio.h>
#include <linux/of.h> #include <linux/of.h>
#include "common.h" #include "common.h"
#include "mpp.h"
static struct mv643xx_eth_platform_data ns2_ge00_data = { static struct mv643xx_eth_platform_data ns2_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(8), .phy_addr = MV643XX_ETH_PHY_ADDR(8),
}; };
static unsigned int ns2_mpp_config[] __initdata = {
MPP0_SPI_SCn,
MPP1_SPI_MOSI,
MPP2_SPI_SCK,
MPP3_SPI_MISO,
MPP4_NF_IO6,
MPP5_NF_IO7,
MPP6_SYSRST_OUTn,
MPP7_GPO, /* Fan speed (bit 1) */
MPP8_TW0_SDA,
MPP9_TW0_SCK,
MPP10_UART0_TXD,
MPP11_UART0_RXD,
MPP12_GPO, /* Red led */
MPP14_GPIO, /* USB fuse */
MPP16_GPIO, /* SATA 0 power */
MPP17_GPIO, /* SATA 1 power */
MPP18_NF_IO0,
MPP19_NF_IO1,
MPP20_SATA1_ACTn,
MPP21_SATA0_ACTn,
MPP22_GPIO, /* Fan speed (bit 0) */
MPP23_GPIO, /* Fan power */
MPP24_GPIO, /* USB mode select */
MPP25_GPIO, /* Fan rotation fail */
MPP26_GPIO, /* USB device vbus */
MPP28_GPIO, /* USB enable host vbus */
MPP29_GPIO, /* Blue led (slow register) */
MPP30_GPIO, /* Blue led (command register) */
MPP31_GPIO, /* Board power off */
MPP32_GPIO, /* Power button (0 = Released, 1 = Pushed) */
MPP33_GPO, /* Fan speed (bit 2) */
0
};
#define NS2_GPIO_POWER_OFF 31 #define NS2_GPIO_POWER_OFF 31
static void ns2_power_off(void) static void ns2_power_off(void)
@ -71,8 +35,6 @@ void __init ns2_init(void)
/* /*
* Basic setup. Needs to be called early. * Basic setup. Needs to be called early.
*/ */
kirkwood_mpp_conf(ns2_mpp_config);
if (of_machine_is_compatible("lacie,netspace_lite_v2") || if (of_machine_is_compatible("lacie,netspace_lite_v2") ||
of_machine_is_compatible("lacie,netspace_mini_v2")) of_machine_is_compatible("lacie,netspace_mini_v2"))
ns2_ge00_data.phy_addr = MV643XX_ETH_PHY_ADDR(0); ns2_ge00_data.phy_addr = MV643XX_ETH_PHY_ADDR(0);

2
arch/arm/mach-mvebu/Makefile
View file

@ -1,6 +1,8 @@
ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \
-I$(srctree)/arch/arm/plat-orion/include -I$(srctree)/arch/arm/plat-orion/include
AFLAGS_coherency_ll.o := -Wa,-march=armv7-a
obj-y += system-controller.o obj-y += system-controller.o
obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o irq-armada-370-xp.o addr-map.o coherency.o coherency_ll.o pmsu.o obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o irq-armada-370-xp.o addr-map.o coherency.o coherency_ll.o pmsu.o
obj-$(CONFIG_SMP) += platsmp.o headsmp.o obj-$(CONFIG_SMP) += platsmp.o headsmp.o

6
arch/arm/mach-omap2/board-omap4panda.c
View file

@ -397,6 +397,12 @@ static struct omap_board_mux board_mux[] __initdata = {
OMAP_PULL_ENA), OMAP_PULL_ENA),
OMAP4_MUX(ABE_MCBSP1_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), OMAP4_MUX(ABE_MCBSP1_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
/* UART2 - BT/FM/GPS shared transport */
OMAP4_MUX(UART2_CTS, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
OMAP4_MUX(UART2_RTS, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
OMAP4_MUX(UART2_RX, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
OMAP4_MUX(UART2_TX, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
{ .reg_offset = OMAP_MUX_TERMINATOR }, { .reg_offset = OMAP_MUX_TERMINATOR },
}; };

2
arch/arm/mach-omap2/cclock2420_data.c
View file

@ -1935,6 +1935,8 @@ int __init omap2420_clk_init(void)
omap2_init_clk_hw_omap_clocks(c->lk.clk); omap2_init_clk_hw_omap_clocks(c->lk.clk);
} }
omap2xxx_clkt_vps_late_init();
omap2_clk_disable_autoidle_all(); omap2_clk_disable_autoidle_all();
omap2_clk_enable_init_clocks(enable_init_clks, omap2_clk_enable_init_clocks(enable_init_clks,

2
arch/arm/mach-omap2/cclock2430_data.c
View file

@ -2050,6 +2050,8 @@ int __init omap2430_clk_init(void)
omap2_init_clk_hw_omap_clocks(c->lk.clk); omap2_init_clk_hw_omap_clocks(c->lk.clk);
} }
omap2xxx_clkt_vps_late_init();
omap2_clk_disable_autoidle_all(); omap2_clk_disable_autoidle_all();
omap2_clk_enable_init_clocks(enable_init_clks, omap2_clk_enable_init_clocks(enable_init_clks,

13
arch/arm/mach-omap2/cclock44xx_data.c
View file

@ -2026,14 +2026,13 @@ int __init omap4xxx_clk_init(void)
* On OMAP4460 the ABE DPLL fails to turn on if in idle low-power * On OMAP4460 the ABE DPLL fails to turn on if in idle low-power
* state when turning the ABE clock domain. Workaround this by * state when turning the ABE clock domain. Workaround this by
* locking the ABE DPLL on boot. * locking the ABE DPLL on boot.
* Lock the ABE DPLL in any case to avoid issues with audio.
*/ */
if (cpu_is_omap446x()) { rc = clk_set_parent(&abe_dpll_refclk_mux_ck, &sys_32k_ck);
rc = clk_set_parent(&abe_dpll_refclk_mux_ck, &sys_32k_ck); if (!rc)
if (!rc) rc = clk_set_rate(&dpll_abe_ck, OMAP4_DPLL_ABE_DEFFREQ);
rc = clk_set_rate(&dpll_abe_ck, OMAP4_DPLL_ABE_DEFFREQ); if (rc)
if (rc) pr_err("%s: failed to configure ABE DPLL!\n", __func__);
pr_err("%s: failed to configure ABE DPLL!\n", __func__);
}
return 0; return 0;
} }

2
arch/arm/mach-omap2/devices.c
View file

@ -639,7 +639,7 @@ static int count_ocp2scp_devices(struct omap_ocp2scp_dev *ocp2scp_dev)
return cnt; return cnt;
} }
static void omap_init_ocp2scp(void) static void __init omap_init_ocp2scp(void)
{ {
struct omap_hwmod *oh; struct omap_hwmod *oh;
struct platform_device *pdev; struct platform_device *pdev;

3
arch/arm/mach-omap2/drm.c
View file

@ -25,6 +25,7 @@
#include <linux/dma-mapping.h> #include <linux/dma-mapping.h>
#include <linux/platform_data/omap_drm.h> #include <linux/platform_data/omap_drm.h>
#include "soc.h"
#include "omap_device.h" #include "omap_device.h"
#include "omap_hwmod.h" #include "omap_hwmod.h"
@ -56,7 +57,7 @@ static int __init omap_init_drm(void)
oh->name); oh->name);
} }
platform_data.omaprev = GET_OMAP_REVISION(); platform_data.omaprev = GET_OMAP_TYPE;
return platform_device_register(&omap_drm_device); return platform_device_register(&omap_drm_device);

6
arch/arm/mach-omap2/omap_hwmod_44xx_data.c
View file

@ -2132,8 +2132,12 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = {
* currently reset very early during boot, before I2C is * currently reset very early during boot, before I2C is
* available, so it doesn't seem that we have any choice in * available, so it doesn't seem that we have any choice in
* the kernel other than to avoid resetting it. * the kernel other than to avoid resetting it.
*
* Also, McPDM needs to be configured to NO_IDLE mode when it
* is in used otherwise vital clocks will be gated which
* results 'slow motion' audio playback.
*/ */
.flags = HWMOD_EXT_OPT_MAIN_CLK, .flags = HWMOD_EXT_OPT_MAIN_CLK | HWMOD_SWSUP_SIDLE,
.mpu_irqs = omap44xx_mcpdm_irqs, .mpu_irqs = omap44xx_mcpdm_irqs,
.sdma_reqs = omap44xx_mcpdm_sdma_reqs, .sdma_reqs = omap44xx_mcpdm_sdma_reqs,
.main_clk = "mcpdm_fck", .main_clk = "mcpdm_fck",

8
arch/arm/mach-omap2/timer.c
View file

@ -165,15 +165,11 @@ static struct device_node * __init omap_get_timer_dt(struct of_device_id *match,
struct device_node *np; struct device_node *np;
for_each_matching_node(np, match) { for_each_matching_node(np, match) {
if (!of_device_is_available(np)) { if (!of_device_is_available(np))
of_node_put(np);
continue; continue;
}
if (property && !of_get_property(np, property, NULL)) { if (property && !of_get_property(np, property, NULL))
of_node_put(np);
continue; continue;
}
of_add_property(np, &device_disabled); of_add_property(np, &device_disabled);
return np; return np;

2
arch/arm/mach-realview/include/mach/irqs-eb.h
View file

@ -115,7 +115,7 @@
/* /*
* Only define NR_IRQS if less than NR_IRQS_EB * Only define NR_IRQS if less than NR_IRQS_EB
*/ */
#define NR_IRQS_EB (IRQ_EB_GIC_START + 96) #define NR_IRQS_EB (IRQ_EB_GIC_START + 128)
#if defined(CONFIG_MACH_REALVIEW_EB) \ #if defined(CONFIG_MACH_REALVIEW_EB) \
&& (!defined(NR_IRQS) || (NR_IRQS < NR_IRQS_EB)) && (!defined(NR_IRQS) || (NR_IRQS < NR_IRQS_EB))

2
arch/arm/mach-s3c64xx/mach-crag6410-module.c
View file

@ -47,7 +47,7 @@ static struct spi_board_info wm1253_devs[] = {
.bus_num = 0, .bus_num = 0,
.chip_select = 0, .chip_select = 0,
.mode = SPI_MODE_0, .mode = SPI_MODE_0,
.irq = S3C_EINT(5), .irq = S3C_EINT(4),
.controller_data = &wm0010_spi_csinfo, .controller_data = &wm0010_spi_csinfo,
.platform_data = &wm0010_pdata, .platform_data = &wm0010_pdata,
}, },

2
arch/arm/mach-s3c64xx/pm.c
View file

@ -338,8 +338,10 @@ int __init s3c64xx_pm_init(void)
for (i = 0; i < ARRAY_SIZE(s3c64xx_pm_domains); i++) for (i = 0; i < ARRAY_SIZE(s3c64xx_pm_domains); i++)
pm_genpd_init(&s3c64xx_pm_domains[i]->pd, NULL, false); pm_genpd_init(&s3c64xx_pm_domains[i]->pd, NULL, false);
#ifdef CONFIG_S3C_DEV_FB
if (dev_get_platdata(&s3c_device_fb.dev)) if (dev_get_platdata(&s3c_device_fb.dev))
pm_genpd_add_device(&s3c64xx_pm_f.pd, &s3c_device_fb.dev); pm_genpd_add_device(&s3c64xx_pm_f.pd, &s3c_device_fb.dev);
#endif
return 0; return 0;
} }

20
arch/arm/mm/dma-mapping.c
View file

@ -640,7 +640,7 @@ static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
if (is_coherent || nommu()) if (is_coherent || nommu())
addr = __alloc_simple_buffer(dev, size, gfp, &page); addr = __alloc_simple_buffer(dev, size, gfp, &page);
else if (gfp & GFP_ATOMIC) else if (!(gfp & __GFP_WAIT))
addr = __alloc_from_pool(size, &page); addr = __alloc_from_pool(size, &page);
else if (!IS_ENABLED(CONFIG_CMA)) else if (!IS_ENABLED(CONFIG_CMA))
addr = __alloc_remap_buffer(dev, size, gfp, prot, &page, caller); addr = __alloc_remap_buffer(dev, size, gfp, prot, &page, caller);
@ -774,25 +774,27 @@ static void dma_cache_maint_page(struct page *page, unsigned long offset,
size_t size, enum dma_data_direction dir, size_t size, enum dma_data_direction dir,
void (*op)(const void *, size_t, int)) void (*op)(const void *, size_t, int))
{ {
unsigned long pfn;
size_t left = size;
pfn = page_to_pfn(page) + offset / PAGE_SIZE;
offset %= PAGE_SIZE;
/* /*
* A single sg entry may refer to multiple physically contiguous * A single sg entry may refer to multiple physically contiguous
* pages. But we still need to process highmem pages individually. * pages. But we still need to process highmem pages individually.
* If highmem is not configured then the bulk of this loop gets * If highmem is not configured then the bulk of this loop gets
* optimized out. * optimized out.
*/ */
size_t left = size;
do { do {
size_t len = left; size_t len = left;
void *vaddr; void *vaddr;
page = pfn_to_page(pfn);
if (PageHighMem(page)) { if (PageHighMem(page)) {
if (len + offset > PAGE_SIZE) { if (len + offset > PAGE_SIZE)
if (offset >= PAGE_SIZE) {
page += offset / PAGE_SIZE;
offset %= PAGE_SIZE;
}
len = PAGE_SIZE - offset; len = PAGE_SIZE - offset;
}
vaddr = kmap_high_get(page); vaddr = kmap_high_get(page);
if (vaddr) { if (vaddr) {
vaddr += offset; vaddr += offset;
@ -809,7 +811,7 @@ static void dma_cache_maint_page(struct page *page, unsigned long offset,
op(vaddr, len, dir); op(vaddr, len, dir);
} }
offset = 0; offset = 0;
page++; pfn++;
left -= len; left -= len;
} while (left); } while (left);
} }

2
arch/arm/mm/mmu.c
View file

@ -283,7 +283,7 @@ static struct mem_type mem_types[] = {
}, },
[MT_MEMORY_SO] = { [MT_MEMORY_SO] = {
.prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
L_PTE_MT_UNCACHED, L_PTE_MT_UNCACHED | L_PTE_XN,
.prot_l1 = PMD_TYPE_TABLE, .prot_l1 = PMD_TYPE_TABLE,
.prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_S | .prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_S |
PMD_SECT_UNCACHED | PMD_SECT_XN, PMD_SECT_UNCACHED | PMD_SECT_XN,

2
arch/arm/plat-versatile/headsmp.S
View file

@ -20,7 +20,7 @@
*/ */
ENTRY(versatile_secondary_startup) ENTRY(versatile_secondary_startup)
mrc p15, 0, r0, c0, c0, 5 mrc p15, 0, r0, c0, c0, 5
and r0, r0, #15 bic r0, #0xff000000
adr r4, 1f adr r4, 1f
ldmia r4, {r5, r6} ldmia r4, {r5, r6}
sub r4, r4, r5 sub r4, r4, r5

6
arch/arm/vfp/entry.S
View file

@ -22,7 +22,7 @@
@ IRQs disabled. @ IRQs disabled.
@ @
ENTRY(do_vfp) ENTRY(do_vfp)
#ifdef CONFIG_PREEMPT #ifdef CONFIG_PREEMPT_COUNT
ldr r4, [r10, #TI_PREEMPT] @ get preempt count ldr r4, [r10, #TI_PREEMPT] @ get preempt count
add r11, r4, #1 @ increment it add r11, r4, #1 @ increment it
str r11, [r10, #TI_PREEMPT] str r11, [r10, #TI_PREEMPT]
@ -35,7 +35,7 @@ ENTRY(do_vfp)
ENDPROC(do_vfp) ENDPROC(do_vfp)
ENTRY(vfp_null_entry) ENTRY(vfp_null_entry)
#ifdef CONFIG_PREEMPT #ifdef CONFIG_PREEMPT_COUNT
get_thread_info r10 get_thread_info r10
ldr r4, [r10, #TI_PREEMPT] @ get preempt count ldr r4, [r10, #TI_PREEMPT] @ get preempt count
sub r11, r4, #1 @ decrement it sub r11, r4, #1 @ decrement it
@ -53,7 +53,7 @@ ENDPROC(vfp_null_entry)
__INIT __INIT
ENTRY(vfp_testing_entry) ENTRY(vfp_testing_entry)
#ifdef CONFIG_PREEMPT #ifdef CONFIG_PREEMPT_COUNT
get_thread_info r10 get_thread_info r10
ldr r4, [r10, #TI_PREEMPT] @ get preempt count ldr r4, [r10, #TI_PREEMPT] @ get preempt count
sub r11, r4, #1 @ decrement it sub r11, r4, #1 @ decrement it

4
arch/arm/vfp/vfphw.S
View file

@ -168,7 +168,7 @@ vfp_hw_state_valid:
@ else it's one 32-bit instruction, so @ else it's one 32-bit instruction, so
@ always subtract 4 from the following @ always subtract 4 from the following
@ instruction address. @ instruction address.
#ifdef CONFIG_PREEMPT #ifdef CONFIG_PREEMPT_COUNT
get_thread_info r10 get_thread_info r10
ldr r4, [r10, #TI_PREEMPT] @ get preempt count ldr r4, [r10, #TI_PREEMPT] @ get preempt count
sub r11, r4, #1 @ decrement it sub r11, r4, #1 @ decrement it
@ -192,7 +192,7 @@ look_for_VFP_exceptions:
@ not recognised by VFP @ not recognised by VFP
DBGSTR "not VFP" DBGSTR "not VFP"
#ifdef CONFIG_PREEMPT #ifdef CONFIG_PREEMPT_COUNT
get_thread_info r10 get_thread_info r10
ldr r4, [r10, #TI_PREEMPT] @ get preempt count ldr r4, [r10, #TI_PREEMPT] @ get preempt count
sub r11, r4, #1 @ decrement it sub r11, r4, #1 @ decrement it

10
arch/avr32/include/asm/dma-mapping.h
View file

@ -336,4 +336,14 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
/* drivers/base/dma-mapping.c */
extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
void *cpu_addr, dma_addr_t dma_addr, size_t size);
extern int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
void *cpu_addr, dma_addr_t dma_addr,
size_t size);
#define dma_mmap_coherent(d, v, c, h, s) dma_common_mmap(d, v, c, h, s)
#define dma_get_sgtable(d, t, v, h, s) dma_common_get_sgtable(d, t, v, h, s)
#endif /* __ASM_AVR32_DMA_MAPPING_H */ #endif /* __ASM_AVR32_DMA_MAPPING_H */

10
arch/blackfin/include/asm/dma-mapping.h
View file

@ -154,4 +154,14 @@ dma_cache_sync(struct device *dev, void *vaddr, size_t size,
_dma_sync((dma_addr_t)vaddr, size, dir); _dma_sync((dma_addr_t)vaddr, size, dir);
} }
/* drivers/base/dma-mapping.c */
extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
void *cpu_addr, dma_addr_t dma_addr, size_t size);
extern int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
void *cpu_addr, dma_addr_t dma_addr,
size_t size);
#define dma_mmap_coherent(d, v, c, h, s) dma_common_mmap(d, v, c, h, s)
#define dma_get_sgtable(d, t, v, h, s) dma_common_get_sgtable(d, t, v, h, s)
#endif /* _BLACKFIN_DMA_MAPPING_H */ #endif /* _BLACKFIN_DMA_MAPPING_H */

15
arch/c6x/include/asm/dma-mapping.h
View file

@ -89,4 +89,19 @@ extern void dma_free_coherent(struct device *, size_t, void *, dma_addr_t);
#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent((d), (s), (h), (f)) #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent((d), (s), (h), (f))
#define dma_free_noncoherent(d, s, v, h) dma_free_coherent((d), (s), (v), (h)) #define dma_free_noncoherent(d, s, v, h) dma_free_coherent((d), (s), (v), (h))
/* Not supported for now */
static inline int dma_mmap_coherent(struct device *dev,
struct vm_area_struct *vma, void *cpu_addr,
dma_addr_t dma_addr, size_t size)
{
return -EINVAL;
}
static inline int dma_get_sgtable(struct device *dev, struct sg_table *sgt,
void *cpu_addr, dma_addr_t dma_addr,
size_t size)
{
return -EINVAL;
}
#endif /* _ASM_C6X_DMA_MAPPING_H */ #endif /* _ASM_C6X_DMA_MAPPING_H */

10
arch/cris/include/asm/dma-mapping.h
View file

@ -158,5 +158,15 @@ dma_cache_sync(struct device *dev, void *vaddr, size_t size,
{ {
} }
/* drivers/base/dma-mapping.c */
extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
void *cpu_addr, dma_addr_t dma_addr, size_t size);
extern int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
void *cpu_addr, dma_addr_t dma_addr,
size_t size);
#define dma_mmap_coherent(d, v, c, h, s) dma_common_mmap(d, v, c, h, s)
#define dma_get_sgtable(d, t, v, h, s) dma_common_get_sgtable(d, t, v, h, s)
#endif #endif

15
arch/frv/include/asm/dma-mapping.h
View file

@ -132,4 +132,19 @@ void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
flush_write_buffers(); flush_write_buffers();
} }
/* Not supported for now */
static inline int dma_mmap_coherent(struct device *dev,
struct vm_area_struct *vma, void *cpu_addr,
dma_addr_t dma_addr, size_t size)
{
return -EINVAL;
}
static inline int dma_get_sgtable(struct device *dev, struct sg_table *sgt,
void *cpu_addr, dma_addr_t dma_addr,
size_t size)
{
return -EINVAL;
}
#endif /* _ASM_DMA_MAPPING_H */ #endif /* _ASM_DMA_MAPPING_H */

10
arch/m68k/include/asm/dma-mapping.h
View file

@ -115,4 +115,14 @@ static inline int dma_mapping_error(struct device *dev, dma_addr_t handle)
#include <asm-generic/dma-mapping-broken.h> #include <asm-generic/dma-mapping-broken.h>
#endif #endif
/* drivers/base/dma-mapping.c */
extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
void *cpu_addr, dma_addr_t dma_addr, size_t size);
extern int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
void *cpu_addr, dma_addr_t dma_addr,
size_t size);
#define dma_mmap_coherent(d, v, c, h, s) dma_common_mmap(d, v, c, h, s)
#define dma_get_sgtable(d, t, v, h, s) dma_common_get_sgtable(d, t, v, h, s)
#endif /* _M68K_DMA_MAPPING_H */ #endif /* _M68K_DMA_MAPPING_H */

3
arch/mips/bcm47xx/Kconfig
View file

@ -8,8 +8,10 @@ config BCM47XX_SSB
select SSB_DRIVER_EXTIF select SSB_DRIVER_EXTIF
select SSB_EMBEDDED select SSB_EMBEDDED
select SSB_B43_PCI_BRIDGE if PCI select SSB_B43_PCI_BRIDGE if PCI
select SSB_DRIVER_PCICORE if PCI
select SSB_PCICORE_HOSTMODE if PCI select SSB_PCICORE_HOSTMODE if PCI
select SSB_DRIVER_GPIO select SSB_DRIVER_GPIO
select GPIOLIB
default y default y
help help
Add support for old Broadcom BCM47xx boards with Sonics Silicon Backplane support. Add support for old Broadcom BCM47xx boards with Sonics Silicon Backplane support.
@ -25,6 +27,7 @@ config BCM47XX_BCMA
select BCMA_HOST_PCI if PCI select BCMA_HOST_PCI if PCI
select BCMA_DRIVER_PCI_HOSTMODE if PCI select BCMA_DRIVER_PCI_HOSTMODE if PCI
select BCMA_DRIVER_GPIO select BCMA_DRIVER_GPIO
select GPIOLIB
default y default y
help help
Add support for new Broadcom BCM47xx boards with Broadcom specific Advanced Microcontroller Bus. Add support for new Broadcom BCM47xx boards with Broadcom specific Advanced Microcontroller Bus.

9
arch/mips/cavium-octeon/executive/cvmx-l2c.c
View file

@ -30,6 +30,7 @@
* measurement, and debugging facilities. * measurement, and debugging facilities.
*/ */
#include <linux/compiler.h>
#include <linux/irqflags.h> #include <linux/irqflags.h>
#include <asm/octeon/cvmx.h> #include <asm/octeon/cvmx.h>
#include <asm/octeon/cvmx-l2c.h> #include <asm/octeon/cvmx-l2c.h>
@ -285,22 +286,22 @@ uint64_t cvmx_l2c_read_perf(uint32_t counter)
*/ */
static void fault_in(uint64_t addr, int len) static void fault_in(uint64_t addr, int len)
{ {
volatile char *ptr; char *ptr;
volatile char dummy;
/* /*
* Adjust addr and length so we get all cache lines even for * Adjust addr and length so we get all cache lines even for
* small ranges spanning two cache lines. * small ranges spanning two cache lines.
*/ */
len += addr & CVMX_CACHE_LINE_MASK; len += addr & CVMX_CACHE_LINE_MASK;
addr &= ~CVMX_CACHE_LINE_MASK; addr &= ~CVMX_CACHE_LINE_MASK;
ptr = (volatile char *)cvmx_phys_to_ptr(addr); ptr = cvmx_phys_to_ptr(addr);
/* /*
* Invalidate L1 cache to make sure all loads result in data * Invalidate L1 cache to make sure all loads result in data
* being in L2. * being in L2.
*/ */
CVMX_DCACHE_INVALIDATE; CVMX_DCACHE_INVALIDATE;
while (len > 0) { while (len > 0) {
dummy += *ptr; ACCESS_ONCE(*ptr);
len -= CVMX_CACHE_LINE_SIZE; len -= CVMX_CACHE_LINE_SIZE;
ptr += CVMX_CACHE_LINE_SIZE; ptr += CVMX_CACHE_LINE_SIZE;
} }

2
arch/mips/include/asm/dsp.h
View file

@ -16,7 +16,7 @@
#include <asm/mipsregs.h> #include <asm/mipsregs.h>
#define DSP_DEFAULT 0x00000000 #define DSP_DEFAULT 0x00000000
#define DSP_MASK 0x3ff #define DSP_MASK 0x3f
#define __enable_dsp_hazard() \ #define __enable_dsp_hazard() \
do { \ do { \

1
arch/mips/include/asm/inst.h
View file

@ -353,6 +353,7 @@ union mips_instruction {
struct u_format u_format; struct u_format u_format;
struct c_format c_format; struct c_format c_format;
struct r_format r_format; struct r_format r_format;
struct p_format p_format;
struct f_format f_format; struct f_format f_format;
struct ma_format ma_format; struct ma_format ma_format;
struct b_format b_format; struct b_format b_format;

2
arch/mips/include/asm/mach-pnx833x/war.h
View file

@ -21,4 +21,4 @@
#define R10000_LLSC_WAR 0 #define R10000_LLSC_WAR 0
#define MIPS34K_MISSED_ITLB_WAR 0 #define MIPS34K_MISSED_ITLB_WAR 0
#endif /* __ASM_MIPS_MACH_PNX8550_WAR_H */ #endif /* __ASM_MIPS_MACH_PNX833X_WAR_H */

1
arch/mips/include/asm/pgtable-64.h
View file

@ -230,6 +230,7 @@ static inline void pud_clear(pud_t *pudp)
#else #else
#define pte_pfn(x) ((unsigned long)((x).pte >> _PFN_SHIFT)) #define pte_pfn(x) ((unsigned long)((x).pte >> _PFN_SHIFT))
#define pfn_pte(pfn, prot) __pte(((pfn) << _PFN_SHIFT) | pgprot_val(prot)) #define pfn_pte(pfn, prot) __pte(((pfn) << _PFN_SHIFT) | pgprot_val(prot))
#define pfn_pmd(pfn, prot) __pmd(((pfn) << _PFN_SHIFT) | pgprot_val(prot))
#endif #endif
#define __pgd_offset(address) pgd_index(address) #define __pgd_offset(address) pgd_index(address)

1
arch/mips/include/uapi/asm/Kbuild
View file

@ -3,6 +3,7 @@ include include/uapi/asm-generic/Kbuild.asm
header-y += auxvec.h header-y += auxvec.h
header-y += bitsperlong.h header-y += bitsperlong.h
header-y += break.h
header-y += byteorder.h header-y += byteorder.h
header-y += cachectl.h header-y += cachectl.h
header-y += errno.h header-y += errno.h

0
arch/mips/include/asm/break.h → arch/mips/include/uapi/asm/break.h
View file

36
arch/mips/kernel/ftrace.c
View file

@ -25,6 +25,12 @@
#define MCOUNT_OFFSET_INSNS 4 #define MCOUNT_OFFSET_INSNS 4
#endif #endif
/* Arch override because MIPS doesn't need to run this from stop_machine() */
void arch_ftrace_update_code(int command)
{
ftrace_modify_all_code(command);
}
/* /*
* Check if the address is in kernel space * Check if the address is in kernel space
* *
@ -89,6 +95,24 @@ static int ftrace_modify_code(unsigned long ip, unsigned int new_code)
return 0; return 0;
} }
#ifndef CONFIG_64BIT
static int ftrace_modify_code_2(unsigned long ip, unsigned int new_code1,
unsigned int new_code2)
{
int faulted;
safe_store_code(new_code1, ip, faulted);
if (unlikely(faulted))
return -EFAULT;
ip += 4;
safe_store_code(new_code2, ip, faulted);
if (unlikely(faulted))
return -EFAULT;
flush_icache_range(ip, ip + 8); /* original ip + 12 */
return 0;
}
#endif
/* /*
* The details about the calling site of mcount on MIPS * The details about the calling site of mcount on MIPS
* *
@ -131,8 +155,18 @@ int ftrace_make_nop(struct module *mod,
* needed. * needed.
*/ */
new = in_kernel_space(ip) ? INSN_NOP : INSN_B_1F; new = in_kernel_space(ip) ? INSN_NOP : INSN_B_1F;
#ifdef CONFIG_64BIT
return ftrace_modify_code(ip, new); return ftrace_modify_code(ip, new);
#else
/*
* On 32 bit MIPS platforms, gcc adds a stack adjust
* instruction in the delay slot after the branch to
* mcount and expects mcount to restore the sp on return.
* This is based on a legacy API and does nothing but
* waste instructions so it's being removed at runtime.
*/
return ftrace_modify_code_2(ip, new, INSN_NOP);
#endif
} }
int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)

7
arch/mips/kernel/mcount.S
View file

@ -46,9 +46,8 @@
PTR_L a5, PT_R9(sp) PTR_L a5, PT_R9(sp)
PTR_L a6, PT_R10(sp) PTR_L a6, PT_R10(sp)
PTR_L a7, PT_R11(sp) PTR_L a7, PT_R11(sp)
PTR_ADDIU sp, PT_SIZE
#else #else
PTR_ADDIU sp, (PT_SIZE + 8) PTR_ADDIU sp, PT_SIZE
#endif #endif
.endm .endm
@ -69,7 +68,9 @@ NESTED(ftrace_caller, PT_SIZE, ra)
.globl _mcount .globl _mcount
_mcount: _mcount:
b ftrace_stub b ftrace_stub
nop addiu sp,sp,8
/* When tracing is activated, it calls ftrace_caller+8 (aka here) */
lw t1, function_trace_stop lw t1, function_trace_stop
bnez t1, ftrace_stub bnez t1, ftrace_stub
nop nop

2
arch/mips/kernel/vpe.c
View file

@ -705,7 +705,7 @@ static int vpe_run(struct vpe * v)
printk(KERN_WARNING printk(KERN_WARNING
"VPE loader: TC %d is already in use.\n", "VPE loader: TC %d is already in use.\n",
t->index); v->tc->index);
return -ENOEXEC; return -ENOEXEC;
} }
} else { } else {

2
arch/mips/lantiq/irq.c
View file

@ -408,7 +408,7 @@ int __init icu_of_init(struct device_node *node, struct device_node *parent)
#endif #endif
/* tell oprofile which irq to use */ /* tell oprofile which irq to use */
cp0_perfcount_irq = LTQ_PERF_IRQ; cp0_perfcount_irq = irq_create_mapping(ltq_domain, LTQ_PERF_IRQ);
/* /*
* if the timer irq is not one of the mips irqs we need to * if the timer irq is not one of the mips irqs we need to

2
arch/mips/lib/delay.c
View file

@ -21,7 +21,7 @@ void __delay(unsigned long loops)
" .set noreorder \n" " .set noreorder \n"
" .align 3 \n" " .align 3 \n"
"1: bnez %0, 1b \n" "1: bnez %0, 1b \n"
#if __SIZEOF_LONG__ == 4 #if BITS_PER_LONG == 32
" subu %0, 1 \n" " subu %0, 1 \n"
#else #else
" dsubu %0, 1 \n" " dsubu %0, 1 \n"

6
arch/mips/mm/ioremap.c
View file

@ -190,9 +190,3 @@ void __iounmap(const volatile void __iomem *addr)
EXPORT_SYMBOL(__ioremap); EXPORT_SYMBOL(__ioremap);
EXPORT_SYMBOL(__iounmap); EXPORT_SYMBOL(__iounmap);
int __virt_addr_valid(const volatile void *kaddr)
{
return pfn_valid(PFN_DOWN(virt_to_phys(kaddr)));
}
EXPORT_SYMBOL_GPL(__virt_addr_valid);

6
arch/mips/mm/mmap.c
View file

@ -192,3 +192,9 @@ unsigned long arch_randomize_brk(struct mm_struct *mm)
return ret; return ret;
} }
int __virt_addr_valid(const volatile void *kaddr)
{
return pfn_valid(PFN_DOWN(virt_to_phys(kaddr)));
}
EXPORT_SYMBOL_GPL(__virt_addr_valid);

5
arch/mips/netlogic/xlr/setup.c
View file

@ -193,8 +193,11 @@ static void nlm_init_node(void)
void __init prom_init(void) void __init prom_init(void)
{ {
int i, *argv, *envp; /* passed as 32 bit ptrs */ int *argv, *envp; /* passed as 32 bit ptrs */
struct psb_info *prom_infop; struct psb_info *prom_infop;
#ifdef CONFIG_SMP
int i;
#endif
/* truncate to 32 bit and sign extend all args */ /* truncate to 32 bit and sign extend all args */
argv = (int *)(long)(int)fw_arg1; argv = (int *)(long)(int)fw_arg1;

2
arch/mips/pci/pci-ar71xx.c
View file

@ -24,7 +24,7 @@
#include <asm/mach-ath79/pci.h> #include <asm/mach-ath79/pci.h>
#define AR71XX_PCI_MEM_BASE 0x10000000 #define AR71XX_PCI_MEM_BASE 0x10000000
#define AR71XX_PCI_MEM_SIZE 0x08000000 #define AR71XX_PCI_MEM_SIZE 0x07000000
#define AR71XX_PCI_WIN0_OFFS 0x10000000 #define AR71XX_PCI_WIN0_OFFS 0x10000000
#define AR71XX_PCI_WIN1_OFFS 0x11000000 #define AR71XX_PCI_WIN1_OFFS 0x11000000

2
arch/mips/pci/pci-ar724x.c
View file

@ -21,7 +21,7 @@
#define AR724X_PCI_CTRL_SIZE 0x100 #define AR724X_PCI_CTRL_SIZE 0x100
#define AR724X_PCI_MEM_BASE 0x10000000 #define AR724X_PCI_MEM_BASE 0x10000000
#define AR724X_PCI_MEM_SIZE 0x08000000 #define AR724X_PCI_MEM_SIZE 0x04000000
#define AR724X_PCI_REG_RESET 0x18 #define AR724X_PCI_REG_RESET 0x18
#define AR724X_PCI_REG_INT_STATUS 0x4c #define AR724X_PCI_REG_INT_STATUS 0x4c

15
arch/mn10300/include/asm/dma-mapping.h
View file

@ -168,4 +168,19 @@ void dma_cache_sync(void *vaddr, size_t size,
mn10300_dcache_flush_inv(); mn10300_dcache_flush_inv();
} }
/* Not supported for now */
static inline int dma_mmap_coherent(struct device *dev,
struct vm_area_struct *vma, void *cpu_addr,
dma_addr_t dma_addr, size_t size)
{
return -EINVAL;
}
static inline int dma_get_sgtable(struct device *dev, struct sg_table *sgt,
void *cpu_addr, dma_addr_t dma_addr,
size_t size)
{
return -EINVAL;
}
#endif #endif

15
arch/parisc/include/asm/dma-mapping.h
View file

@ -238,4 +238,19 @@ void * sba_get_iommu(struct parisc_device *dev);
/* At the moment, we panic on error for IOMMU resource exaustion */ /* At the moment, we panic on error for IOMMU resource exaustion */
#define dma_mapping_error(dev, x) 0 #define dma_mapping_error(dev, x) 0
/* This API cannot be supported on PA-RISC */
static inline int dma_mmap_coherent(struct device *dev,
struct vm_area_struct *vma, void *cpu_addr,
dma_addr_t dma_addr, size_t size)
{
return -EINVAL;
}
static inline int dma_get_sgtable(struct device *dev, struct sg_table *sgt,
void *cpu_addr, dma_addr_t dma_addr,
size_t size)
{
return -EINVAL;
}
#endif #endif

2
arch/powerpc/kernel/entry_32.S
View file

@ -439,6 +439,8 @@ ret_from_fork:
ret_from_kernel_thread: ret_from_kernel_thread:
REST_NVGPRS(r1) REST_NVGPRS(r1)
bl schedule_tail bl schedule_tail
li r3,0
stw r3,0(r1)
mtlr r14 mtlr r14
mr r3,r15 mr r3,r15
PPC440EP_ERR42 PPC440EP_ERR42

13
arch/powerpc/kernel/entry_64.S
View file

@ -664,6 +664,19 @@ resume_kernel:
ld r4,TI_FLAGS(r9) ld r4,TI_FLAGS(r9)
andi. r0,r4,_TIF_NEED_RESCHED andi. r0,r4,_TIF_NEED_RESCHED
bne 1b bne 1b
/*
* arch_local_irq_restore() from preempt_schedule_irq above may
* enable hard interrupt but we really should disable interrupts
* when we return from the interrupt, and so that we don't get
* interrupted after loading SRR0/1.
*/
#ifdef CONFIG_PPC_BOOK3E
wrteei 0
#else
ld r10,PACAKMSR(r13) /* Get kernel MSR without EE */
mtmsrd r10,1 /* Update machine state */
#endif /* CONFIG_PPC_BOOK3E */
#endif /* CONFIG_PREEMPT */ #endif /* CONFIG_PREEMPT */
.globl fast_exc_return_irq .globl fast_exc_return_irq

5
arch/powerpc/kernel/kgdb.c
View file

@ -154,12 +154,12 @@ static int kgdb_handle_breakpoint(struct pt_regs *regs)
static int kgdb_singlestep(struct pt_regs *regs) static int kgdb_singlestep(struct pt_regs *regs)
{ {
struct thread_info *thread_info, *exception_thread_info; struct thread_info *thread_info, *exception_thread_info;
struct thread_info *backup_current_thread_info = \ struct thread_info *backup_current_thread_info;
(struct thread_info *)kmalloc(sizeof(struct thread_info), GFP_KERNEL);
if (user_mode(regs)) if (user_mode(regs))
return 0; return 0;
backup_current_thread_info = (struct thread_info *)kmalloc(sizeof(struct thread_info), GFP_KERNEL);
/* /*
* On Book E and perhaps other processors, singlestep is handled on * On Book E and perhaps other processors, singlestep is handled on
* the critical exception stack. This causes current_thread_info() * the critical exception stack. This causes current_thread_info()
@ -185,6 +185,7 @@ static int kgdb_singlestep(struct pt_regs *regs)
/* Restore current_thread_info lastly. */ /* Restore current_thread_info lastly. */
memcpy(exception_thread_info, backup_current_thread_info, sizeof *thread_info); memcpy(exception_thread_info, backup_current_thread_info, sizeof *thread_info);
kfree(backup_current_thread_info);
return 1; return 1;
} }

9
arch/powerpc/kernel/time.c
View file

@ -494,10 +494,15 @@ void timer_interrupt(struct pt_regs * regs)
set_dec(DECREMENTER_MAX); set_dec(DECREMENTER_MAX);
/* Some implementations of hotplug will get timer interrupts while /* Some implementations of hotplug will get timer interrupts while
* offline, just ignore these * offline, just ignore these and we also need to set
* decrementers_next_tb as MAX to make sure __check_irq_replay
* don't replay timer interrupt when return, otherwise we'll trap
* here infinitely :(
*/ */
if (!cpu_online(smp_processor_id())) if (!cpu_online(smp_processor_id())) {
*next_tb = ~(u64)0;
return; return;
}
/* Conditionally hard-enable interrupts now that the DEC has been /* Conditionally hard-enable interrupts now that the DEC has been
* bumped to its maximum value * bumped to its maximum value

2
arch/powerpc/kvm/emulate.c
View file

@ -39,6 +39,7 @@
#define OP_31_XOP_TRAP 4 #define OP_31_XOP_TRAP 4
#define OP_31_XOP_LWZX 23 #define OP_31_XOP_LWZX 23
#define OP_31_XOP_TRAP_64 68 #define OP_31_XOP_TRAP_64 68
#define OP_31_XOP_DCBF 86
#define OP_31_XOP_LBZX 87 #define OP_31_XOP_LBZX 87
#define OP_31_XOP_STWX 151 #define OP_31_XOP_STWX 151
#define OP_31_XOP_STBX 215 #define OP_31_XOP_STBX 215
@ -374,6 +375,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
emulated = kvmppc_emulate_mtspr(vcpu, sprn, rs); emulated = kvmppc_emulate_mtspr(vcpu, sprn, rs);
break; break;
case OP_31_XOP_DCBF:
case OP_31_XOP_DCBI: case OP_31_XOP_DCBI:
/* Do nothing. The guest is performing dcbi because /* Do nothing. The guest is performing dcbi because
* hardware DMA is not snooped by the dcache, but * hardware DMA is not snooped by the dcache, but

62
arch/powerpc/mm/hash_low_64.S
View file

@ -115,11 +115,13 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
sldi r29,r5,SID_SHIFT - VPN_SHIFT sldi r29,r5,SID_SHIFT - VPN_SHIFT
rldicl r28,r3,64 - VPN_SHIFT,64 - (SID_SHIFT - VPN_SHIFT) rldicl r28,r3,64 - VPN_SHIFT,64 - (SID_SHIFT - VPN_SHIFT)
or r29,r28,r29 or r29,r28,r29
/*
/* Calculate hash value for primary slot and store it in r28 */ * Calculate hash value for primary slot and store it in r28
rldicl r5,r5,0,25 /* vsid & 0x0000007fffffffff */ * r3 = va, r5 = vsid
rldicl r0,r3,64-12,48 /* (ea >> 12) & 0xffff */ * r0 = (va >> 12) & ((1ul << (28 - 12)) -1)
xor r28,r5,r0 */
rldicl r0,r3,64-12,48
xor r28,r5,r0 /* hash */
b 4f b 4f
3: /* Calc vpn and put it in r29 */ 3: /* Calc vpn and put it in r29 */
@ -130,11 +132,12 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
/* /*
* calculate hash value for primary slot and * calculate hash value for primary slot and
* store it in r28 for 1T segment * store it in r28 for 1T segment
* r3 = va, r5 = vsid
*/ */
rldic r28,r5,25,25 /* (vsid << 25) & 0x7fffffffff */ sldi r28,r5,25 /* vsid << 25 */
clrldi r5,r5,40 /* vsid & 0xffffff */ /* r0 = (va >> 12) & ((1ul << (40 - 12)) -1) */
rldicl r0,r3,64-12,36 /* (ea >> 12) & 0xfffffff */ rldicl r0,r3,64-12,36
xor r28,r28,r5 xor r28,r28,r5 /* vsid ^ ( vsid << 25) */
xor r28,r28,r0 /* hash */ xor r28,r28,r0 /* hash */
/* Convert linux PTE bits into HW equivalents */ /* Convert linux PTE bits into HW equivalents */
@ -407,11 +410,13 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
*/ */
rldicl r28,r3,64 - VPN_SHIFT,64 - (SID_SHIFT - VPN_SHIFT) rldicl r28,r3,64 - VPN_SHIFT,64 - (SID_SHIFT - VPN_SHIFT)
or r29,r28,r29 or r29,r28,r29
/*
/* Calculate hash value for primary slot and store it in r28 */ * Calculate hash value for primary slot and store it in r28
rldicl r5,r5,0,25 /* vsid & 0x0000007fffffffff */ * r3 = va, r5 = vsid
rldicl r0,r3,64-12,48 /* (ea >> 12) & 0xffff */ * r0 = (va >> 12) & ((1ul << (28 - 12)) -1)
xor r28,r5,r0 */
rldicl r0,r3,64-12,48
xor r28,r5,r0 /* hash */
b 4f b 4f
3: /* Calc vpn and put it in r29 */ 3: /* Calc vpn and put it in r29 */
@ -426,11 +431,12 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
/* /*
* Calculate hash value for primary slot and * Calculate hash value for primary slot and
* store it in r28 for 1T segment * store it in r28 for 1T segment
* r3 = va, r5 = vsid
*/ */
rldic r28,r5,25,25 /* (vsid << 25) & 0x7fffffffff */ sldi r28,r5,25 /* vsid << 25 */
clrldi r5,r5,40 /* vsid & 0xffffff */ /* r0 = (va >> 12) & ((1ul << (40 - 12)) -1) */
rldicl r0,r3,64-12,36 /* (ea >> 12) & 0xfffffff */ rldicl r0,r3,64-12,36
xor r28,r28,r5 xor r28,r28,r5 /* vsid ^ ( vsid << 25) */
xor r28,r28,r0 /* hash */ xor r28,r28,r0 /* hash */
/* Convert linux PTE bits into HW equivalents */ /* Convert linux PTE bits into HW equivalents */
@ -752,25 +758,27 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
rldicl r28,r3,64 - VPN_SHIFT,64 - (SID_SHIFT - VPN_SHIFT) rldicl r28,r3,64 - VPN_SHIFT,64 - (SID_SHIFT - VPN_SHIFT)
or r29,r28,r29 or r29,r28,r29
/* Calculate hash value for primary slot and store it in r28 */ /* Calculate hash value for primary slot and store it in r28
rldicl r5,r5,0,25 /* vsid & 0x0000007fffffffff */ * r3 = va, r5 = vsid
rldicl r0,r3,64-16,52 /* (ea >> 16) & 0xfff */ * r0 = (va >> 16) & ((1ul << (28 - 16)) -1)
xor r28,r5,r0 */
rldicl r0,r3,64-16,52
xor r28,r5,r0 /* hash */
b 4f b 4f
3: /* Calc vpn and put it in r29 */ 3: /* Calc vpn and put it in r29 */
sldi r29,r5,SID_SHIFT_1T - VPN_SHIFT sldi r29,r5,SID_SHIFT_1T - VPN_SHIFT
rldicl r28,r3,64 - VPN_SHIFT,64 - (SID_SHIFT_1T - VPN_SHIFT) rldicl r28,r3,64 - VPN_SHIFT,64 - (SID_SHIFT_1T - VPN_SHIFT)
or r29,r28,r29 or r29,r28,r29
/* /*
* calculate hash value for primary slot and * calculate hash value for primary slot and
* store it in r28 for 1T segment * store it in r28 for 1T segment
* r3 = va, r5 = vsid
*/ */
rldic r28,r5,25,25 /* (vsid << 25) & 0x7fffffffff */ sldi r28,r5,25 /* vsid << 25 */
clrldi r5,r5,40 /* vsid & 0xffffff */ /* r0 = (va >> 16) & ((1ul << (40 - 16)) -1) */
rldicl r0,r3,64-16,40 /* (ea >> 16) & 0xffffff */ rldicl r0,r3,64-16,40
xor r28,r28,r5 xor r28,r28,r5 /* vsid ^ ( vsid << 25) */
xor r28,r28,r0 /* hash */ xor r28,r28,r0 /* hash */
/* Convert linux PTE bits into HW equivalents */ /* Convert linux PTE bits into HW equivalents */

2
arch/powerpc/oprofile/op_model_power4.c
View file

@ -52,7 +52,7 @@ static int power7_marked_instr_event(u64 mmcr1)
for (pmc = 0; pmc < 4; pmc++) { for (pmc = 0; pmc < 4; pmc++) {
psel = mmcr1 & (OPROFILE_PM_PMCSEL_MSK psel = mmcr1 & (OPROFILE_PM_PMCSEL_MSK
<< (OPROFILE_MAX_PMC_NUM - pmc) << (OPROFILE_MAX_PMC_NUM - pmc)
* OPROFILE_MAX_PMC_NUM); * OPROFILE_PMSEL_FIELD_WIDTH);
psel = (psel >> ((OPROFILE_MAX_PMC_NUM - pmc) psel = (psel >> ((OPROFILE_MAX_PMC_NUM - pmc)
* OPROFILE_PMSEL_FIELD_WIDTH)) & ~1ULL; * OPROFILE_PMSEL_FIELD_WIDTH)) & ~1ULL;
unit = mmcr1 & (OPROFILE_PM_UNIT_MSK unit = mmcr1 & (OPROFILE_PM_UNIT_MSK

7
arch/powerpc/platforms/pasemi/cpufreq.c
View file

@ -236,6 +236,13 @@ out:
static int pas_cpufreq_cpu_exit(struct cpufreq_policy *policy) static int pas_cpufreq_cpu_exit(struct cpufreq_policy *policy)
{ {
/*
* We don't support CPU hotplug. Don't unmap after the system
* has already made it to a running state.
*/
if (system_state != SYSTEM_BOOTING)
return 0;
if (sdcasr_mapbase) if (sdcasr_mapbase)
iounmap(sdcasr_mapbase); iounmap(sdcasr_mapbase);
if (sdcpwr_mapbase) if (sdcpwr_mapbase)

12
arch/s390/include/asm/pgtable.h
View file

@ -1365,6 +1365,18 @@ static inline void pmdp_invalidate(struct vm_area_struct *vma,
__pmd_idte(address, pmdp); __pmd_idte(address, pmdp);
} }
#define __HAVE_ARCH_PMDP_SET_WRPROTECT
static inline void pmdp_set_wrprotect(struct mm_struct *mm,
unsigned long address, pmd_t *pmdp)
{
pmd_t pmd = *pmdp;
if (pmd_write(pmd)) {
__pmd_idte(address, pmdp);
set_pmd_at(mm, address, pmdp, pmd_wrprotect(pmd));
}
}
static inline pmd_t mk_pmd_phys(unsigned long physpage, pgprot_t pgprot) static inline pmd_t mk_pmd_phys(unsigned long physpage, pgprot_t pgprot)
{ {
pmd_t __pmd; pmd_t __pmd;

1
arch/x86/Kconfig
View file

@ -2139,6 +2139,7 @@ config OLPC_XO1_RTC
config OLPC_XO1_SCI config OLPC_XO1_SCI
bool "OLPC XO-1 SCI extras" bool "OLPC XO-1 SCI extras"
depends on OLPC && OLPC_XO1_PM depends on OLPC && OLPC_XO1_PM
depends on INPUT=y
select POWER_SUPPLY select POWER_SUPPLY
select GPIO_CS5535 select GPIO_CS5535
select MFD_CORE select MFD_CORE

4
arch/x86/boot/Makefile
View file

@ -71,7 +71,7 @@ GCOV_PROFILE := n
$(obj)/bzImage: asflags-y := $(SVGA_MODE) $(obj)/bzImage: asflags-y := $(SVGA_MODE)
quiet_cmd_image = BUILD $@ quiet_cmd_image = BUILD $@
cmd_image = $(obj)/tools/build $(obj)/setup.bin $(obj)/vmlinux.bin > $@ cmd_image = $(obj)/tools/build $(obj)/setup.bin $(obj)/vmlinux.bin $(obj)/zoffset.h > $@
$(obj)/bzImage: $(obj)/setup.bin $(obj)/vmlinux.bin $(obj)/tools/build FORCE $(obj)/bzImage: $(obj)/setup.bin $(obj)/vmlinux.bin $(obj)/tools/build FORCE
$(call if_changed,image) $(call if_changed,image)
@ -92,7 +92,7 @@ targets += voffset.h
$(obj)/voffset.h: vmlinux FORCE $(obj)/voffset.h: vmlinux FORCE
$(call if_changed,voffset) $(call if_changed,voffset)
sed-zoffset := -e 's/^\([0-9a-fA-F]*\) . \(startup_32\|input_data\|_end\|z_.*\)$$/\#define ZO_\2 0x\1/p' sed-zoffset := -e 's/^\([0-9a-fA-F]*\) . \(startup_32\|startup_64\|efi_pe_entry\|efi_stub_entry\|input_data\|_end\|z_.*\)$$/\#define ZO_\2 0x\1/p'
quiet_cmd_zoffset = ZOFFSET $@ quiet_cmd_zoffset = ZOFFSET $@
cmd_zoffset = $(NM) $< | sed -n $(sed-zoffset) > $@ cmd_zoffset = $(NM) $< | sed -n $(sed-zoffset) > $@

21
arch/x86/boot/compressed/eboot.c
View file

@ -256,10 +256,10 @@ static efi_status_t setup_efi_pci(struct boot_params *params)
int i; int i;
struct setup_data *data; struct setup_data *data;
data = (struct setup_data *)params->hdr.setup_data; data = (struct setup_data *)(unsigned long)params->hdr.setup_data;
while (data && data->next) while (data && data->next)
data = (struct setup_data *)data->next; data = (struct setup_data *)(unsigned long)data->next;
status = efi_call_phys5(sys_table->boottime->locate_handle, status = efi_call_phys5(sys_table->boottime->locate_handle,
EFI_LOCATE_BY_PROTOCOL, &pci_proto, EFI_LOCATE_BY_PROTOCOL, &pci_proto,
@ -295,16 +295,18 @@ static efi_status_t setup_efi_pci(struct boot_params *params)
if (!pci) if (!pci)
continue; continue;
#ifdef CONFIG_X86_64
status = efi_call_phys4(pci->attributes, pci, status = efi_call_phys4(pci->attributes, pci,
EfiPciIoAttributeOperationGet, 0, EfiPciIoAttributeOperationGet, 0,
&attributes); &attributes);
#else
status = efi_call_phys5(pci->attributes, pci,
EfiPciIoAttributeOperationGet, 0, 0,
&attributes);
#endif
if (status != EFI_SUCCESS) if (status != EFI_SUCCESS)
continue; continue;
if (!(attributes & EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM))
continue;
if (!pci->romimage || !pci->romsize) if (!pci->romimage || !pci->romsize)
continue; continue;
@ -345,9 +347,9 @@ static efi_status_t setup_efi_pci(struct boot_params *params)
memcpy(rom->romdata, pci->romimage, pci->romsize); memcpy(rom->romdata, pci->romimage, pci->romsize);
if (data) if (data)
data->next = (uint64_t)rom; data->next = (unsigned long)rom;
else else
params->hdr.setup_data = (uint64_t)rom; params->hdr.setup_data = (unsigned long)rom;
data = (struct setup_data *)rom; data = (struct setup_data *)rom;
@ -432,10 +434,9 @@ static efi_status_t setup_gop(struct screen_info *si, efi_guid_t *proto,
* Once we've found a GOP supporting ConOut, * Once we've found a GOP supporting ConOut,
* don't bother looking any further. * don't bother looking any further.
*/ */
first_gop = gop;
if (conout_found) if (conout_found)
break; break;
first_gop = gop;
} }
} }

8
arch/x86/boot/compressed/head_32.S
View file

@ -35,11 +35,11 @@ ENTRY(startup_32)
#ifdef CONFIG_EFI_STUB #ifdef CONFIG_EFI_STUB
jmp preferred_addr jmp preferred_addr
.balign 0x10
/* /*
* We don't need the return address, so set up the stack so * We don't need the return address, so set up the stack so
* efi_main() can find its arugments. * efi_main() can find its arguments.
*/ */
ENTRY(efi_pe_entry)
add $0x4, %esp add $0x4, %esp
call make_boot_params call make_boot_params
@ -50,8 +50,10 @@ ENTRY(startup_32)
pushl %eax pushl %eax
pushl %esi pushl %esi
pushl %ecx pushl %ecx
sub $0x4, %esp
.org 0x30,0x90 ENTRY(efi_stub_entry)
add $0x4, %esp
call efi_main call efi_main
cmpl $0, %eax cmpl $0, %eax
movl %eax, %esi movl %eax, %esi

8
arch/x86/boot/compressed/head_64.S
View file

@ -201,12 +201,12 @@ ENTRY(startup_64)
*/ */
#ifdef CONFIG_EFI_STUB #ifdef CONFIG_EFI_STUB
/* /*
* The entry point for the PE/COFF executable is 0x210, so only * The entry point for the PE/COFF executable is efi_pe_entry, so
* legacy boot loaders will execute this jmp. * only legacy boot loaders will execute this jmp.
*/ */
jmp preferred_addr jmp preferred_addr
.org 0x210 ENTRY(efi_pe_entry)
mov %rcx, %rdi mov %rcx, %rdi
mov %rdx, %rsi mov %rdx, %rsi
pushq %rdi pushq %rdi
@ -218,7 +218,7 @@ ENTRY(startup_64)
popq %rsi popq %rsi
popq %rdi popq %rdi
.org 0x230,0x90 ENTRY(efi_stub_entry)
call efi_main call efi_main
movq %rax,%rsi movq %rax,%rsi
cmpq $0,%rax cmpq $0,%rax

39
arch/x86/boot/header.S
View file

@ -21,6 +21,7 @@
#include <asm/e820.h> #include <asm/e820.h>
#include <asm/page_types.h> #include <asm/page_types.h>
#include <asm/setup.h> #include <asm/setup.h>
#include <asm/bootparam.h>
#include "boot.h" #include "boot.h"
#include "voffset.h" #include "voffset.h"
#include "zoffset.h" #include "zoffset.h"
@ -255,6 +256,9 @@ section_table:
# header, from the old boot sector. # header, from the old boot sector.
.section ".header", "a" .section ".header", "a"
.globl sentinel
sentinel: .byte 0xff, 0xff /* Used to detect broken loaders */
.globl hdr .globl hdr
hdr: hdr:
setup_sects: .byte 0 /* Filled in by build.c */ setup_sects: .byte 0 /* Filled in by build.c */
@ -279,7 +283,7 @@ _start:
# Part 2 of the header, from the old setup.S # Part 2 of the header, from the old setup.S
.ascii "HdrS" # header signature .ascii "HdrS" # header signature
.word 0x020b # header version number (>= 0x0105) .word 0x020c # header version number (>= 0x0105)
# or else old loadlin-1.5 will fail) # or else old loadlin-1.5 will fail)
.globl realmode_swtch .globl realmode_swtch
realmode_swtch: .word 0, 0 # default_switch, SETUPSEG realmode_swtch: .word 0, 0 # default_switch, SETUPSEG
@ -297,13 +301,7 @@ type_of_loader: .byte 0 # 0 means ancient bootloader, newer
# flags, unused bits must be zero (RFU) bit within loadflags # flags, unused bits must be zero (RFU) bit within loadflags
loadflags: loadflags:
LOADED_HIGH = 1 # If set, the kernel is loaded high .byte LOADED_HIGH # The kernel is to be loaded high
CAN_USE_HEAP = 0x80 # If set, the loader also has set
# heap_end_ptr to tell how much
# space behind setup.S can be used for
# heap purposes.
# Only the loader knows what is free
.byte LOADED_HIGH
setup_move_size: .word 0x8000 # size to move, when setup is not setup_move_size: .word 0x8000 # size to move, when setup is not
# loaded at 0x90000. We will move setup # loaded at 0x90000. We will move setup
@ -369,7 +367,23 @@ relocatable_kernel: .byte 1
relocatable_kernel: .byte 0 relocatable_kernel: .byte 0
#endif #endif
min_alignment: .byte MIN_KERNEL_ALIGN_LG2 # minimum alignment min_alignment: .byte MIN_KERNEL_ALIGN_LG2 # minimum alignment
pad3: .word 0
xloadflags:
#ifdef CONFIG_X86_64
# define XLF0 XLF_KERNEL_64 /* 64-bit kernel */
#else
# define XLF0 0
#endif
#ifdef CONFIG_EFI_STUB
# ifdef CONFIG_X86_64
# define XLF23 XLF_EFI_HANDOVER_64 /* 64-bit EFI handover ok */
# else
# define XLF23 XLF_EFI_HANDOVER_32 /* 32-bit EFI handover ok */
# endif
#else
# define XLF23 0
#endif
.word XLF0 | XLF23
cmdline_size: .long COMMAND_LINE_SIZE-1 #length of the command line, cmdline_size: .long COMMAND_LINE_SIZE-1 #length of the command line,
#added with boot protocol #added with boot protocol
@ -397,8 +411,13 @@ pref_address: .quad LOAD_PHYSICAL_ADDR # preferred load addr
#define INIT_SIZE VO_INIT_SIZE #define INIT_SIZE VO_INIT_SIZE
#endif #endif
init_size: .long INIT_SIZE # kernel initialization size init_size: .long INIT_SIZE # kernel initialization size
handover_offset: .long 0x30 # offset to the handover handover_offset:
#ifdef CONFIG_EFI_STUB
.long 0x30 # offset to the handover
# protocol entry point # protocol entry point
#else
.long 0
#endif
# End of setup header ##################################################### # End of setup header #####################################################

2
arch/x86/boot/setup.ld
View file

@ -13,7 +13,7 @@ SECTIONS
.bstext : { *(.bstext) } .bstext : { *(.bstext) }
.bsdata : { *(.bsdata) } .bsdata : { *(.bsdata) }
. = 497; . = 495;
.header : { *(.header) } .header : { *(.header) }
.entrytext : { *(.entrytext) } .entrytext : { *(.entrytext) }
.inittext : { *(.inittext) } .inittext : { *(.inittext) }

81
arch/x86/boot/tools/build.c
View file

@ -52,6 +52,10 @@ int is_big_kernel;
#define PECOFF_RELOC_RESERVE 0x20 #define PECOFF_RELOC_RESERVE 0x20
unsigned long efi_stub_entry;
unsigned long efi_pe_entry;
unsigned long startup_64;
/*----------------------------------------------------------------------*/ /*----------------------------------------------------------------------*/
static const u32 crctab32[] = { static const u32 crctab32[] = {
@ -132,7 +136,7 @@ static void die(const char * str, ...)
static void usage(void) static void usage(void)
{ {
die("Usage: build setup system [> image]"); die("Usage: build setup system [zoffset.h] [> image]");
} }
#ifdef CONFIG_EFI_STUB #ifdef CONFIG_EFI_STUB
@ -206,30 +210,54 @@ static void update_pecoff_text(unsigned int text_start, unsigned int file_sz)
*/ */
put_unaligned_le32(file_sz - 512, &buf[pe_header + 0x1c]); put_unaligned_le32(file_sz - 512, &buf[pe_header + 0x1c]);
#ifdef CONFIG_X86_32
/* /*
* Address of entry point. * Address of entry point for PE/COFF executable
*
* The EFI stub entry point is +16 bytes from the start of
* the .text section.
*/ */
put_unaligned_le32(text_start + 16, &buf[pe_header + 0x28]); put_unaligned_le32(text_start + efi_pe_entry, &buf[pe_header + 0x28]);
#else
/*
* Address of entry point. startup_32 is at the beginning and
* the 64-bit entry point (startup_64) is always 512 bytes
* after. The EFI stub entry point is 16 bytes after that, as
* the first instruction allows legacy loaders to jump over
* the EFI stub initialisation
*/
put_unaligned_le32(text_start + 528, &buf[pe_header + 0x28]);
#endif /* CONFIG_X86_32 */
update_pecoff_section_header(".text", text_start, text_sz); update_pecoff_section_header(".text", text_start, text_sz);
} }
#endif /* CONFIG_EFI_STUB */ #endif /* CONFIG_EFI_STUB */
/*
* Parse zoffset.h and find the entry points. We could just #include zoffset.h
* but that would mean tools/build would have to be rebuilt every time. It's
* not as if parsing it is hard...
*/
#define PARSE_ZOFS(p, sym) do { \
if (!strncmp(p, "#define ZO_" #sym " ", 11+sizeof(#sym))) \
sym = strtoul(p + 11 + sizeof(#sym), NULL, 16); \
} while (0)
static void parse_zoffset(char *fname)
{
FILE *file;
char *p;
int c;
file = fopen(fname, "r");
if (!file)
die("Unable to open `%s': %m", fname);
c = fread(buf, 1, sizeof(buf) - 1, file);
if (ferror(file))
die("read-error on `zoffset.h'");
buf[c] = 0;
p = (char *)buf;
while (p && *p) {
PARSE_ZOFS(p, efi_stub_entry);
PARSE_ZOFS(p, efi_pe_entry);
PARSE_ZOFS(p, startup_64);
p = strchr(p, '\n');
while (p && (*p == '\r' || *p == '\n'))
p++;
}
}
int main(int argc, char ** argv) int main(int argc, char ** argv)
{ {
unsigned int i, sz, setup_sectors; unsigned int i, sz, setup_sectors;
@ -241,7 +269,19 @@ int main(int argc, char ** argv)
void *kernel; void *kernel;
u32 crc = 0xffffffffUL; u32 crc = 0xffffffffUL;
if (argc != 3) /* Defaults for old kernel */
#ifdef CONFIG_X86_32
efi_pe_entry = 0x10;
efi_stub_entry = 0x30;
#else
efi_pe_entry = 0x210;
efi_stub_entry = 0x230;
startup_64 = 0x200;
#endif
if (argc == 4)
parse_zoffset(argv[3]);
else if (argc != 3)
usage(); usage();
/* Copy the setup code */ /* Copy the setup code */
@ -299,6 +339,11 @@ int main(int argc, char ** argv)
#ifdef CONFIG_EFI_STUB #ifdef CONFIG_EFI_STUB
update_pecoff_text(setup_sectors * 512, sz + i + ((sys_size * 16) - sz)); update_pecoff_text(setup_sectors * 512, sz + i + ((sys_size * 16) - sz));
#ifdef CONFIG_X86_64 /* Yes, this is really how we defined it :( */
efi_stub_entry -= 0x200;
#endif
put_unaligned_le32(efi_stub_entry, &buf[0x264]);
#endif #endif
crc = partial_crc32(buf, i, crc); crc = partial_crc32(buf, i, crc);

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