Merge "icnss: Switch to CXO before XO disable"
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commit
8f2de5c26a
1 changed files with 45 additions and 8 deletions
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@ -107,6 +107,18 @@ module_param(qmi_timeout, ulong, 0600);
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#define WCSS_CLK_CTL_WCSS_CSS_GDSCR_HW_CONTROL BIT(1)
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#define WCSS_CLK_CTL_WCSS_CSS_GDSCR_HW_CONTROL BIT(1)
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#define WCSS_CLK_CTL_WCSS_CSS_GDSCR_PWR_ON BIT(31)
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#define WCSS_CLK_CTL_WCSS_CSS_GDSCR_PWR_ON BIT(31)
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#define WCSS_CLK_CTL_NOC_CMD_RCGR_OFFSET 0x1D1030
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#define WCSS_CLK_CTL_NOC_CMD_RCGR_UPDATE BIT(0)
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#define WCSS_CLK_CTL_NOC_CFG_RCGR_OFFSET 0x1D1034
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#define WCSS_CLK_CTL_NOC_CFG_RCGR_SRC_SEL GENMASK(10, 8)
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#define WCSS_CLK_CTL_REF_CMD_RCGR_OFFSET 0x1D602C
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#define WCSS_CLK_CTL_REF_CMD_RCGR_UPDATE BIT(0)
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#define WCSS_CLK_CTL_REF_CFG_RCGR_OFFSET 0x1D6030
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#define WCSS_CLK_CTL_REF_CFG_RCGR_SRC_SEL GENMASK(10, 8)
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/*
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/*
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* Registers: WCSS_HM_A_WIFI_APB_3_A_WCMN_MAC_WCMN_REG
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* Registers: WCSS_HM_A_WIFI_APB_3_A_WCMN_MAC_WCMN_REG
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* Base Address: 0x18AF0000
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* Base Address: 0x18AF0000
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@ -1084,7 +1096,7 @@ static void icnss_hw_io_reset(struct icnss_priv *priv, bool on)
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}
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}
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}
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}
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int icnss_hw_reset_wlan_ss_power_down(struct icnss_priv *priv)
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static int icnss_hw_reset_wlan_ss_power_down(struct icnss_priv *priv)
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{
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{
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u32 rdata;
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u32 rdata;
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@ -1116,7 +1128,7 @@ int icnss_hw_reset_wlan_ss_power_down(struct icnss_priv *priv)
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return 0;
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return 0;
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}
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}
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int icnss_hw_reset_common_ss_power_down(struct icnss_priv *priv)
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static int icnss_hw_reset_common_ss_power_down(struct icnss_priv *priv)
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{
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{
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u32 rdata;
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u32 rdata;
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@ -1161,7 +1173,7 @@ int icnss_hw_reset_common_ss_power_down(struct icnss_priv *priv)
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}
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}
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int icnss_hw_reset_wlan_rfactrl_power_down(struct icnss_priv *priv)
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static int icnss_hw_reset_wlan_rfactrl_power_down(struct icnss_priv *priv)
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{
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{
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u32 rdata;
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u32 rdata;
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@ -1191,7 +1203,7 @@ int icnss_hw_reset_wlan_rfactrl_power_down(struct icnss_priv *priv)
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return 0;
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return 0;
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}
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}
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void icnss_hw_wsi_cmd_error_recovery(struct icnss_priv *priv)
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static void icnss_hw_wsi_cmd_error_recovery(struct icnss_priv *priv)
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{
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{
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icnss_pr_dbg("RESET: WSI CMD Error recovery, state: 0x%lx\n",
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icnss_pr_dbg("RESET: WSI CMD Error recovery, state: 0x%lx\n",
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priv->state);
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priv->state);
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@ -1215,7 +1227,7 @@ void icnss_hw_wsi_cmd_error_recovery(struct icnss_priv *priv)
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PMM_WSI_CMD_SW_BUS_SYNC, 0);
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PMM_WSI_CMD_SW_BUS_SYNC, 0);
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}
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}
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u32 icnss_hw_rf_register_read_command(struct icnss_priv *priv, u32 addr)
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static u32 icnss_hw_rf_register_read_command(struct icnss_priv *priv, u32 addr)
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{
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{
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u32 rdata = 0;
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u32 rdata = 0;
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int ret;
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int ret;
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@ -1264,7 +1276,7 @@ u32 icnss_hw_rf_register_read_command(struct icnss_priv *priv, u32 addr)
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return rdata;
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return rdata;
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}
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}
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int icnss_hw_reset_rf_reset_cmd(struct icnss_priv *priv)
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static int icnss_hw_reset_rf_reset_cmd(struct icnss_priv *priv)
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{
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{
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u32 rdata;
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u32 rdata;
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int ret;
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int ret;
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@ -1318,7 +1330,30 @@ int icnss_hw_reset_rf_reset_cmd(struct icnss_priv *priv)
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return 0;
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return 0;
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}
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}
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int icnss_hw_reset_xo_disable_cmd(struct icnss_priv *priv)
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static int icnss_hw_reset_switch_to_cxo(struct icnss_priv *priv)
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{
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icnss_pr_dbg("RESET: Switch to CXO, state: 0x%lx\n", priv->state);
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icnss_hw_write_reg_field(priv->mem_base_va,
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WCSS_CLK_CTL_NOC_CFG_RCGR_OFFSET,
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WCSS_CLK_CTL_NOC_CFG_RCGR_SRC_SEL, 0);
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icnss_hw_write_reg_field(priv->mem_base_va,
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WCSS_CLK_CTL_NOC_CMD_RCGR_OFFSET,
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WCSS_CLK_CTL_NOC_CMD_RCGR_UPDATE, 1);
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icnss_hw_write_reg_field(priv->mem_base_va,
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WCSS_CLK_CTL_REF_CFG_RCGR_OFFSET,
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WCSS_CLK_CTL_REF_CFG_RCGR_SRC_SEL, 0);
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icnss_hw_write_reg_field(priv->mem_base_va,
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WCSS_CLK_CTL_REF_CMD_RCGR_OFFSET,
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WCSS_CLK_CTL_REF_CMD_RCGR_UPDATE, 1);
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return 0;
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}
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static int icnss_hw_reset_xo_disable_cmd(struct icnss_priv *priv)
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{
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{
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int ret;
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int ret;
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@ -1366,7 +1401,7 @@ int icnss_hw_reset_xo_disable_cmd(struct icnss_priv *priv)
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return 0;
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return 0;
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}
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}
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int icnss_hw_reset(struct icnss_priv *priv)
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static int icnss_hw_reset(struct icnss_priv *priv)
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{
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{
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u32 rdata;
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u32 rdata;
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u32 rdata1;
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u32 rdata1;
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@ -1424,6 +1459,8 @@ int icnss_hw_reset(struct icnss_priv *priv)
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icnss_hw_reset_rf_reset_cmd(priv);
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icnss_hw_reset_rf_reset_cmd(priv);
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icnss_hw_reset_switch_to_cxo(priv);
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icnss_hw_reset_xo_disable_cmd(priv);
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icnss_hw_reset_xo_disable_cmd(priv);
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icnss_hw_write_reg_field(priv->mpm_config_va, MPM_WCSSAON_CONFIG_OFFSET,
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icnss_hw_write_reg_field(priv->mpm_config_va, MPM_WCSSAON_CONFIG_OFFSET,
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