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Merge "drm/msm/sde: Add device tree subnode parsing capability" into dev/msm-4.4-drm_kms

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Dhaval Patel 2016-11-15 21:36:50 -08:00 • committed by Gerrit - the friendly Code Review server
commit 90607cb04f
6 changed files with 793 additions and 230 deletions
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98
Documentation/devicetree/bindings/display/msm/sde.txt
View file

@ -134,12 +134,6 @@ Optional properties:
indicating the danger luts on sspp.
- qcom,sde-sspp-safe-lut: A 3 cell property, with a format of <linear, tile, nrt>,
indicating the safe luts on sspp.
- qcom,sde-sspp-qseed-off: A u32 offset value indicates the qseed block offset
from sspp base. It will install qseed property on
vig and rgb sspp pipes.
- qcom,sde-sspp-csc-off: A u32 offset value indicates the csc block offset
from sspp base. It will be used to install the csc
property on vig type pipe.
- qcom,sde-sspp-max-rects: Array of u32 values indicating maximum rectangles supported
on each sspp. This property is for multirect feature support.
Number of offsets defined should match the number of
@ -165,14 +159,48 @@ Optional properties:
- qcom,sde-te-size: A u32 value indicates the te block address range.
- qcom,sde-te2-size: A u32 value indicates the te2 block address range.
- qcom,sde-dsc-off: A u32 offset indicates the dsc block offset on pingpong.
- qcom,sde-dspp-igc-off: A u32 offset indicates the igc block offset on dssp.
- qcom,sde-dspp-pcc-off: A u32 offset indicates the pcc block offset on dssp.
- qcom,sde-dspp-gc-off: A u32 offset indicates the gc block offset on dssp.
- qcom,sde-dspp-pa-off: A u32 offset indicates the pa block offset on dssp.
- qcom,sde-dspp-gamut-off: A u32 offset indicates the gamut block offset on dssp.
- qcom,sde-dspp-dither-off: A u32 offset indicates the dither block offset on dssp.
- qcom,sde-dspp-hist-off: A u32 offset indicates the hist block offset on dssp.
- qcom,sde-dspp-ad-off: A u32 offset indicates the ad block offset on dssp.
- qcom,sde-sspp-vig-blocks: A node that lists the blocks inside the VIG hardware. The
block entries will contain the offset and version (if needed)
of each feature block. The presence of a block entry
indicates that the SSPP VIG contains that feature hardware.
e.g. qcom,sde-sspp-vig-blocks
-- qcom,sde-vig-csc-off: offset of CSC hardware
-- qcom,sde-vig-qseed-off: offset of QSEED hardware
-- qcom,sde-vig-pcc: offset and version of PCC hardware
-- qcom,sde-vig-hsic: offset and version of global PA adjustment
-- qcom,sde-vig-memcolor: offset and version of PA memcolor hardware
- qcom,sde-sspp-rgb-blocks: A node that lists the blocks inside the RGB hardware. The
block entries will contain the offset and version (if needed)
of each feature block. The presence of a block entry
indicates that the SSPP RGB contains that feature hardware.
e.g. qcom,sde-sspp-vig-blocks
-- qcom,sde-rgb-scaler-off: offset of RGB scaler hardware
-- qcom,sde-rgb-pcc: offset and version of PCC hardware
- qcom,sde-dspp-blocks: A node that lists the blocks inside the DSPP hardware. The
block entries will contain the offset and version of each
feature block. The presence of a block entry indicates that
the DSPP contains that feature hardware.
e.g. qcom,sde-dspp-blocks
-- qcom,sde-dspp-pcc: offset and version of PCC hardware
-- qcom,sde-dspp-gc: offset and version of GC hardware
-- qcom,sde-dspp-hsic: offset and version of global PA adjustment
-- qcom,sde-dspp-memcolor: offset and version of PA memcolor hardware
-- qcom,sde-dspp-sixzone: offset and version of PA sixzone hardware
-- qcom,sde-dspp-gamut: offset and version of Gamut mapping hardware
-- qcom,sde-dspp-dither: offset and version of dither hardware
-- qcom,sde-dspp-hist: offset and version of histogram hardware
-- qcom,sde-dspp-vlut: offset and version of PA vLUT hardware
- qcom,sde-mixer-blocks: A node that lists the blocks inside the layer mixer hardware. The
block entries will contain the offset and version (if needed)
of each feature block. The presence of a block entry
indicates that the layer mixer contains that feature hardware.
e.g. qcom,sde-mixer-blocks
-- qcom,sde-mixer-gc: offset and version of mixer GC hardware
- qcom,sde-dspp-ad-off: Array of u32 offsets indicate the ad block offset from the
DSPP offset. Since AD hardware is represented as part of
DSPP block, the AD offsets must be offset from the
corresponding DSPP base.
- qcom,sde-dspp-ad-version A u32 value indicating the version of the AD hardware
- qcom,sde-vbif-id: Array of vbif ids corresponding to the
offsets defined in property: qcom,sde-vbif-off.
- qcom,sde-vbif-default-ot-rd-limit: A u32 value indicates the default read OT limit
@ -249,6 +277,8 @@ Example:
qcom,sde-mixer-off = <0x00045000 0x00046000
0x00047000 0x0004a000>;
qcom,sde-dspp-off = <0x00055000 0x00057000>;
qcom,sde-dspp-ad-off = <0x24000 0x22800>;
qcom,sde-dspp-ad-version = <0x00030000>;
qcom,sde-wb-off = <0x00066000>;
qcom,sde-wb-xin-id = <6>;
qcom,sde-intf-off = <0x0006b000 0x0006b800
@ -315,16 +345,6 @@ Example:
qcom,sde-te2-off = <0x100>;
qcom,sde-te-size = <0xffff>;
qcom,sde-te2-size = <0xffff>;
qcom,sde-sspp-qseed-off = <0x100>;
qcom,sde-sspp-csc-off = <0x100>;
qcom,sde-dspp-igc-off = <0x100>;
qcom,sde-dspp-pcc-off = <0x100>;
qcom,sde-dspp-gc-off = <0x100>;
qcom,sde-dspp-pa-off = <0x100>;
qcom,sde-dspp-gamut-off = <0x100>;
qcom,sde-dspp-dither-off = <0x100>;
qcom,sde-dspp-hist-off = <0x100>;
qcom,sde-dspp-ad-off = <0x100>;
qcom,sde-wb-id = <2>;
qcom,sde-wb-clk-ctrl = <0x2bc 16>;
@ -341,6 +361,36 @@ Example:
qcom,sde-vbif-dynamic-ot-wr-limit = <62208000 2>,
<124416000 4>, <248832000 16>;
qcom,sde-sspp-vig-blocks {
qcom,sde-vig-csc-off = <0x320>;
qcom,sde-vig-qseed-off = <0x200>;
/* Offset from vig top, version of HSIC */
qcom,sde-vig-hsic = <0x200 0x00010000>;
qcom,sde-vig-memcolor = <0x200 0x00010000>;
qcom,sde-vig-pcc = <0x1780 0x00010000>;
};
qcom,sde-sspp-rgb-blocks {
qcom,sde-rgb-scaler-off = <0x200>;
qcom,sde-rgb-pcc = <0x380 0x00010000>;
};
qcom,sde-dspp-blocks {
qcom,sde-dspp-pcc = <0x1700 0x00010000>;
qcom,sde-dspp-gc = <0x17c0 0x00010000>;
qcom,sde-dspp-hsic = <0x0 0x00010000>;
qcom,sde-dspp-memcolor = <0x0 0x00010000>;
qcom,sde-dspp-sixzone = <0x0 0x00010000>;
qcom,sde-dspp-gamut = <0x1600 0x00010000>;
qcom,sde-dspp-dither = <0x0 0x00010000>;
qcom,sde-dspp-hist = <0x0 0x00010000>;
qcom,sde-dspp-vlut = <0x0 0x00010000>;
};
qcom,sde-mixer-blocks {
qcom,sde-mixer-gc = <0x3c0 0x00010000>;
};
qcom,platform-supply-entries {
#address-cells = <1>;
#size-cells = <0>;

34
arch/arm/boot/dts/qcom/msm8996-sde.dtsi
View file

@ -58,6 +58,8 @@
qcom,sde-mixer-off = <0x45000 0x46000 0x47000
0x48000 0x49000 0x4a000>;
qcom,sde-dspp-off = <0x55000 0x57000>;
qcom,sde-dspp-ad-off = <0x24000 0x22800>;
qcom,sde-dspp-ad-version = <0x00030000>;
qcom,sde-wb-off = <0x66000>;
qcom,sde-wb-id = <2>;
qcom,sde-wb-xin-id = <6>;
@ -92,9 +94,7 @@
<0x2c4 0>, <0x2ac 4>, <0x2b4 4>, <0x2bc 4>,
<0x2c4 4>, <0x2ac 8>, <0x2b4 8>, <0x3a8 16>,
<0x3b0 16>;
qcom,sde-sspp-csc-off = <0x320>;
qcom,sde-qseed-type = "qseedv2";
qcom,sde-sspp-qseed-off = <0x200>;
qcom,sde-mixer-linewidth = <2560>;
qcom,sde-sspp-linewidth = <2560>;
qcom,sde-mixer-blendstages = <0x7>;
@ -119,6 +119,36 @@
mmagic-supply = <&gdsc_mmagic_mdss>;
vdd-supply = <&gdsc_mdss>;
qcom,sde-sspp-vig-blocks {
qcom,sde-vig-csc-off = <0x320>;
qcom,sde-vig-qseed-off = <0x200>;
/* Offset from vig top, version of HSIC */
qcom,sde-vig-hsic = <0x200 0x00010007>;
qcom,sde-vig-memcolor = <0x200 0x00010007>;
qcom,sde-vig-pcc = <0x1780 0x00010007>;
};
qcom,sde-sspp-rgb-blocks {
qcom,sde-rgb-scaler-off = <0x200>;
qcom,sde-rgb-pcc = <0x380 0x00010007>;
};
qcom,sde-dspp-blocks {
qcom,sde-dspp-pcc = <0x1700 0x00010007>;
qcom,sde-dspp-gc = <0x17c0 0x00010007>;
qcom,sde-dspp-hsic = <0x0 0x00010007>;
qcom,sde-dspp-memcolor = <0x0 0x00010007>;
qcom,sde-dspp-sixzone = <0x0 0x00010007>;
qcom,sde-dspp-gamut = <0x1600 0x00010007>;
qcom,sde-dspp-dither = <0x0 0x00010007>;
qcom,sde-dspp-hist = <0x0 0x00010007>;
qcom,sde-dspp-vlut = <0x0 0x00010007>;
};
qcom,sde-mixer-blocks {
qcom,sde-mixer-gc = <0x3c0 0x00010007>;
};
qcom,platform-supply-entries {
#address-cells = <1>;
#size-cells = <0>;

877
drivers/gpu/drm/msm/sde/sde_hw_catalog.c
View file

File diff suppressed because it is too large Load diff

4
drivers/gpu/drm/msm/sde/sde_hw_catalog.h
View file

@ -339,8 +339,8 @@ struct sde_sspp_sub_blks {
struct sde_src_blk src_blk;
struct sde_scaler_blk scaler_blk;
struct sde_pp_blk csc_blk;
struct sde_pp_blk hsic;
struct sde_pp_blk memcolor;
struct sde_pp_blk hsic_blk;
struct sde_pp_blk memcolor_blk;
struct sde_pp_blk pcc_blk;
struct sde_pp_blk igc_blk;

6
drivers/gpu/drm/msm/sde/sde_hw_dspp.c
View file

@ -251,17 +251,17 @@ static void _setup_dspp_ops(struct sde_hw_dspp *c, unsigned long features)
switch (i) {
case SDE_DSPP_PCC:
if (c->cap->sblk->pcc.version ==
(SDE_COLOR_PROCESS_VER(0x1, 0x0)))
(SDE_COLOR_PROCESS_VER(0x1, 0x7)))
c->ops.setup_pcc = sde_dspp_setup_pcc;
break;
case SDE_DSPP_HSIC:
if (c->cap->sblk->hsic.version ==
(SDE_COLOR_PROCESS_VER(0x1, 0x0)))
(SDE_COLOR_PROCESS_VER(0x1, 0x7)))
c->ops.setup_hue = sde_dspp_setup_hue;
break;
case SDE_DSPP_VLUT:
if (c->cap->sblk->vlut.version ==
(SDE_COLOR_PROCESS_VER(0x1, 0x0))) {
(SDE_COLOR_PROCESS_VER(0x1, 0x7))) {
c->ops.setup_vlut = sde_dspp_setup_vlut;
}
default:

4
drivers/gpu/drm/msm/sde/sde_hw_sspp.c
View file

@ -186,13 +186,13 @@ static inline int _sspp_subblk_offset(struct sde_hw_pipe *ctx,
*idx = sblk->csc_blk.base;
break;
case SDE_SSPP_HSIC:
*idx = sblk->hsic.base;
*idx = sblk->hsic_blk.base;
break;
case SDE_SSPP_PCC:
*idx = sblk->pcc_blk.base;
break;
case SDE_SSPP_MEMCOLOR:
*idx = sblk->memcolor.base;
*idx = sblk->memcolor_blk.base;
break;
default:
rc = -EINVAL;