From 90c2d5300ee2bc1dafae9be7225dd61540cffef7 Mon Sep 17 00:00:00 2001 From: Runmin Wang Date: Tue, 3 May 2016 13:13:26 -0700 Subject: [PATCH] soc: qcom: core_hang: Separate sysfs entry for silver and gold cluster Silver and gold cluster use different PMU_EVENT and may need to have different threshold values. This patch creates different sysfs entries for silver and gold cluster. CRs-Fixed: 1004392 Change-Id: I88cdf5110cadb44a81c0c700d5188bf639bb2129 Signed-off-by: Runmin Wang --- .../bindings/arm/msm/msm_hang_detect.txt | 1 + arch/arm/boot/dts/qcom/msmcobalt.dtsi | 16 +++++++++---- drivers/soc/qcom/core_hang_detect.c | 24 +++++++++++++++---- 3 files changed, 33 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/msm/msm_hang_detect.txt b/Documentation/devicetree/bindings/arm/msm/msm_hang_detect.txt index 7f23d9a3c6e8..1700d588fd46 100644 --- a/Documentation/devicetree/bindings/arm/msm/msm_hang_detect.txt +++ b/Documentation/devicetree/bindings/arm/msm/msm_hang_detect.txt @@ -25,6 +25,7 @@ The device tree parameters for the core hang detection are: Required properties: - compatible : "qcom,core-hang-detect" +- label: unique name used to created sysfs entry - qcom,threshold-arr : Array of APCS_ALIAS*_CORE_HANG_THRESHOLD register address for each core. diff --git a/arch/arm/boot/dts/qcom/msmcobalt.dtsi b/arch/arm/boot/dts/qcom/msmcobalt.dtsi index 96518dca0ec1..aaa0bec51a27 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt.dtsi @@ -1135,13 +1135,21 @@ qcom,firmware-name = "ipa_fws"; }; - qcom,chd { + qcom,chd_silver { compatible = "qcom,core-hang-detect"; + label = "silver"; qcom,threshold-arr = <0x179880b0 0x179980b0 - 0x179a80b0 0x179b80b0 0x178880b0 0x178980b0 - 0x178a80b0 0x178b80b0>; + 0x179a80b0 0x179b80b0>; qcom,config-arr = <0x179880b8 0x179980b8 - 0x179a80b8 0x179b80b8 0x178880b8 0x178980b8 + 0x179a80b8 0x179b80b8>; + }; + + qcom,chd_gold { + compatible = "qcom,core-hang-detect"; + label = "gold"; + qcom,threshold-arr = <0x178880b0 0x178980b0 + 0x178a80b0 0x178b80b0>; + qcom,config-arr = <0x178880b8 0x178980b8 0x178a80b8 0x178b80b8>; }; diff --git a/drivers/soc/qcom/core_hang_detect.c b/drivers/soc/qcom/core_hang_detect.c index e9b7f612dccc..c88d4c34eecf 100644 --- a/drivers/soc/qcom/core_hang_detect.c +++ b/drivers/soc/qcom/core_hang_detect.c @@ -245,7 +245,9 @@ static int msm_hang_detect_probe(struct platform_device *pdev) struct device_node *node = pdev->dev.of_node; struct hang_detect *hang_det = NULL; int cpu, ret, cpu_count = 0; - u32 treg[NR_CPUS], creg[NR_CPUS]; + const char *name; + u32 treg[NR_CPUS] = {0}, creg[NR_CPUS] = {0}; + u32 num_reg = 0; if (!pdev->dev.of_node || !enable) return -ENODEV; @@ -258,15 +260,28 @@ static int msm_hang_detect_probe(struct platform_device *pdev) return -ENOMEM; } + name = of_get_property(node, "label", NULL); + if (!name) { + pr_err("Can't get label property\n"); + return -EINVAL; + } + + num_reg = of_property_count_u32_elems(node, + "qcom,threshold-arr"); + if (num_reg < 0) { + pr_err("Can't get threshold-arr property\n"); + return -EINVAL; + } + ret = of_property_read_u32_array(node, "qcom,threshold-arr", - treg, num_possible_cpus()); + treg, num_reg); if (ret) { pr_err("Can't get threshold-arr property\n"); return -EINVAL; } ret = of_property_read_u32_array(node, "qcom,config-arr", - creg, num_possible_cpus()); + creg, num_reg); if (ret) { pr_err("Can't get config-arr property\n"); return -EINVAL; @@ -289,7 +304,8 @@ static int msm_hang_detect_probe(struct platform_device *pdev) } ret = kobject_init_and_add(&hang_det->kobj, &core_ktype, - &cpu_subsys.dev_root->kobj, "%s", "hang_detect"); + &cpu_subsys.dev_root->kobj, "%s_%s", + "hang_detect", name); if (ret) { pr_err("%s:Error in creation kobject_add\n", __func__); goto out_put_kobj;