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msm: mdss: dsi: Configure pll to work only in full rate mode

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Update the DSI phy v3 initialization sequence as per the
recommended values. The key changes include changing the operating
mode from hybrid to full-rate only.

Change-Id: I999c6f2f76b8991172cd2f5c4b6c99e0ed5d186b
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
This commit is contained in:
Siddhartha Agrawal 2016-08-31 18:23:35 -07:00
parent ab26d09879
commit 912a2bfd75
1 changed files with 3 additions and 3 deletions
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6
drivers/video/fbdev/msm/mdss_dsi_phy_v3.c
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@ -183,7 +183,7 @@ static void mdss_dsi_phy_v3_config_lane_settings(
struct mdss_dsi_ctrl_pdata *ctrl) struct mdss_dsi_ctrl_pdata *ctrl)
{ {
int i; int i;
u32 tx_dctrl[] = {0x18, 0x19, 0x18, 0x02, 0x18}; u32 tx_dctrl[] = {0x00, 0x00, 0x00, 0x02, 0x01};
struct mdss_dsi_phy_ctrl *pd = struct mdss_dsi_phy_ctrl *pd =
&(((ctrl->panel_data).panel_info.mipi).dsi_phy_db); &(((ctrl->panel_data).panel_info.mipi).dsi_phy_db);
@ -407,8 +407,8 @@ int mdss_dsi_phy_v3_init(struct mdss_dsi_ctrl_pdata *ctrl,
mdss_dsi_phy_v3_lanes_enable(ctrl); mdss_dsi_phy_v3_lanes_enable(ctrl);
/* Select hybrid mode and use local-wordclk */ /* Select full-rate mode */
DSI_PHY_W32(ctrl->phy_io.base, CMN_CTRL_2, 0x08); DSI_PHY_W32(ctrl->phy_io.base, CMN_CTRL_2, 0x40);
mdss_dsi_phy_v3_set_pll_source(ctrl); mdss_dsi_phy_v3_set_pll_source(ctrl);