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MIPS: 74K/1074K: Correct erratum workaround.

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Make sure 74K revision numbers are not applied to the 1074K.  Also catch
invalid usage.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5857/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Maciej W. Rozycki 2013-09-18 19:08:15 +01:00 • committed by Ralf Baechle
parent 8ff374b9c2
commit 9213ad7707
1 changed files with 18 additions and 8 deletions
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18
arch/mips/mm/c-r4k.c
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@ -786,21 +786,31 @@ static inline void rm7k_erratum31(void)
static inline void alias_74k_erratum(struct cpuinfo_mips *c) static inline void alias_74k_erratum(struct cpuinfo_mips *c)
{ {
unsigned int imp = c->processor_id & PRID_IMP_MASK;
unsigned int rev = c->processor_id & PRID_REV_MASK;
/* /*
* Early versions of the 74K do not update the cache tags on a * Early versions of the 74K do not update the cache tags on a
* vtag miss/ptag hit which can occur in the case of KSEG0/KUSEG * vtag miss/ptag hit which can occur in the case of KSEG0/KUSEG
* aliases. In this case it is better to treat the cache as always * aliases. In this case it is better to treat the cache as always
* having aliases. * having aliases.
*/ */
if ((c->processor_id & PRID_REV_MASK) <= PRID_REV_ENCODE_332(2, 4, 0)) switch (imp) {
case PRID_IMP_74K:
if (rev <= PRID_REV_ENCODE_332(2, 4, 0))
c->dcache.flags |= MIPS_CACHE_VTAG; c->dcache.flags |= MIPS_CACHE_VTAG;
if ((c->processor_id & PRID_REV_MASK) == PRID_REV_ENCODE_332(2, 4, 0)) if (rev == PRID_REV_ENCODE_332(2, 4, 0))
write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND); write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
if ((c->processor_id & PRID_IMP_MASK) == PRID_IMP_1074K && break;
(c->processor_id & PRID_REV_MASK) <= PRID_REV_ENCODE_332(1, 1, 0)) { case PRID_IMP_1074K:
if (rev <= PRID_REV_ENCODE_332(1, 1, 0)) {
c->dcache.flags |= MIPS_CACHE_VTAG; c->dcache.flags |= MIPS_CACHE_VTAG;
write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND); write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
} }
break;
default:
BUG();
}
} }
static char *way_string[] = { NULL, "direct mapped", "2-way", static char *way_string[] = { NULL, "direct mapped", "2-way",