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msm: mdss: add csc tables for mdp5 for various color spaces

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Add csc tables for 601 full, 601 limited and 709 limited
to support different csc matrices.

HAL provides color space request to driver, consider it
to choose appropriate matrix for conversion.

This will help in solving artifacts during GPU/MDP switches
so that both GPU and MDP choose same matrix for conversion.

Change-Id: Idd73e0695ea64d0c0bd778dba07199e209ca6f3d
Signed-off-by: Vinu Deokaran <vinud@codeaurora.org>
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Signed-off-by: Ping Li <pingli@codeaurora.org>
This commit is contained in:
Vinu Deokaran 2014-10-12 11:32:59 -04:00 • committed by David Keitel
parent e4f8eae0df
commit 9355cfcaeb
7 changed files with 109 additions and 34 deletions
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4
drivers/video/fbdev/msm/mdss_mdp.c
View file

@ -1175,6 +1175,10 @@ void mdss_hw_init(struct mdss_data_type *mdata)
writel_relaxed(1, offset + 16);
}
/* initialize csc matrix default value */
for (i = 0; i < mdata->nvig_pipes; i++)
vig[i].csc_coeff_set = MDSS_MDP_CSC_YUV2RGB_709L;
mdata->nmax_concurrent_ad_hw =
(mdata->mdp_rev < MDSS_MDP_HW_REV_103) ? 1 : 2;

24
drivers/video/fbdev/msm/mdss_mdp.h
View file

@ -128,10 +128,14 @@ enum mdss_mdp_block_type {
};
enum mdss_mdp_csc_type {
MDSS_MDP_CSC_RGB2RGB,
MDSS_MDP_CSC_YUV2RGB,
MDSS_MDP_CSC_RGB2YUV,
MDSS_MDP_CSC_YUV2RGB_601L,
MDSS_MDP_CSC_YUV2RGB_601FR,
MDSS_MDP_CSC_YUV2RGB_709L,
MDSS_MDP_CSC_RGB2YUV_601L,
MDSS_MDP_CSC_RGB2YUV_601FR,
MDSS_MDP_CSC_RGB2YUV_709L,
MDSS_MDP_CSC_YUV2YUV,
MDSS_MDP_CSC_RGB2RGB,
MDSS_MDP_MAX_CSC
};
@ -568,6 +572,7 @@ struct mdss_mdp_pipe {
u8 chroma_sample_v;
u32 frame_rate;
u8 csc_coeff_set;
};
struct mdss_mdp_writeback_arg {
@ -944,6 +949,19 @@ static inline u32 mdss_mdp_get_cursor_frame_size(struct mdss_data_type *mdata)
return mdata->max_cursor_size * mdata->max_cursor_size * 4;
}
static inline uint8_t pp_vig_csc_pipe_val(struct mdss_mdp_pipe *pipe)
{
switch (pipe->csc_coeff_set) {
case MDP_CSC_ITU_R_601:
return MDSS_MDP_CSC_YUV2RGB_601L;
case MDP_CSC_ITU_R_601_FR:
return MDSS_MDP_CSC_YUV2RGB_601FR;
case MDP_CSC_ITU_R_709:
default:
return MDSS_MDP_CSC_YUV2RGB_709L;
}
}
irqreturn_t mdss_mdp_isr(int irq, void *ptr);
void mdss_mdp_irq_clear(struct mdss_data_type *mdata,
u32 intr_type, u32 intf_num);

2
drivers/video/fbdev/msm/mdss_mdp_cdm.c
View file

@ -129,7 +129,7 @@ static int mdss_mdp_cdm_csc_setup(struct mdss_mdp_cdm *cdm,
int rc = 0;
u32 op_mode = 0;
if (data->csc_type == MDSS_MDP_CSC_RGB2YUV) {
if (data->csc_type == MDSS_MDP_CSC_RGB2YUV_601L) {
op_mode |= BIT(2); /* DST_DATA_FORMAT = YUV */
op_mode &= ~BIT(1); /* SRC_DATA_FORMAT = RGB */
op_mode |= BIT(0); /* EN = 1 */

2
drivers/video/fbdev/msm/mdss_mdp_intf_video.c
View file

@ -1252,7 +1252,7 @@ static int mdss_mdp_video_cdm_setup(struct mdss_mdp_cdm *cdm,
}
setup.out_format = pinfo->out_format;
if (fmt->is_yuv)
setup.csc_type = MDSS_MDP_CSC_RGB2YUV;
setup.csc_type = MDSS_MDP_CSC_RGB2YUV_601L;
else
setup.csc_type = MDSS_MDP_CSC_RGB2RGB;

4
drivers/video/fbdev/msm/mdss_mdp_intf_writeback.c
View file

@ -161,7 +161,7 @@ static int mdss_mdp_writeback_cdm_setup(struct mdss_mdp_writeback_ctx *ctx,
}
if (fmt->is_yuv)
setup.csc_type = MDSS_MDP_CSC_RGB2YUV;
setup.csc_type = MDSS_MDP_CSC_RGB2YUV_601L;
else
setup.csc_type = MDSS_MDP_CSC_RGB2RGB;
@ -258,7 +258,7 @@ static int mdss_mdp_writeback_format_setup(struct mdss_mdp_writeback_ctx *ctx,
if (ctx->type != MDSS_MDP_WRITEBACK_TYPE_ROTATOR &&
fmt->is_yuv && !ctl->cdm) {
mdss_mdp_csc_setup(MDSS_MDP_BLOCK_WB, ctx->wb_num,
MDSS_MDP_CSC_RGB2YUV);
MDSS_MDP_CSC_RGB2YUV_601L);
opmode |= (1 << 8) | /* CSC_EN */
(0 << 9) | /* SRC_DATA=RGB */
(1 << 10); /* DST_DATA=YCBCR */

5
drivers/video/fbdev/msm/mdss_mdp_overlay.c
View file

@ -915,6 +915,11 @@ int mdss_mdp_overlay_pipe_setup(struct msm_fb_data_type *mfd,
}
}
/*
* Populate Color Space.
*/
if (pipe->src_fmt->is_yuv && (pipe->type == MDSS_MDP_PIPE_TYPE_VIG))
pipe->csc_coeff_set = req->color_space;
/*
* When scaling is enabled src crop and image
* width and height is modified by user

102
drivers/video/fbdev/msm/mdss_mdp_pp.c
View file

@ -25,7 +25,79 @@
#include "mdss_mdp_pp_cache_config.h"
struct mdp_csc_cfg mdp_csc_convert[MDSS_MDP_MAX_CSC] = {
[MDSS_MDP_CSC_RGB2RGB] = {
[MDSS_MDP_CSC_YUV2RGB_601L] = {
0,
{
0x0254, 0x0000, 0x0331,
0x0254, 0xff37, 0xfe60,
0x0254, 0x0409, 0x0000,
},
{ 0xfff0, 0xff80, 0xff80,},
{ 0x0, 0x0, 0x0,},
{ 0x10, 0xeb, 0x10, 0xf0, 0x10, 0xf0,},
{ 0x0, 0xff, 0x0, 0xff, 0x0, 0xff,},
},
[MDSS_MDP_CSC_YUV2RGB_601FR] = {
0,
{
0x0200, 0x0000, 0x02ce,
0x0200, 0xff50, 0xfe92,
0x0200, 0x038b, 0x0000,
},
{ 0x0000, 0xff80, 0xff80,},
{ 0x0, 0x0, 0x0,},
{ 0x0, 0xff, 0x0, 0xff, 0x0, 0xff,},
{ 0x0, 0xff, 0x0, 0xff, 0x0, 0xff,},
},
[MDSS_MDP_CSC_YUV2RGB_709L] = {
0,
{
0x0254, 0x0000, 0x0396,
0x0254, 0xff93, 0xfeef,
0x0254, 0x043e, 0x0000,
},
{ 0xfff0, 0xff80, 0xff80,},
{ 0x0, 0x0, 0x0,},
{ 0x10, 0xeb, 0x10, 0xf0, 0x10, 0xf0,},
{ 0x0, 0xff, 0x0, 0xff, 0x0, 0xff,},
},
[MDSS_MDP_CSC_RGB2YUV_601L] = {
0,
{
0x0083, 0x0102, 0x0032,
0xffb4, 0xff6b, 0x00e1,
0x00e1, 0xff44, 0xffdb
},
{ 0x0, 0x0, 0x0,},
{ 0x0010, 0x0080, 0x0080,},
{ 0x0, 0xff, 0x0, 0xff, 0x0, 0xff,},
{ 0x0010, 0x00eb, 0x0010, 0x00f0, 0x0010, 0x00f0,},
},
[MDSS_MDP_CSC_RGB2YUV_601FR] = {
0,
{
0x0099, 0x012d, 0x003a,
0xffaa, 0xff56, 0x0100,
0x0100, 0xff2a, 0xffd6
},
{ 0x0, 0x0, 0x0,},
{ 0x0000, 0x0080, 0x0080,},
{ 0x0, 0xff, 0x0, 0xff, 0x0, 0xff,},
{ 0x0, 0xff, 0x0, 0xff, 0x0, 0xff,},
},
[MDSS_MDP_CSC_RGB2YUV_709L] = {
0,
{
0x005d, 0x013a, 0x0020,
0xffcc, 0xff53, 0x00e1,
0x00e1, 0xff34, 0xffeb
},
{ 0x0, 0x0, 0x0,},
{ 0x0010, 0x0080, 0x0080,},
{ 0x0, 0xff, 0x0, 0xff, 0x0, 0xff,},
{ 0x0010, 0x00eb, 0x0010, 0x00f0, 0x0010, 0x00f0,},
},
[MDSS_MDP_CSC_YUV2YUV] = {
0,
{
0x0200, 0x0000, 0x0000,
@ -37,31 +109,7 @@ struct mdp_csc_cfg mdp_csc_convert[MDSS_MDP_MAX_CSC] = {
{ 0x0, 0xff, 0x0, 0xff, 0x0, 0xff,},
{ 0x0, 0xff, 0x0, 0xff, 0x0, 0xff,},
},
[MDSS_MDP_CSC_YUV2RGB] = {
0,
{
0x0254, 0x0000, 0x0331,
0x0254, 0xff37, 0xfe60,
0x0254, 0x0409, 0x0000,
},
{ 0xfff0, 0xff80, 0xff80,},
{ 0x0, 0x0, 0x0,},
{ 0x0, 0xff, 0x0, 0xff, 0x0, 0xff,},
{ 0x0, 0xff, 0x0, 0xff, 0x0, 0xff,},
},
[MDSS_MDP_CSC_RGB2YUV] = {
0,
{
0x0083, 0x0102, 0x0032,
0x1fb5, 0x1f6c, 0x00e1,
0x00e1, 0x1f45, 0x1fdc
},
{ 0x0, 0x0, 0x0,},
{ 0x0010, 0x0080, 0x0080,},
{ 0x0, 0xff, 0x0, 0xff, 0x0, 0xff,},
{ 0x0010, 0x00eb, 0x0010, 0x00f0, 0x0010, 0x00f0,},
},
[MDSS_MDP_CSC_YUV2YUV] = {
[MDSS_MDP_CSC_RGB2RGB] = {
0,
{
0x0200, 0x0000, 0x0000,
@ -812,7 +860,7 @@ static int pp_vig_pipe_setup(struct mdss_mdp_pipe *pipe, u32 *op)
* CSC matrix
*/
mdss_mdp_csc_setup(MDSS_MDP_BLOCK_SSPP, pipe->num,
MDSS_MDP_CSC_YUV2RGB);
pp_vig_csc_pipe_val(pipe));
}
/* Update CSC state only if tuning mode is enable */