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ARM: dts: msm: Add sdhc1 for sdm660 QRD

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Add sdhc1 to support eMMC for sdm660 QRD.

CRs-Fixed: 1103296
Change-Id: I764845530559ef8a7fc81ae3307f599e07d342dd
Signed-off-by: xiaonian <xiaonian@codeaurora.org>
This commit is contained in:
xiaonian 2017-01-03 18:25:19 +08:00
parent 83dbf65a2d
commit 941d27d81f
1 changed files with 27 additions and 1 deletions
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28
arch/arm/boot/dts/qcom/sdm660-qrd.dtsi
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@ -1,4 +1,4 @@
/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -20,5 +20,31 @@
pinctrl-0 = <&uart_console_active>;
};
&sdhc_1 {
/* device core power supply */
vdd-supply = <&pm660l_l4>;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <200 570000>;
/* device communication power supply */
vdd-io-supply = <&pm660_l8>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <200 325000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;
qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 192000000
384000000>;
qcom,nonremovable;
qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v";
status = "ok";
};
&soc {
};