ARM: mvebu: Remove the unused argument of set_cpu_coherent()
set_cpu_coherent() took the SMP group ID as parameter. But this parameter was never used, and the CPU always uses the SMP group 0. So we can remove this parameter. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1397488214-20685-5-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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3 changed files with 4 additions and 4 deletions
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@ -63,7 +63,7 @@ static struct of_device_id of_coherency_table[] = {
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/* Function defined in coherency_ll.S */
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/* Function defined in coherency_ll.S */
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int ll_set_cpu_coherent(void);
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int ll_set_cpu_coherent(void);
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int set_cpu_coherent(int smp_group_id)
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int set_cpu_coherent(void)
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{
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{
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if (!coherency_base) {
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if (!coherency_base) {
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pr_warn("Can't make current CPU cache coherent.\n");
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pr_warn("Can't make current CPU cache coherent.\n");
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@ -302,7 +302,7 @@ static void __init armada_370_coherency_init(struct device_node *np)
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sync_cache_w(&coherency_phys_base);
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sync_cache_w(&coherency_phys_base);
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coherency_base = of_iomap(np, 0);
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coherency_base = of_iomap(np, 0);
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coherency_cpu_base = of_iomap(np, 1);
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coherency_cpu_base = of_iomap(np, 1);
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set_cpu_coherent(0);
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set_cpu_coherent();
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}
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}
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static void __init armada_375_380_coherency_init(struct device_node *np)
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static void __init armada_375_380_coherency_init(struct device_node *np)
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@ -15,8 +15,8 @@
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#define __MACH_370_XP_COHERENCY_H
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#define __MACH_370_XP_COHERENCY_H
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extern unsigned long coherency_phys_base;
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extern unsigned long coherency_phys_base;
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int set_cpu_coherent(void);
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int set_cpu_coherent(int smp_group_id);
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int coherency_init(void);
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int coherency_init(void);
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int coherency_available(void);
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int coherency_available(void);
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@ -103,7 +103,7 @@ static void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus)
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set_secondary_cpus_clock();
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set_secondary_cpus_clock();
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flush_cache_all();
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flush_cache_all();
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set_cpu_coherent(0);
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set_cpu_coherent();
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/*
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/*
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* In order to boot the secondary CPUs we need to ensure
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* In order to boot the secondary CPUs we need to ensure
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