evie/android_kernel_oneplus_msm8998
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clocksource: sun4i: Factor out some timer code

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The set_next_event and set_mode callbacks share a lot of common code we
can easily factor to avoid duplication and mistakes.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
This commit is contained in:
Maxime Ripard 2013-07-16 16:45:38 +02:00 • committed by Daniel Lezcano
parent 63d88f1ac7
commit 96651a0732
1 changed files with 32 additions and 16 deletions
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48
drivers/clocksource/sun4i_timer.c
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@ -52,24 +52,46 @@ static void sun4i_clkevt_sync(void)
cpu_relax(); cpu_relax();
} }
static void sun4i_clkevt_time_stop(u8 timer)
{
u32 val = readl(timer_base + TIMER_CTL_REG(timer));
writel(val & ~TIMER_CTL_ENABLE, timer_base + TIMER_CTL_REG(timer));
sun4i_clkevt_sync();
}
static void sun4i_clkevt_time_setup(u8 timer, unsigned long delay)
{
writel(delay, timer_base + TIMER_INTVAL_REG(timer));
}
static void sun4i_clkevt_time_start(u8 timer, bool periodic)
{
u32 val = readl(timer_base + TIMER_CTL_REG(timer));
if (periodic)
val &= ~TIMER_CTL_ONESHOT;
else
val |= TIMER_CTL_ONESHOT;
writel(val | TIMER_CTL_ENABLE, timer_base + TIMER_CTL_REG(timer));
}
static void sun4i_clkevt_mode(enum clock_event_mode mode, static void sun4i_clkevt_mode(enum clock_event_mode mode,
struct clock_event_device *clk) struct clock_event_device *clk)
{ {
u32 u = readl(timer_base + TIMER_CTL_REG(0));
switch (mode) { switch (mode) {
case CLOCK_EVT_MODE_PERIODIC: case CLOCK_EVT_MODE_PERIODIC:
u &= ~(TIMER_CTL_ONESHOT); sun4i_clkevt_time_stop(0);
writel(u | TIMER_CTL_ENABLE, timer_base + TIMER_CTL_REG(0)); sun4i_clkevt_time_start(0, true);
break; break;
case CLOCK_EVT_MODE_ONESHOT: case CLOCK_EVT_MODE_ONESHOT:
writel(u | TIMER_CTL_ONESHOT, timer_base + TIMER_CTL_REG(0)); sun4i_clkevt_time_stop(0);
sun4i_clkevt_time_start(0, false);
break; break;
case CLOCK_EVT_MODE_UNUSED: case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN: case CLOCK_EVT_MODE_SHUTDOWN:
default: default:
writel(u & ~(TIMER_CTL_ENABLE), timer_base + TIMER_CTL_REG(0)); sun4i_clkevt_time_stop(0);
break; break;
} }
} }
@ -77,15 +99,9 @@ static void sun4i_clkevt_mode(enum clock_event_mode mode,
static int sun4i_clkevt_next_event(unsigned long evt, static int sun4i_clkevt_next_event(unsigned long evt,
struct clock_event_device *unused) struct clock_event_device *unused)
{ {
u32 val = readl(timer_base + TIMER_CTL_REG(0)); sun4i_clkevt_time_stop(0);
writel(val & ~TIMER_CTL_ENABLE, timer_base + TIMER_CTL_REG(0)); sun4i_clkevt_time_setup(0, evt);
sun4i_clkevt_sync(); sun4i_clkevt_time_start(0, false);
writel(evt, timer_base + TIMER_INTVAL_REG(0));
val = readl(timer_base + TIMER_CTL_REG(0));
writel(val | TIMER_CTL_ENABLE | TIMER_CTL_AUTORELOAD,
timer_base + TIMER_CTL_REG(0));
return 0; return 0;
} }