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msm: mdss: validate qseed3 params

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This change adds the validation of qseed3 params before programming
the registers. This check would prevent any wrong configuration on
the vig src pipes.

CRs-Fixed: 2008489
Change-Id: If05d95349ba437332778a378804e6dd373ba2beb
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
This commit is contained in:
Abhijit Kulkarni 2017-02-15 12:13:25 -08:00
parent 25becb4433
commit 9aa059de13
1 changed files with 100 additions and 1 deletions
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101
drivers/video/fbdev/msm/mdss_mdp_overlay.c
View file

@ -519,6 +519,102 @@ static int __mdss_mdp_validate_pxl_extn(struct mdss_mdp_pipe *pipe)
return 0;
}
static int __mdss_mdp_validate_qseed3_cfg(struct mdss_mdp_pipe *pipe)
{
int plane;
for (plane = 0; plane < MAX_PLANES; plane++) {
u32 hor_req_pixels, hor_fetch_pixels;
u32 hor_ov_fetch, vert_ov_fetch;
u32 vert_req_pixels, vert_fetch_pixels;
u32 src_w = DECIMATED_DIMENSION(pipe->src.w, pipe->horz_deci);
u32 src_h = DECIMATED_DIMENSION(pipe->src.h, pipe->vert_deci);
/*
* plane 1 and 2 are for chroma and are same. While configuring
* HW, programming only one of the chroma components is
* sufficient.
*/
if (plane == 2)
continue;
/*
* For chroma plane, width is half for the following sub sampled
* formats. Except in case of decimation, where hardware avoids
* 1 line of decimation instead of downsampling.
*/
if (plane == 1 && !pipe->horz_deci &&
((pipe->src_fmt->chroma_sample == MDSS_MDP_CHROMA_420) ||
(pipe->src_fmt->chroma_sample == MDSS_MDP_CHROMA_H2V1))) {
src_w >>= 1;
}
if (plane == 1 && !pipe->vert_deci &&
((pipe->src_fmt->chroma_sample == MDSS_MDP_CHROMA_420) ||
(pipe->src_fmt->chroma_sample == MDSS_MDP_CHROMA_H1V2)))
src_h >>= 1;
hor_req_pixels = pipe->scaler.num_ext_pxls_left[plane];
hor_fetch_pixels = src_w +
(pipe->scaler.left_ftch[plane] >> pipe->horz_deci) +
pipe->scaler.left_rpt[plane] +
(pipe->scaler.right_ftch[plane] >> pipe->horz_deci) +
pipe->scaler.right_rpt[plane];
hor_ov_fetch = src_w +
(pipe->scaler.left_ftch[plane] >> pipe->horz_deci) +
(pipe->scaler.right_ftch[plane] >> pipe->horz_deci);
vert_req_pixels = pipe->scaler.num_ext_pxls_top[plane];
vert_fetch_pixels = src_h +
(pipe->scaler.top_ftch[plane] >> pipe->vert_deci) +
pipe->scaler.top_rpt[plane] +
(pipe->scaler.btm_ftch[plane] >> pipe->vert_deci) +
pipe->scaler.btm_rpt[plane];
vert_ov_fetch = src_h +
(pipe->scaler.top_ftch[plane] >> pipe->vert_deci) +
(pipe->scaler.btm_ftch[plane] >> pipe->vert_deci);
if ((hor_req_pixels != hor_fetch_pixels) ||
(hor_ov_fetch > pipe->img_width) ||
(vert_req_pixels != vert_fetch_pixels) ||
(vert_ov_fetch > pipe->img_height)) {
pr_err("err: plane=%d h_req:%d h_fetch:%d v_req:%d v_fetch:%d src_img[%d %d] ov_fetch[%d %d]\n",
plane,
hor_req_pixels, hor_fetch_pixels,
vert_req_pixels, vert_fetch_pixels,
pipe->img_width, pipe->img_height,
hor_ov_fetch, vert_ov_fetch);
pipe->scaler.enable = 0;
return -EINVAL;
}
/*
* alpha plane can only be scaled using bilinear or pixel
* repeat/drop, src_width and src_height are only specified
* for Y and UV plane
*/
if (plane != 3) {
if ((hor_req_pixels !=
pipe->scaler.src_width[plane]) ||
(vert_req_pixels !=
pipe->scaler.src_height[plane])) {
pr_err("roi_w[%d]=%d, scaler:[%d, %d], src_img:[%d, %d]\n",
plane, pipe->scaler.roi_w[plane],
pipe->scaler.src_width[plane],
pipe->scaler.src_height[plane],
pipe->img_width, pipe->img_height);
pipe->scaler.enable = 0;
return -EINVAL;
}
}
}
return 0;
}
int mdss_mdp_overlay_setup_scaling(struct mdss_mdp_pipe *pipe)
{
@ -528,8 +624,11 @@ int mdss_mdp_overlay_setup_scaling(struct mdss_mdp_pipe *pipe)
mdata = mdss_mdp_get_mdata();
if (pipe->scaler.enable) {
if (!test_bit(MDSS_CAPS_QSEED3, mdata->mdss_caps_map))
if (test_bit(MDSS_CAPS_QSEED3, mdata->mdss_caps_map))
rc = __mdss_mdp_validate_qseed3_cfg(pipe);
else
rc = __mdss_mdp_validate_pxl_extn(pipe);
return rc;
}