evie/android_kernel_oneplus_msm8998
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msm: mdss: re-check dsi cmd transfer done interrupt

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There is a possibility that irq trigger may get delayed in the
software for more than expected, in such cases the cmd done status
may have been updated in DSI isr status register. Add additional
check to see if the dma transfer is completed by reading this register
and checking the status.

Change-Id: Ia27ee162668949934c3e3cedc97e746832824f5c
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
This commit is contained in:
Jeevan Shriram 2015-06-22 13:23:02 -07:00 • committed by David Keitel
parent 8dd6c66e6a
commit 9ba615f517
1 changed files with 19 additions and 0 deletions
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19
drivers/video/fbdev/msm/mdss_dsi_host.c
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@ -1721,6 +1721,25 @@ static int mdss_dsi_cmd_dma_tx(struct mdss_dsi_ctrl_pdata *ctrl,
ret = wait_for_completion_timeout(&ctrl->dma_comp,
msecs_to_jiffies(DMA_TX_TIMEOUT));
if (ret <= 0) {
u32 reg_val, status, mask;
reg_val = MIPI_INP(ctrl->ctrl_base + 0x0110);/* DSI_INTR_CTRL */
mask = reg_val & DSI_INTR_CMD_DMA_DONE_MASK;
status = mask & reg_val;
if (status) {
pr_warn("dma tx done but irq not triggered\n");
reg_val &= DSI_INTR_MASK_ALL;
/* clear CMD DMA isr only */
reg_val |= DSI_INTR_CMD_DMA_DONE;
MIPI_OUTP(ctrl->ctrl_base + 0x0110, reg_val);
mdss_dsi_disable_irq_nosync(ctrl, DSI_MDP_TERM);
complete(&ctrl->dma_comp);
ret = 1;
}
}
if (ret == 0)
ret = -ETIMEDOUT;
else