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Merge branch 'msm-4.4' into dev/msm-4.4-8996au

Browse source 
Conflicts:
	drivers/iommu/arm-smmu.c
	drivers/media/platform/msm/ais/fd/msm_fd_dev.c
	drivers/media/platform/msm/camera_v2/fd/msm_fd_dev.c
	drivers/soc/qcom/glink.c
	include/uapi/linux/msm_ipa.h

Change-Id: Id007a850fa2df09f08c413ffcd447a6532fad83c
Signed-off-by: Zhiqiang Tu <ztu@codeaurora.org>
This commit is contained in:
Zhiqiang Tu 2017-08-24 15:30:08 +08:00
commit 9df1d44946
1417 changed files with 59844 additions and 12231 deletions
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12
Documentation/devicetree/bindings/arm/msm/diag_mhi.txt Normal file
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@ -0,0 +1,12 @@
Qualcomm Technologies, Inc. Diag MHI Driver
Required properties:
-compatible : should be "qcom,diag-mhi".
-qcom,mhi : phandle of MHI Device to connect to.
Example:
qcom,diag {
compatible = "qcom,diag-mhi";
qcom,mhi = <&mhi_wlan>;
};

9
Documentation/devicetree/bindings/arm/msm/msm.txt
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@ -86,6 +86,9 @@ SoCs:
- MSM8998
compatible = "qcom,msm8998"
- MSM8998_9x55
compatible = "qcom,msm8998-9x55"
- MSMHAMSTER
compatible = "qcom,msmhamster"
@ -166,6 +169,9 @@ Generic board variants:
- RUMI device:
compatible = "qcom,rumi"
- SVR device:
compatible = "qcom,svr"
Boards (SoC type + board variant):
@ -199,6 +205,7 @@ compatible = "qcom,apqtitanium-mtp"
compatible = "qcom,apq8098-cdp"
compatible = "qcom,apq8098-mtp"
compatible = "qcom,apq8098-qrd"
compatible = "qcom,apq8098-svr"
compatible = "qcom,mdm9630-cdp"
compatible = "qcom,mdm9630-mtp"
compatible = "qcom,mdm9630-sim"
@ -270,6 +277,8 @@ compatible = "qcom,msm8998-rumi"
compatible = "qcom,msm8998-cdp"
compatible = "qcom,msm8998-mtp"
compatible = "qcom,msm8998-qrd"
compatible = "qcom,msm8998-9x55-cdp"
compatible = "qcom,msm8998-9x55-mtp"
compatible = "qcom,msmhamster-rumi"
compatible = "qcom,msmhamster-cdp"
compatible = "qcom,msmhamster-mtp"

14
Documentation/devicetree/bindings/arm/msm/msm_ipc_router_mhi_xprt.txt
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@ -1,18 +1,20 @@
Qualcomm Technologies, Inc. IPC Router MHI Transport
Required properties:
-compatible: should be "qcom,ipc_router_mhi_xprt"
-qcom,out-chan-id: MHI Channel ID for the transmit path
-qcom,in-chan-id: MHI Channel ID for the receive path
-qcom,xprt-remote: string that defines the edge of the transport (PIL Name)
-compatible: should be "qcom,ipc_router_mhi_xprt".
-qcom,mhi: phandle of MHI Device to connect to.
-qcom,out-chan-id: MHI Channel ID for the transmit path.
-qcom,in-chan-id: MHI Channel ID for the receive path.
-qcom,xprt-remote: string that defines the edge of the transport(PIL Name).
-qcom,xprt-linkid: unique integer to identify the tier to which the link
belongs to in the network and is used to avoid the
routing loops while forwarding the broadcast messages
-qcom,xprt-version: unique version ID used by MHI transport header
routing loops while forwarding the broadcast messages.
-qcom,xprt-version: unique version ID used by MHI transport header.
Example:
qcom,ipc_router_external_modem_xprt2 {
compatible = "qcom,ipc_router_mhi_xprt";
qcom,mhi = <&mhi_wlan>;
qcom,out-chan-id = <34>;
qcom,in-chan-id = <35>;
qcom,xprt-remote = "external-modem";

5
Documentation/devicetree/bindings/arm/msm/rdbg-smp2p.txt
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@ -2,12 +2,15 @@ Qualcomm Technologies, Inc. Remote Debugger (RDBG) driver
Required properties:
-compatible : Should be one of
To communicate with modem
To communicate with adsp
qcom,smp2pgpio_client_rdbg_2_in (inbound)
qcom,smp2pgpio_client_rdbg_2_out (outbound)
To communicate with modem
qcom,smp2pgpio_client_rdbg_1_in (inbound)
qcom,smp2pgpio_client_rdbg_1_out (outbound)
To communicate with cdsp
qcom,smp2pgpio_client_rdbg_5_in (inbound)
qcom,smp2pgpio_client_rdbg_5_out (outbound)
-gpios : the relevant gpio pins of the entry.
Example:

14
Documentation/devicetree/bindings/cnss/cnss-wlan.txt
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@ -11,8 +11,9 @@ the WLAN enable GPIO, 3.3V fixed voltage regulator resources. It also
provides the reserved RAM dump memory location and size.
Required properties:
- compatible: "qcom,cnss"
- wlan-en-gpio: WLAN_EN GPIO signal specified by QCA6174 specifications
- compatible: "qcom,cnss" for QCA6174 device
"qcom,cnss-qca6290" for QCA6290 device
- wlan-en-gpio: WLAN_EN GPIO signal specified by the chip specifications
- vdd-wlan-supply: phandle to the regulator device tree node
- pinctrl-names: Names corresponding to the numbered pinctrl states
- pinctrl-<n>: Pinctrl states as described in
@ -44,6 +45,13 @@ Optional properties:
which should be drived depending on platforms
- qcom,is-dual-wifi-enabled: Boolean property to control wlan enable(wlan-en)
gpio on dual-wifi platforms.
- vdd-wlan-en-supply: WLAN_EN fixed regulator specified by QCA6174 specifications.
- qcom,wlan-en-vreg-support: Boolean property to decide the whether the WLAN_EN pin
is a gpio or fixed regulator.
- qcom,mhi: phandle to indicate the device which needs MHI support.
- qcom,cap-tsf-gpio: WLAN_TSF_CAPTURED GPIO signal specified by the chip
specifications, should be drived depending on
products
Example:
@ -60,4 +68,6 @@ Example:
pinctrl-0 = <&cnss_default>;
qcom,wlan-rc-num = <0>;
qcom,wlan-smmu-iova-address = <0 0x10000000>;
qcom,mhi = <&mhi_wlan>;
qcom,cap-tsf-gpio = <&tlmm 126 1>;
};

2
Documentation/devicetree/bindings/cnss/icnss.txt
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@ -28,6 +28,7 @@ Optional properties:
- qcom,icnss-vadc: VADC handle for vph_pwr read APIs.
- qcom,icnss-adc_tm: VADC handle for vph_pwr notification APIs.
- qcom,smmu-s1-bypass: Boolean context flag to set SMMU to S1 bypass
- qcom,wlan-msa-fixed-region: phandle, specifier pairs to children of /reserved-memory
Example:
@ -54,6 +55,7 @@ Example:
<0 140 0 /* CE10 */ >,
<0 141 0 /* CE11 */ >;
qcom,wlan-msa-memory = <0x200000>;
qcom,wlan-msa-fixed-region = <&wlan_msa_mem>;
qcom,smmu-s1-bypass;
vdd-0.8-cx-mx-supply = <&pm8998_l5>;
qcom,vdd-0.8-cx-mx-config = <800000 800000 2400 1000>;

3
Documentation/devicetree/bindings/drm/msm/mdp.txt
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@ -3,6 +3,7 @@ Qualcomm Technologies,Inc. Adreno/Snapdragon display controller
Required properties:
Optional properties:
- contiguous-region: reserved memory for HDMI and DSI buffer.
- qcom,sde-plane-id-map: plane id mapping for virtual plane.
- qcom,sde-plane-id: each virtual plane mapping node.
- reg: reg property.
@ -17,6 +18,8 @@ Optional properties:
Example:
&mdss_mdp {
contiguous-region = <&cont_splash_mem &cont_splash_mem_hdmi>;
qcom,sde-plane-id-map {
qcom,sde-plane-id@0 {
reg = <0x0>;

4
Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt
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@ -187,6 +187,10 @@ Optional properties:
"bl_ctrl_wled" = Backlight controlled by WLED.
"bl_ctrl_dcs" = Backlight controlled by DCS commands.
other: Unknown backlight control. (default)
- qcom,mdss-dsi-bl-dcs-command-state: A string that specifies the ctrl state for sending brightness
controlling commands, this is only available when backlight is controlled by DCS commands.
"dsi_lp_mode" = DSI low power mode (default).
"dsi_hs_mode" = DSI high speed mode.
- qcom,mdss-dsi-bl-pwm-pmi: Boolean to indicate that PWM control is through second pmic chip.
- qcom,mdss-dsi-bl-pmic-bank-select: LPG channel for backlight.
Requred if blpmiccontroltype is PWM

4
Documentation/devicetree/bindings/gpu/adreno.txt
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@ -93,6 +93,7 @@ Optional Properties:
- qcom,chipid: If it exists this property is used to replace
the chip identification read from the GPU hardware.
This is used to override faulty hardware readings.
- qcom,disable-wake-on-touch: Boolean. Disables the GPU power up on a touch input event.
- qcom,disable-busy-time-burst:
Boolean. Disables the busy time burst to avoid switching
of power level for large frames based on the busy time limit.
@ -141,6 +142,9 @@ Optional Properties:
rendering thread is running on masked CPUs.
Bit 0 is for CPU-0, bit 1 is for CPU-1...
- qcom,l2pc-update-queue:
Disables L2PC on masked CPUs at queue time when it's true.
- qcom,snapshot-size:
Specify the size of snapshot in bytes. This will override
snapshot size defined in the driver code.

2
Documentation/devicetree/bindings/leds/leds-qpnp-wled.txt
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@ -78,6 +78,8 @@ Optional properties for WLED:
- qcom,lcd-psm-ctrl : A boolean property to specify if PSM needs to be
controlled dynamically when WLED module is enabled
or disabled.
- qcom,auto-calibration-enable : A boolean property which enables auto-calibration
of the WLED sink configuration.
Optional properties if 'qcom,disp-type-amoled' is mentioned in DT:
- qcom,loop-comp-res-kohm : control to select the compensation resistor in kohm. default is 320.

41
Documentation/devicetree/bindings/media/video/msm-ba.txt Normal file
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@ -0,0 +1,41 @@
* Qualcomm Technologies Inc MSM BA
[Root level node]
==================
Required properties:
- compatible: Must be "qcom,msm-ba".
[Subnode]
==========
- qcom,ba-input-profile-#: Defines child nodes for the profiles supported
by BA driver. Each profile should have properties "qcom,type",
"qcom,name", "qcom,ba-input", "qcom,ba-output", "qcom,sd-name",
"qcom,ba-node" and "qcom,user-type".
Required properties:
- qcom,type: Input type such as CVBS(0), HDMI(4) etc as defined in BA driver.
This property is of type u32.
- qcom,name: Name of the input type. This property is of type string.
- qcom,ba-input: BA input id supported by a bridge chip for this profile.
This property is of type u32.
- qcom,ba-output: BA output id for the profile. This property is of type u32.
- qcom,sd-name: Name of the sub-device driver associated with this profile.
This property is of type string.
- qcom,ba-node: Defines the ba node id. This is the avdevice node used by camera
for this profile. This property is of type u32.
- qcom,user-type: This property defines how the profile is being used. If this
profile is used by kernel it is set to 0 and if used by userspace
it is set to 1. This property is of type u32.
Example:
qcom,msm-ba {
compatible = "qcom,msm-ba";
qcom,ba-input-profile-0 {
qcom,type = <4>; /* input type */
qcom,name = "HDMI-1"; /* input name */
qcom,ba-input = <13>; /* ba input id */
qcom,ba-output = <0>; /* ba output id */
qcom,sd-name = "adv7481"; /* sd name */
qcom,ba-node = <0>; /* ba node */
qcom,user-type = <1>; /* user type */
};
};

3
Documentation/devicetree/bindings/media/video/msm-cci.txt
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@ -123,6 +123,9 @@ Optional properties:
- qcom,gpio-vdig : should contain index to gpio used by sensors digital vreg enable
- qcom,gpio-vaf : should contain index to gpio used by sensors af vreg enable
- qcom,gpio-af-pwdm : should contain index to gpio used by sensors af pwdm_n
- qcom,gpio-custom1 : should contain index to gpio used by sensors specific to usecase
- qcom,gpio-custom2 : should contain index to gpio used by sensors specific to usecase
- qcom,gpio-custom3 : should contain index to gpio used by sensors specific to usecase
- qcom,gpio-req-tbl-num : should contain index to gpios specific to this sensor
- qcom,gpio-req-tbl-flags : should contain direction of gpios present in
qcom,gpio-req-tbl-num property (in the same order)

14
Documentation/devicetree/bindings/msm_hdcp/msm_hdcp.txt Normal file
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@ -0,0 +1,14 @@
MSM HDCP driver
Standalone driver managing HDCP related communications
between TZ and HLOS for MSM chipset.
Required properties:
compatible = "qcom,msm-hdcp";
Example:
qcom_msmhdcp: qcom,msm_hdcp {
compatible = "qcom,msm-hdcp";
};

4
Documentation/devicetree/bindings/pci/msm_pcie.txt
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@ -97,6 +97,9 @@ Optional Properties:
and assign for each endpoint.
- qcom,ep-latency: The time (unit: ms) to wait for the PCIe endpoint to become
stable after power on, before de-assert the PERST to the endpoint.
- qcom,switch-latency: The time (unit: ms) to wait for the PCIe endpoint's link
training with switch downstream port after the link between switch upstream
port and RC is up.
- qcom,wr-halt-size: With base 2, this exponent determines the size of the
data that PCIe core will halt on for each write transaction.
- qcom,cpl-timeout: Completion timeout value. This value specifies the time range
@ -276,6 +279,7 @@ Example:
qcom,smmu-exist;
qcom,smmu-sid-base = <0x1480>;
qcom,ep-latency = <100>;
qcom,switch-latency = <100>;
qcom,wr-halt-size = <0xa>; /* 1KB */
qcom,cpl-timeout = <0x2>;

201
Documentation/devicetree/bindings/pinctrl/qcom,msm8998-pinctrl.txt Normal file
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@ -0,0 +1,201 @@
Qualcomm Technologies, Inc. MSM8998 TLMM block
This binding describes the Top Level Mode Multiplexer block found in the
MSM8998 platform. With new GPIOs tiling, GPIO pins are
grouped into various cores - NORTH, WEST, EAST. TLMM_GPIO_ID_STATUSn
register's value for a GPIO pin decides the core location for it.
- compatible:
Usage: required
Value type: <string>
Definition: must be "qcom,msm8998-pinctrl"
- reg:
Usage: required
Value type: <prop-encoded-array>
Definition: the base address and size of the TLMM register space.
- interrupts:
Usage: required
Value type: <prop-encoded-array>
Definition: should specify the TLMM summary IRQ.
- interrupt-controller:
Usage: required
Value type: <none>
Definition: identifies this node as an interrupt controller
- #interrupt-cells:
Usage: required
Value type: <u32>
Definition: must be 2. Specifying the pin number and flags, as defined
in <dt-bindings/interrupt-controller/irq.h>
- gpio-controller:
Usage: required
Value type: <none>
Definition: identifies this node as a gpio controller
- #gpio-cells:
Usage: required
Value type: <u32>
Definition: must be 2. Specifying the pin number and flags, as defined
in <dt-bindings/gpio/gpio.h>
Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
a general description of GPIO and interrupt bindings.
Please refer to pinctrl-bindings.txt in this directory for details of the
common pinctrl bindings used by client devices, including the meaning of the
phrase "pin configuration node".
The pin configuration nodes act as a container for an arbitrary number of
subnodes. Each of these subnodes represents some desired configuration for a
pin, a group, or a list of pins or groups. This configuration can include the
mux function to select on those pin(s)/group(s), and various pin configuration
parameters, such as pull-up, drive strength, etc.
PIN CONFIGURATION NODES:
The name of each subnode is not important; all subnodes should be enumerated
and processed purely based on their content.
Each subnode only affects those parameters that are explicitly listed. In
other words, a subnode that lists a mux function but no pin configuration
parameters implies no information about any pin configuration parameters.
Similarly, a pin subnode that describes a pullup parameter implies no
information about e.g. the mux function.
The following generic properties as defined in pinctrl-bindings.txt are valid
to specify in a pin configuration subnode:
- pins:
Usage: required
Value type: <string-array>
Definition: List of gpio pins affected by the properties specified in
this subnode. Valid pins are:
gpio0-gpio149,
sdc1_clk,
sdc1_cmd,
sdc1_data
sdc2_clk,
sdc2_cmd,
sdc2_data
sdc1_rclk,
- function:
Usage: required
Value type: <string>
Definition: Specify the alternative function to be configured for the
specified pins. Functions are only valid for gpio pins.
Valid values are:
blsp_uart1, blsp_spi1, blsp_i2c1, blsp_uim1, atest_tsens,
bimc_dte1, dac_calib0, blsp_spi8, blsp_uart8, blsp_uim8,
qdss_cti_trig_out_b, bimc_dte0, dac_calib1, qdss_cti_trig_in_b,
dac_calib2, atest_tsens2, atest_usb1, blsp_spi10, blsp_uart10,
blsp_uim10, atest_bbrx1, atest_usb13, atest_bbrx0, atest_usb12,
mdp_vsync, edp_lcd, blsp_i2c10, atest_gpsadc1, atest_usb11,
atest_gpsadc0, edp_hot, atest_usb10, m_voc, dac_gpio, atest_char,
cam_mclk, pll_bypassnl, qdss_stm7, blsp_i2c8, qdss_tracedata_b,
pll_reset, qdss_stm6, qdss_stm5, qdss_stm4, atest_usb2, cci_i2c,
qdss_stm3, dac_calib3, atest_usb23, atest_char3, dac_calib4,
qdss_stm2, atest_usb22, atest_char2, qdss_stm1, dac_calib5,
atest_usb21, atest_char1, dbg_out, qdss_stm0, dac_calib6,
atest_usb20, atest_char0, dac_calib10, qdss_stm10,
qdss_cti_trig_in_a, cci_timer4, blsp_spi6, blsp_uart6, blsp_uim6,
blsp2_spi, qdss_stm9, qdss_cti_trig_out_a, dac_calib11,
qdss_stm8, cci_timer0, qdss_stm13, dac_calib7, cci_timer1,
qdss_stm12, dac_calib8, cci_timer2, blsp1_spi, qdss_stm11,
dac_calib9, cci_timer3, cci_async, dac_calib12, blsp_i2c6,
qdss_tracectl_a, dac_calib13, qdss_traceclk_a, dac_calib14,
dac_calib15, hdmi_rcv, dac_calib16, hdmi_cec, pwr_modem,
dac_calib17, hdmi_ddc, pwr_nav, dac_calib18, pwr_crypto,
dac_calib19, hdmi_hot, dac_calib20, dac_calib21, pci_e0,
dac_calib22, dac_calib23, dac_calib24, tsif1_sync, dac_calib25,
sd_write, tsif1_error, blsp_spi2, blsp_uart2, blsp_uim2,
qdss_cti, blsp_i2c2, blsp_spi3, blsp_uart3, blsp_uim3, blsp_i2c3,
uim3, blsp_spi9, blsp_uart9, blsp_uim9, blsp10_spi, blsp_i2c9,
blsp_spi7, blsp_uart7, blsp_uim7, qdss_tracedata_a, blsp_i2c7,
qua_mi2s, gcc_gp1_clk_a, ssc_irq, uim4, blsp_spi11, blsp_uart11,
blsp_uim11, gcc_gp2_clk_a, gcc_gp3_clk_a, blsp_i2c11, cri_trng0,
cri_trng1, cri_trng, qdss_stm18, pri_mi2s, qdss_stm17, blsp_spi4,
blsp_uart4, blsp_uim4, qdss_stm16, qdss_stm15, blsp_i2c4,
qdss_stm14, dac_calib26, spkr_i2s, audio_ref, lpass_slimbus,
isense_dbg, tsense_pwm1, tsense_pwm2, btfm_slimbus, ter_mi2s,
qdss_stm22, qdss_stm21, qdss_stm20, qdss_stm19, gcc_gp1_clk_b,
sec_mi2s, blsp_spi5, blsp_uart5, blsp_uim5, gcc_gp2_clk_b,
gcc_gp3_clk_b, blsp_i2c5, blsp_spi12, blsp_uart12, blsp_uim12,
qdss_stm25, qdss_stm31, blsp_i2c12, qdss_stm30, qdss_stm29,
tsif1_clk, qdss_stm28, tsif1_en, tsif1_data, sdc4_cmd, qdss_stm27,
qdss_traceclk_b, tsif2_error, sdc43, vfr_1, qdss_stm26, tsif2_clk,
sdc4_clk, qdss_stm24, tsif2_en, sdc42, qdss_stm23, qdss_tracectl_b,
sd_card, tsif2_data, sdc41, tsif2_sync, sdc40, mdp_vsync_p_b,
ldo_en, mdp_vsync_s_b, ldo_update, blsp11_uart_tx_b, blsp11_uart_rx_b,
blsp11_i2c_sda_b, prng_rosc, blsp11_i2c_scl_b, uim2, uim1, uim_batt,
pci_e2, pa_indicator, adsp_ext, ddr_bist, qdss_tracedata_11,
qdss_tracedata_12, modem_tsync, nav_dr, nav_pps, pci_e1, gsm_tx,
qspi_cs, ssbi2, ssbi1, mss_lte, qspi_clk, qspi0, qspi1, qspi2, qspi3,
gpio
- bias-disable:
Usage: optional
Value type: <none>
Definition: The specified pins should be configued as no pull.
- bias-pull-down:
Usage: optional
Value type: <none>
Definition: The specified pins should be configued as pull down.
- bias-pull-up:
Usage: optional
Value type: <none>
Definition: The specified pins should be configued as pull up.
- output-high:
Usage: optional
Value type: <none>
Definition: The specified pins are configured in output mode, driven
high.
Not valid for sdc pins.
- output-low:
Usage: optional
Value type: <none>
Definition: The specified pins are configured in output mode, driven
low.
Not valid for sdc pins.
- drive-strength:
Usage: optional
Value type: <u32>
Definition: Selects the drive strength for the specified pins, in mA.
Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16
Example:
tlmm: pinctrl@01010000 {
compatible = "qcom,msm8998-pinctrl";
reg = <0x01010000 0x300000>;
interrupts = <0 208 0>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
uart_console_active: uart_console_active {
mux {
pins = "gpio4", "gpio5";
function = "blsp_uart8";
};
config {
pins = "gpio4", "gpio5";
drive-strength = <2>;
bias-disable;
};
};
};

2
Documentation/devicetree/bindings/platform/msm/qpnp-revid.txt
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@ -9,6 +9,8 @@ Required properties:
Optional property:
- qcom,fab-id-valid: Use this property when support to read Fab
identification from REV ID peripheral is available.
- qcom,tp-rev-valid: Use this property when support to read TP
revision identification from REV ID peripheral.
Example:
qcom,revid@100 {

34
Documentation/devicetree/bindings/power/supply/qcom/qpnp-smb2.txt
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@ -85,21 +85,6 @@ Charger specific properties:
maximum charge current in mA for each thermal
level.
- qcom,step-soc-thresholds
Usage: optional
Value type: Array of <u32>
Definition: Array of SOC threshold values, size of 4. This should be a
flat array that denotes the percentage ranging from 0 to 100.
If the array is not present, step charging is disabled.
- qcom,step-current-deltas
Usage: optional
Value type: Array of <s32>
Definition: Array of delta values for charging current, size of 5, with
FCC as base. This should be a flat array that denotes the
offset of charging current in uA, from -3100000 to 3200000.
If the array is not present, step charging is disabled.
- io-channels
Usage: optional
Value type: List of <phandle u32>
@ -182,6 +167,22 @@ Charger specific properties:
Definition: Specifies the deglitch interval for OTG detection.
If the value is not present, 50 msec is used as default.
- qcom,step-charging-enable
Usage: optional
Value type: bool
Definition: Boolean flag which when present enables step-charging.
- qcom,wd-bark-time-secs
Usage: optional
Value type: <u32>
Definition: WD bark-timeout in seconds. The possible values are
16, 32, 64, 128. If not defined it defaults to 64.
- qcom,sw-jeita-enable
Usage: optional
Value type: bool
Definition: Boolean flag which when present enables sw compensation for jeita
=============================================
Second Level Nodes - SMB2 Charger Peripherals
=============================================
@ -217,9 +218,6 @@ pmi8998_charger: qcom,qpnp-smb2 {
dpdm-supply = <&qusb_phy0>;
qcom,step-soc-thresholds = <60 70 80 90>;
qcom,step-current-deltas = <500000 250000 150000 0 (-150000)>;
qcom,chgr@1000 {
reg = <0x1000 0x100>;
interrupts = <0x2 0x10 0x0 IRQ_TYPE_NONE>,

3
Documentation/devicetree/bindings/qdsp/msm-fastrpc.txt
View file

@ -11,6 +11,8 @@ Required properties:
Optional properties:
- qcom,fastrpc-glink: Flag to use glink instead of smd for IPC
- qcom,fastrpc-vmid-heap-shared: Flag for Dynamic heap feature, to
share HLOS memory buffer to ADSP
Optional subnodes:
- qcom,msm_fastrpc_compute_cb : Child nodes representing the compute context
@ -25,6 +27,7 @@ Example:
qcom,msm_fastrpc {
compatible = "qcom,msm-fastrpc-adsp";
qcom,fastrpc-glink;
qcom,fastrpc-vmid-heap-shared;
qcom,msm_fastrpc_compute_cb_1 {
compatible = "qcom,msm-fastrpc-compute-cb";

77
Documentation/devicetree/bindings/regulator/max20010.txt Normal file
View file

@ -0,0 +1,77 @@
Binding for Maxim MAX20010 regulator
MAX20010 is a synchronous step-down converter. It is able to deliver upto 6A
with 2 different programmable output voltages from 0.5V to 1.27V in 10mV steps
and from 0.625V to 1.5875V in 12.5mV steps. It supports synchronous
rectification and automatic PWM/PFM transitions.
The MAX20010 interface is via I2C bus.
=======================
Supported Properties
=======================
- compatible
Usage: required
Value type: <string>
Definition: should be "maxim,max20010".
- reg
Usage: required
Value type: <u32>
Definition: The device 8-bit I2C address.
- vin-supply
Usage: optional
Value type: <phandle>
Definition: This is the phandle for the parent regulator. Typically used
for EN pin control of the buck.
- regulator-initial-mode
Usage: optional
Value type: <u32>
Definition: The regulator operating mode. Should be either
"MAX20010_OPMODE_SYNC" or "MAX20010_OPMODE_FPWM".
These constants are defined in file
include/dt-bindings/regulator/max20010.h
- maxim,vrange-sel
Usage: optional
Value type: <u32>
Definition: Integer value specifies the voltage range to be used.
Supported values are 0 or 1.
Value 0 supports voltage range from 0.5V to 1.27V in 10mV
steps. Value 1 supports voltage range from 0.625V to 1.5875V
in 12.5mV steps.
- maxim,soft-start-slew-rate
Usage: optional
Value type: <u32>
Definition: An integer value specifies the slew rate in uV/uS to be used
for soft-start operation of the buck. Supported values are
5500, 11000, 22000 and 44000.
- maxim,dvs-slew-rate
Usage: optional
Value type: <u32>
Definition: An integer value specifies the slew rate in uV/uS to be used
for buck dynamic voltage scaling operations. Supported
values are 5500, 11000, 22000 and 44000.
=======
Example
=======
i2c_0 {
max20010-regulator@74 {
compatible = "maxim,max20010";
reg = <0x74>;
vin-supply = <&parent_reg>;
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <1270000>;
regulator-initial-mode = <MAX20010_OPMODE_SYNC>;
maxim,vrange-sel = <0>;
maxim,soft-start-slew-rate = <5500>;
maxim,dvs-slew-rate = <5500>;
}
}

7
Documentation/devicetree/bindings/regulator/qpnp-lcdb-regulator.txt
View file

@ -209,6 +209,12 @@ Properties below are specific to BOOST subnode only.
Definition: Current limit (in mA) of the BOOST rail.
Possible values are 200 to 1600mA in 200mA steps.
- qcom,bst-headroom-mv
Usage: optional
Value type: <u16>
Definition: Headroom of the boost (in mV). The minimum headroom is
200mV and if not specified defaults to 200mV.
=======
Example
=======
@ -250,5 +256,6 @@ pm660l_lcdb: qpnp-lcdb@ec00 {
qcom,bst-pd-strength = <1>;
qcom,bst-ps = <1>;
qcom,bst-ps-threshold-ma = <50>;
qcom,bst-headroom-mv = <200>;
};
};

110
Documentation/devicetree/bindings/soc/qcom/msm-early-cam.txt Normal file
View file

@ -0,0 +1,110 @@
* Qualcomm Technologies Inc MSM BA
[Root level node]
==================
Required properties:
- compatible: Must be "qcom,early-cam".
[Subnode]
==========
- qcom,early-cam-input-profile-#: Defines child nodes for the profiles supported
by early camera driver. Each profile should have properties
"mmagic-supply", "gdscr-supply", "vfe0-vdd-supply",
"qcom,cam-vreg-name", "clocks", "clock-names",
"qcom,clock-rates".
Required properties:
- mmagic-supply : should contain mmagic regulator used for mmagic clocks.
- gdscr-supply : should contain gdsr regulator used for cci clocks.
- vfe0-vdd-supply: phandle to vfe0 regulator.
- qcom,cam-vreg-name : name of the voltage regulators required for the device.
- clocks: List of clock handles. The parent clocks of the input clocks to the
devices in this power domain are set to oscclk before power gating
and restored back after powering on a domain. This is required for
all domains which are powered on and off and not required for unused
domains.
- clock-names: name of the clock used by the driver.
- qcom,clock-rates: clock rate in Hz.
Example:
qcom,early-cam {
cell-index = <0>;
compatible = "qcom,early-cam";
status = "ok";
mmagic-supply = <&gdsc_mmagic_camss>;
gdscr-supply = <&gdsc_camss_top>;
vfe0-vdd-supply = <&gdsc_vfe0>;
qcom,cam-vreg-name = "mmagic", "gdscr", "vfe0-vdd";
clocks = <&clock_mmss clk_mmss_mmagic_ahb_clk>,
<&clock_mmss clk_camss_top_ahb_clk>,
<&clock_mmss clk_cci_clk_src>,
<&clock_mmss clk_camss_cci_ahb_clk>,
<&clock_mmss clk_camss_cci_clk>,
<&clock_mmss clk_camss_ahb_clk>,
<&clock_mmss clk_mmagic_camss_axi_clk>,
<&clock_mmss clk_camss_vfe_ahb_clk>,
<&clock_mmss clk_camss_vfe0_ahb_clk>,
<&clock_mmss clk_camss_vfe_axi_clk>,
<&clock_mmss clk_camss_vfe0_stream_clk>,
<&clock_mmss clk_smmu_vfe_axi_clk>,
<&clock_mmss clk_smmu_vfe_ahb_clk>,
<&clock_mmss clk_camss_csi_vfe0_clk>,
<&clock_mmss clk_vfe0_clk_src>,
<&clock_mmss clk_camss_csi_vfe0_clk>,
<&clock_mmss clk_camss_csi2_ahb_clk>,
<&clock_mmss clk_camss_csi2_clk>,
<&clock_mmss clk_camss_csi2phy_clk>,
<&clock_mmss clk_csi2phytimer_clk_src>,
<&clock_mmss clk_camss_csi2phytimer_clk>,
<&clock_mmss clk_camss_csi2rdi_clk>,
<&clock_mmss clk_camss_ispif_ahb_clk>,
<&clock_mmss clk_camss_vfe0_clk>;
clock-names =
"mmss_mmagic_ahb_clk",
"camss_top_ahb_clk",
"cci_clk_src",
"camss_cci_ahb_clk",
"camss_cci_clk",
"camss_ahb_clk",
"mmagic_camss_axi_clk",
"camss_vfe_ahb_clk",
"camss_vfe0_ahb_clk",
"camss_vfe_axi_clk",
"camss_vfe0_stream_clk",
"smmu_vfe_axi_clk",
"smmu_vfe_ahb_clk",
"camss_csi_vfe0_clk",
"vfe0_clk_src",
"camss_csi_vfe0_clk",
"camss_csi2_ahb_clk",
"camss_csi2_clk",
"camss_csi2phy_clk",
"csi2phytimer_clk_src",
"camss_csi2phytimer_clk",
"camss_csi2rdi_clk",
"camss_ispif_ahb_clk",
"clk_camss_vfe0_clk";
qcom,clock-rates = <19200000
19200000
19200000
19200000
19200000
19200000
0
0
0
320000000
0
0
0
0
19200000
0
0
200000000
200000000
200000000
200000000
200000000
0
};

7
Documentation/devicetree/bindings/sound/qcom-audio-dev.txt
View file

@ -1311,6 +1311,13 @@ Optional properties:
- pinctrl-x: Defines pinctrl state for each pin group.
- qcom,msm-cpudai-tdm-clk-attribute: Clock attribute for tdm.
0 - Clk invalid attribute
1 - Clk attribute couple no
2 - Clk attribute couple dividend
3 - Clk attribute couple divisor
4 - Clk attribute invert couple no
Example:
qcom,msm-dai-tdm-quat-rx {

1
Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
View file

@ -58,6 +58,7 @@ Optional properties:
- pinctrl-names, pinctrl-0, pinctrl-1,.. pinctrl-n: Refer to "Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt"
for these optional properties
- non-removable : defines if the connected ufs device is not removable
Note: If above properties are not defined it can be assumed that the supply

18
Documentation/devicetree/bindings/wcnss/wcnss-wlan.txt
View file

@ -12,7 +12,7 @@ Required properties:
"riva_ccu_base", "pronto_a2xb_base", "pronto_ccpu_base",
"pronto_saw2_base", "wlan_tx_phy_aborts","wlan_brdg_err_source",
"wlan_tx_status", "alarms_txctl", "alarms_tactl",
"pronto_mcu_base".
"pronto_mcu_base", "pronto_qfuse".
- interupts: Pronto to Apps interrupts for tx done and rx pending.
- qcom,pronto-vddmx-supply: regulator to supply pronto pll.
- qcom,pronto-vddcx-supply: voltage corner regulator to supply WLAN/BT/FM
@ -29,7 +29,7 @@ Required properties:
- qcom,wcnss-vadc: VADC handle for battery voltage notification APIs.
- pinctrl-<n> : Pinctrl states as described in bindings/pinctrl/pinctrl-bindings.txt
- pinctrl-names : Names corresponding to the numbered pinctrl states
- clocks: from common clock binding: handle to xo and rf_clk clocks.
- clocks: from common clock binding: handle to xo, rf_clk and wcnss snoc clocks.
- clock-names: Names of all the clocks that are accessed by the subsystem
- qcom,vdd-voltage-level: This property represents (nominal, min, max) voltage
for iris and pronto regulators in milli-volts.
@ -39,11 +39,16 @@ iris and pronto regulators in micro-amps.
Optional properties:
- qcom,has-autodetect-xo: boolean flag to determine whether Iris XO auto detect
should be performed during boot up.
- qcom,snoc-wcnss-clock-freq: indicates the wcnss snoc clock frequency in Hz.
If wcnss_snoc clock is specified in the list of clocks, this property needs
to be set to make it functional.
- qcom,wlan-rx-buff-count: WLAN RX buffer count is a configurable value,
using a smaller count for this buffer will reduce the memory usage.
- qcom,is-pronto-v3: boolean flag to determine the pronto hardware version
in use. subsequently correct workqueue will be used by DXE engine to push frames
in TX data path.
- qcom,is-dual-band-disable: boolean flag to determine the WLAN dual band
capability.
- qcom,is-pronto-vadc: boolean flag to determine Battery voltage feature
support for pronto hardware.
- qcom,wcnss-pm : <Core rail LDO#, PA rail LDO#, XO settling time,
@ -94,7 +99,12 @@ Example:
clocks = <&clock_rpm clk_xo_wlan_clk>,
<&clock_rpm clk_rf_clk2>,
<&clock_debug clk_gcc_debug_mux>,
<&clock_gcc clk_wcnss_m_clk>;
clock-names = "xo", "rf_clk", "measure", "wcnss_debug";
<&clock_gcc clk_wcnss_m_clk>,
<&clock_gcc clk_snoc_wcnss_a_clk>;
clock-names = "xo", "rf_clk", "measure", "wcnss_debug",
"snoc_wcnss";
qcom,snoc-wcnss-clock-freq = <200000000>;
qcom,wcnss-pm = <11 21 1200 1 1 6>;
};

7
Documentation/kernel-parameters.txt
View file

@ -3605,6 +3605,13 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
spia_pedr=
spia_peddr=
stack_guard_gap= [MM]
override the default stack gap protection. The value
is in page units and it defines how many pages prior
to (for stacks growing down) resp. after (for stacks
growing up) the main stack are reserved for no other
mapping. Default value is 256 pages.
stacktrace [FTRACE]
Enabled the stack tracer on boot up.

9
Documentation/vm/page_owner.txt
View file

@ -28,10 +28,11 @@ with page owner and page owner is disabled in runtime due to no enabling
boot option, runtime overhead is marginal. If disabled in runtime, it
doesn't require memory to store owner information, so there is no runtime
memory overhead. And, page owner inserts just two unlikely branches into
the page allocator hotpath and if it returns false then allocation is
done like as the kernel without page owner. These two unlikely branches
would not affect to allocation performance. Following is the kernel's
code size change due to this facility.
the page allocator hotpath and if not enabled, then allocation is done
like as the kernel without page owner. These two unlikely branches should
not affect to allocation performance, especially if the static keys jump
label patching functionality is available. Following is the kernel's code
size change due to this facility.
- Without page owner
text data bss dec hex filename

17
Makefile
View file

@ -1,6 +1,6 @@
VERSION = 4
PATCHLEVEL = 4
SUBLEVEL = 70
SUBLEVEL = 80
EXTRAVERSION =
NAME = Blurry Fish Butt
@ -623,6 +623,9 @@ include arch/$(SRCARCH)/Makefile
KBUILD_CFLAGS += $(call cc-option,-fno-delete-null-pointer-checks,)
KBUILD_CFLAGS += $(call cc-disable-warning,maybe-uninitialized,)
KBUILD_CFLAGS += $(call cc-disable-warning,frame-address,)
KBUILD_CFLAGS += $(call cc-disable-warning, format-truncation)
KBUILD_CFLAGS += $(call cc-disable-warning, format-overflow)
KBUILD_CFLAGS += $(call cc-disable-warning, int-in-bool-context)
ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE
KBUILD_CFLAGS += -Os
@ -637,6 +640,12 @@ endif
# Tell gcc to never replace conditional load with a non-conditional one
KBUILD_CFLAGS += $(call cc-option,--param=allow-store-data-races=0)
# check for 'asm goto'
ifeq ($(shell $(CONFIG_SHELL) $(srctree)/scripts/gcc-goto.sh $(CC) $(KBUILD_CFLAGS)), y)
KBUILD_CFLAGS += -DCC_HAVE_ASM_GOTO
KBUILD_AFLAGS += -DCC_HAVE_ASM_GOTO
endif
ifdef CONFIG_READABLE_ASM
# Disable optimizations that make assembler listings hard to read.
# reorder blocks reorders the control in the function
@ -792,12 +801,6 @@ KBUILD_CFLAGS += $(call cc-option,-Werror=date-time)
# use the deterministic mode of AR if available
KBUILD_ARFLAGS := $(call ar-option,D)
# check for 'asm goto'
ifeq ($(shell $(CONFIG_SHELL) $(srctree)/scripts/gcc-goto.sh $(CC)), y)
KBUILD_CFLAGS += -DCC_HAVE_ASM_GOTO
KBUILD_AFLAGS += -DCC_HAVE_ASM_GOTO
endif
include scripts/Makefile.kasan
include scripts/Makefile.extrawarn
include scripts/Makefile.ubsan

5
android/configs/android-base-arm64.cfg Normal file
View file

@ -0,0 +1,5 @@
# KEEP ALPHABETICALLY SORTED
CONFIG_ARMV8_DEPRECATED=y
CONFIG_CP15_BARRIER_EMULATION=y
CONFIG_SETEND_EMULATION=y
CONFIG_SWP_EMULATION=y

7
android/configs/android-base.cfg
View file

@ -3,6 +3,8 @@
# CONFIG_DEVMEM is not set
# CONFIG_FHANDLE is not set
# CONFIG_INET_LRO is not set
# CONFIG_NFSD is not set
# CONFIG_NFS_FS is not set
# CONFIG_OABI_COMPAT is not set
# CONFIG_SYSVIPC is not set
# CONFIG_USELIB is not set
@ -10,16 +12,13 @@ CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
CONFIG_ANDROID_BINDER_DEVICES=binder,hwbinder,vndbinder
CONFIG_ANDROID_LOW_MEMORY_KILLER=y
CONFIG_ARMV8_DEPRECATED=y
CONFIG_ASHMEM=y
CONFIG_AUDIT=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_CGROUPS=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_CGROUP_DEBUG=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CGROUP_SCHED=y
CONFIG_CP15_BARRIER_EMULATION=y
CONFIG_DEFAULT_SECURITY_SELINUX=y
CONFIG_EMBEDDED=y
CONFIG_FB=y
@ -153,9 +152,7 @@ CONFIG_SECURITY=y
CONFIG_SECURITY_NETWORK=y
CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y
CONFIG_SECURITY_SELINUX=y
CONFIG_SETEND_EMULATION=y
CONFIG_STAGING=y
CONFIG_SWP_EMULATION=y
CONFIG_SYNC=y
CONFIG_TUN=y
CONFIG_UID_SYS_STATS=y

2
arch/arc/mm/mmap.c
View file

@ -64,7 +64,7 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,
vma = find_vma(mm, addr);
if (TASK_SIZE - len >= addr &&
(!vma || addr + len <= vma->vm_start))
(!vma || addr + len <= vm_start_gap(vma)))
return addr;
}

4
arch/arm/boot/dts/bcm5301x.dtsi
View file

@ -54,14 +54,14 @@
timer@0200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x0200 0x100>;
interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
clocks = <&clk_periph>;
};
local-timer@0600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x0600 0x100>;
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>;
clocks = <&clk_periph>;
};

2
arch/arm/boot/dts/imx6dl.dtsi
View file

@ -30,7 +30,7 @@
/* kHz uV */
996000 1250000
792000 1175000
396000 1075000
396000 1150000
>;
fsl,soc-operating-points = <
/* ARM kHz SOC-PU uV */

2
arch/arm/boot/dts/omap3-n900.dts
View file

@ -697,6 +697,8 @@
vmmc_aux-supply = <&vsim>;
bus-width = <8>;
non-removable;
no-sdio;
no-sd;
};
&mmc3 {

6
arch/arm/boot/dts/qcom/Makefile
View file

@ -168,9 +168,13 @@ dtb-$(CONFIG_ARCH_MSM8998) += msm8998-sim.dtb \
apq8098-v2.1-cdp.dtb \
apq8098-v2.1-qrd.dtb \
apq8098-v2.1-mediabox.dtb \
apq8098-v2.1-svr20.dtb \
msm8998-v2.1-interposer-sdm660-cdp.dtb \
msm8998-v2.1-interposer-sdm660-mtp.dtb \
msm8998-v2.1-interposer-sdm660-qrd.dtb
msm8998-v2.1-interposer-sdm660-qrd.dtb \
msm8998-9x55-rcm.dtb \
msm8998-9x55-cdp.dtb \
msm8998-9x55-mtp.dtb
endif
dtb-$(CONFIG_ARCH_MSMHAMSTER) += msmhamster-rumi.dtb

8
arch/arm/boot/dts/qcom/apq8096-auto-dragonboard.dtsi
View file

@ -713,6 +713,10 @@
<&afe_proxy_rx>, <&afe_proxy_tx>,
<&incall_record_rx>, <&incall_record_tx>,
<&incall_music_rx>, <&incall_music2_rx>,
<&dai_pri_tdm_tx_0>, <&dai_pri_tdm_tx_1>,
<&dai_pri_tdm_tx_2>, <&dai_pri_tdm_tx_3>,
<&dai_pri_tdm_rx_0>, <&dai_pri_tdm_rx_1>,
<&dai_pri_tdm_rx_2>, <&dai_pri_tdm_rx_3>,
<&dai_sec_tdm_tx_0>, <&dai_sec_tdm_tx_1>,
<&dai_sec_tdm_tx_2>, <&dai_sec_tdm_tx_3>,
<&dai_tert_tdm_rx_0>, <&dai_tert_tdm_rx_1>,
@ -731,6 +735,10 @@
"msm-dai-q6-dev.241", "msm-dai-q6-dev.240",
"msm-dai-q6-dev.32771", "msm-dai-q6-dev.32772",
"msm-dai-q6-dev.32773", "msm-dai-q6-dev.32770",
"msm-dai-q6-tdm.36865", "msm-dai-q6-tdm.36867",
"msm-dai-q6-tdm.36869", "msm-dai-q6-tdm.36871",
"msm-dai-q6-tdm.36864", "msm-dai-q6-tdm.36866",
"msm-dai-q6-tdm.36868", "msm-dai-q6-tdm.36870",
"msm-dai-q6-tdm.36881", "msm-dai-q6-tdm.36883",
"msm-dai-q6-tdm.36885", "msm-dai-q6-tdm.36887",
"msm-dai-q6-tdm.36896", "msm-dai-q6-tdm.36898",

18
arch/arm/boot/dts/qcom/apq8096-ba.dtsi Normal file
View file

@ -0,0 +1,18 @@
/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
msm_ba: qcom,ba {
compatible = "qcom,msm-ba";
status = "ok";
};
};

1
arch/arm/boot/dts/qcom/apq8096-dragonboard.dtsi
View file

@ -12,6 +12,7 @@
#include "msm8996-pinctrl.dtsi"
#include "apq8096-camera-sensor-dragonboard.dtsi"
#include "apq8096-ba.dtsi"
/ {
bluetooth: bt_qca6174 {

19
arch/arm/boot/dts/qcom/apq8096pro-v1.1-auto-adp-lite.dts
View file

@ -1,4 +1,4 @@
/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -45,10 +45,27 @@
adv7533@3d {
status = "disabled";
};
adv7533@39 {
status = "disabled";
};
};
qcom,adv7481@70 {
status = "disabled";
};
qcom,msm-ba {
status = "disabled";
};
};
&dsi_adv_7533_2 {
/delete-property/ qcom,dsi-display-active;
};
&sde_kms {
connectors = <&sde_hdmi_tx &sde_hdmi &dsi_adv_7533_1>;
};
&pil_modem {

5
arch/arm/boot/dts/qcom/apq8098-v2.1-mediabox.dts
View file

@ -90,6 +90,7 @@
&snd_9335 {
qcom,msm-mi2s-master = <1>, <1>, <1>, <0>;
qcom,msm-mbhc-hphl-swh = <1>;
};
&wcd_usbc_analog_en1_gpio {
@ -100,6 +101,10 @@
status = "disabled";
};
&pcie0 {
qcom,boot-option = <0x0>;
};
&soc {
qcom,msm-dai-mi2s {
dai_mi2s3: qcom,msm-dai-q6-mi2s-quat {

22
arch/arm/boot/dts/qcom/apq8098-v2.1-svr20.dts Normal file
View file

@ -0,0 +1,22 @@
/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "apq8098-v2.1.dtsi"
#include "msm8998-svr20.dtsi"
/ {
model = "Qualcomm Technologies, Inc. APQ 8098 V2.1 SVR V2.0 Board";
compatible = "qcom,apq8098-svr", "qcom,apq8098", "qcom,svr";
qcom,board-id = <0x03020008 3>;
};

10
arch/arm/boot/dts/qcom/apq8098-v2.1.dtsi
View file

@ -16,3 +16,13 @@
model = "Qualcomm Technologies, Inc. APQ 8098 V2.1";
qcom,msm-id = <319 0x20001>;
};
&soc {
qcom,rmnet-ipa {
status = "disabled";
};
};
&ipa_hw {
status = "disabled";
};

10
arch/arm/boot/dts/qcom/apq8098-v2.dtsi
View file

@ -16,3 +16,13 @@
model = "Qualcomm Technologies, Inc. APQ 8098 V2";
qcom,msm-id = <319 0x20000>;
};
&soc {
qcom,rmnet-ipa {
status = "disabled";
};
};
&ipa_hw {
status = "disabled";
};

75
arch/arm/boot/dts/qcom/dsi-adv7533-1024-600p.dtsi Normal file
View file

@ -0,0 +1,75 @@
/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&mdss_mdp {
dsi_adv7533_1024_600p: qcom,mdss_dsi_adv7533_1024_600p {
label = "adv7533 1024x600p video mode dsi panel";
qcom,mdss-dsi-panel-name = "dsi_adv7533_1024_600p";
qcom,mdss-dsi-panel-controller = <&mdss_dsi0>;
qcom,mdss-dsi-panel-type = "dsi_video_mode";
qcom,mdss-dsi-panel-destination = "display_1";
qcom,mdss-dsi-panel-framerate = <60>;
qcom,mdss-dsi-virtual-channel-id = <0>;
qcom,mdss-dsi-stream = <0>;
qcom,mdss-dsi-panel-width = <1024>;
qcom,mdss-dsi-panel-height = <600>;
qcom,mdss-dsi-h-front-porch = <110>;
qcom,mdss-dsi-h-back-porch = <220>;
qcom,mdss-dsi-h-pulse-width = <40>;
qcom,mdss-dsi-h-sync-skew = <0>;
qcom,mdss-dsi-v-back-porch = <20>;
qcom,mdss-dsi-v-front-porch = <5>;
qcom,mdss-dsi-v-pulse-width = <5>;
qcom,mdss-dsi-h-left-border = <0>;
qcom,mdss-dsi-h-right-border = <0>;
qcom,mdss-dsi-v-top-border = <0>;
qcom,mdss-dsi-v-bottom-border = <0>;
qcom,mdss-dsi-bpp = <24>;
qcom,mdss-dsi-underflow-color = <0xff>;
qcom,mdss-dsi-border-color = <0>;
qcom,mdss-dsi-on-command = [
05 01 00 00 c8 00 02 11 00
05 01 00 00 0a 00 02 29 00];
qcom,mdss-dsi-off-command = [05 01 00 00 00 00 02 28 00
05 01 00 00 00 00 02 10 00];
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
qcom,mdss-dsi-h-sync-pulse = <1>;
qcom,mdss-dsi-traffic-mode = "non_burst_sync_pulse";
qcom,mdss-dsi-bllp-eof-power-mode;
qcom,mdss-dsi-bllp-power-mode;
qcom,mdss-dsi-lane-0-state;
qcom,mdss-dsi-lane-1-state;
qcom,mdss-dsi-lane-2-state;
qcom,mdss-dsi-panel-timings = [
AB 1A 10 00 3E 43 16 1E 15 03 04 00];
qcom,mdss-dsi-t-clk-post = <0x03>;
qcom,mdss-dsi-t-clk-pre = <0x20>;
qcom,mdss-dsi-bl-min-level = <1>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-dsi-dma-trigger = "trigger_sw";
qcom,mdss-dsi-mdp-trigger = "none";
qcom,mdss-dsi-reset-sequence = <1 20>, <0 1>, <1 20>;
qcom,mdss-pan-physical-width-dimension = <160>;
qcom,mdss-pan-physical-height-dimension = <90>;
qcom,mdss-dsi-force-clock-lane-hs;
qcom,mdss-dsi-always-on;
qcom,mdss-dsi-panel-timings-phy-v2 = [1c 19 02 03 01 03 04 a0
1c 19 02 03 01 03 04 a0
1c 19 02 03 01 03 04 a0
1c 19 02 03 01 03 04 a0
1c 08 02 03 01 03 04 a0];
qcom,dba-panel;
qcom,bridge-name = "adv7533";
};
};

1
arch/arm/boot/dts/qcom/dsi-panel-nt35597-dualmipi-wqxga-video.dtsi
View file

@ -68,7 +68,6 @@
qcom,mdss-dsi-lane-1-state;
qcom,mdss-dsi-lane-2-state;
qcom,mdss-dsi-lane-3-state;
qcom,cmd-sync-wait-broadcast;
qcom,mdss-dsi-panel-timings = [e2 36 24 00 66 6a 28 38 2a 03 04 00];
qcom,mdss-dsi-t-clk-post = <0x0d>;
qcom,mdss-dsi-t-clk-pre = <0x2d>;

1
arch/arm/boot/dts/qcom/dsi-panel-nt35597-truly-dualmipi-wqxga-video.dtsi
View file

@ -193,7 +193,6 @@
qcom,mdss-dsi-lane-1-state;
qcom,mdss-dsi-lane-2-state;
qcom,mdss-dsi-lane-3-state;
qcom,cmd-sync-wait-broadcast;
qcom,mdss-dsi-panel-timings = [e2 36 24 00 66 6a 28 38 2a 03
04 00];
qcom,mdss-dsi-t-clk-post = <0x0d>;

2
arch/arm/boot/dts/qcom/dsi-panel-s6e3ha3-amoled-dualmipi-wqhd-cmd.dtsi
View file

@ -51,7 +51,6 @@
39 01 00 00 78 00 03 f0 a5 a5
39 01 00 00 00 00 02 35 00
39 01 00 00 00 00 02 53 20
39 01 00 00 00 00 02 51 60
05 01 00 00 05 00 02 29 00];
qcom,mdss-dsi-off-command = [05 01 00 00 3c 00 02 28 00
05 01 00 00 b4 00 02 10 00];
@ -136,6 +135,7 @@
qcom,mdss-dsi-mdp-trigger = "none";
qcom,mdss-dsi-lp11-init;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-dcs-command-state = "dsi_hs_mode";
qcom,mdss-dsi-bl-min-level = <1>;
qcom,mdss-dsi-bl-max-level = <255>;
qcom,mdss-pan-physical-width-dimension = <68>;

4
arch/arm/boot/dts/qcom/dsi-panel-sharp-dsc-4k-cmd.dtsi
View file

@ -1,4 +1,4 @@
/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -54,6 +54,8 @@
qcom,ulps-enabled;
qcom,dcs-cmd-by-left;
qcom,mdss-dsi-tx-eot-append;
qcom,mdss-pan-physical-width-dimension = <68>;
qcom,mdss-pan-physical-height-dimension = <121>;
qcom,adjust-timer-wakeup-ms = <1>;
qcom,mdss-dsi-on-command = [

4
arch/arm/boot/dts/qcom/dsi-panel-sharp-dsc-4k-video.dtsi
View file

@ -1,4 +1,4 @@
/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -46,6 +46,8 @@
qcom,mdss-dsi-mdp-trigger = "none";
qcom,mdss-dsi-reset-sequence = <1 20>, <0 20>, <1 20>;
qcom,mdss-dsi-tx-eot-append;
qcom,mdss-pan-physical-width-dimension = <68>;
qcom,mdss-pan-physical-height-dimension = <121>;
qcom,adjust-timer-wakeup-ms = <1>;
qcom,mdss-dsi-on-command = [

84
arch/arm/boot/dts/qcom/fg-gen3-batterydata-svr-v2-3200mah.dtsi Normal file
View file

@ -0,0 +1,84 @@
/*
* Copyright (c) 2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
qcom,svr835v2_3200mah {
/*3003021_TC_MLP603170_3200mAh_averaged_MasterSlave_Jun292017*/
qcom, = <24>;
qcom,max-voltage-uv = <4200000>;
qcom,fg-cc-cv-threshold-mv = <4190>;
qcom,fastchg-current-ma = <3200>;
qcom,nom-batt-capacity-mah = <3200>;
qcom,batt-id-kohm = <0>;
qcom,battery-beta = <3435>;
qcom,battery-type = "svr835v2_3200mah";
qcom,checksum = <0xB7B0>;
qcom,gui-version = "PMI8998GUI - 2.0.0.58";
qcom,fg-profile-data = [
87 16 AB 0B
BE 15 3A 0A
8B 1C 6D 02
76 0D 1F 0A
50 18 ED 22
98 45 CA 52
83 00 00 00
0D 00 00 00
00 00 37 B4
78 C5 9D BA
29 00 08 00
3E CA 11 E5
D4 06 B7 EA
51 07 0F 02
82 DD 22 3B
1C 06 09 20
27 00 14 00
1C 19 82 0A
E9 0C 49 03
84 1C 5C 03
D0 15 0D 12
91 19 0C 22
F0 3C 35 4B
7D 00 00 00
12 00 00 00
00 00 F3 D4
9F B4 AF D3
22 00 00 00
CC EA 11 E5
2D F4 35 E3
A5 F3 49 0B
8F EA 5A 1A
9B 33 CC FF
07 10 00 00
21 0D 33 43
22 00 40 00
07 01 0A FA
FF 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
];
};

1
arch/arm/boot/dts/qcom/msm-arm-smmu-8998.dtsi
View file

@ -155,6 +155,7 @@
interrupts = <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 331 IRQ_TYPE_EDGE_RISING>;
qcom,deferred-regulator-disable-delay = <80>;
vdd-supply = <&gdsc_gpu_cx>;
clocks = <&clock_gcc clk_gcc_gpu_cfg_ahb_clk>,
<&clock_gcc clk_gcc_bimc_gfx_clk>,

1
arch/arm/boot/dts/qcom/msm-pm660.dtsi
View file

@ -24,6 +24,7 @@
compatible = "qcom,qpnp-revid";
reg = <0x100 0x100>;
qcom,fab-id-valid;
qcom,tp-rev-valid;
};
pm660_misc: qcom,misc@900 {

7
arch/arm/boot/dts/qcom/msm-pm660l.dtsi
View file

@ -250,9 +250,8 @@
<0xd900 0x100>;
reg-names = "qpnp-wled-ctrl-base",
"qpnp-wled-sink-base";
interrupts = <0x3 0xd8 0x1 IRQ_TYPE_EDGE_RISING>,
<0x3 0xd8 0x2 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "ovp-irq", "sc-irq";
interrupts = <0x3 0xd8 0x1 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "ovp-irq";
linux,name = "wled";
linux,default-trigger = "bkl-trigger";
qcom,fdbk-output = "auto";
@ -268,9 +267,9 @@
qcom,fs-curr-ua = <25000>;
qcom,cons-sync-write-delay-us = <1000>;
qcom,led-strings-list = [00 01 02];
qcom,en-ext-pfet-sc-pro;
qcom,loop-auto-gm-en;
qcom,pmic-revid = <&pm660l_revid>;
qcom,auto-calibration-enable;
status = "ok";
};

1
arch/arm/boot/dts/qcom/msm-pmi8998.dtsi
View file

@ -634,6 +634,7 @@
qcom,en-ext-pfet-sc-pro;
qcom,pmic-revid = <&pmi8998_revid>;
qcom,loop-auto-gm-en;
qcom,auto-calibration-enable;
status = "okay";
};

33
arch/arm/boot/dts/qcom/msm-rdbg.dtsi
View file

@ -1,4 +1,4 @@
/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
/* Copyright (c) 2015, 2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -72,4 +72,35 @@
compatible = "qcom,smp2pgpio_client_rdbg_1_out";
gpios = <&smp2pgpio_rdbg_1_out 0 0>;
};
smp2pgpio_rdbg_5_in: qcom,smp2pgpio-rdbg-5-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "rdbg";
qcom,remote-pid = <5>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
qcom,smp2pgpio_client_rdbg_5_in {
compatible = "qcom,smp2pgpio_client_rdbg_5_in";
gpios = <&smp2pgpio_rdbg_5_in 0 0>;
};
smp2pgpio_rdbg_5_out: qcom,smp2pgpio-rdbg-5-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "rdbg";
qcom,remote-pid = <5>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
qcom,smp2pgpio_client_rdbg_5_out {
compatible = "qcom,smp2pgpio_client_rdbg_5_out";
gpios = <&smp2pgpio_rdbg_5_out 0 0>;
};
};

186
arch/arm/boot/dts/qcom/msm8996-agave-adp.dtsi
View file

@ -542,11 +542,12 @@
&mdss_hdmi_cec_active>;
pinctrl-4 = <&mdss_hdmi_hpd_suspend &mdss_hdmi_ddc_suspend
&mdss_hdmi_cec_suspend>;
/delete-property/ qcom,pluggable;
};
#include "msm8996-sde-display.dtsi"
&mdss_mdp {
&sde_kms {
qcom,mdss-pref-prim-intf = "dsi";
qcom,sde-plane-id-map {
qcom,sde-plane-id@0 {
@ -857,6 +858,90 @@
};
&soc {
qcom,early-cam {
cell-index = <0>;
compatible = "qcom,early-cam";
status = "ok";
mmagic-supply = <&gdsc_mmagic_camss>;
gdscr-supply = <&gdsc_camss_top>;
vfe0-vdd-supply = <&gdsc_vfe0>;
qcom,cam-vreg-name = "mmagic", "gdscr", "vfe0-vdd";
clocks = <&clock_mmss clk_mmss_mmagic_ahb_clk>,
<&clock_mmss clk_camss_top_ahb_clk>,
<&clock_mmss clk_cci_clk_src>,
<&clock_mmss clk_camss_cci_ahb_clk>,
<&clock_mmss clk_camss_cci_clk>,
<&clock_mmss clk_camss_ahb_clk>,
<&clock_mmss clk_mmagic_camss_axi_clk>,
<&clock_mmss clk_camss_vfe_ahb_clk>,
<&clock_mmss clk_camss_vfe0_ahb_clk>,
<&clock_mmss clk_camss_vfe_axi_clk>,
<&clock_mmss clk_camss_vfe0_stream_clk>,
<&clock_mmss clk_smmu_vfe_axi_clk>,
<&clock_mmss clk_smmu_vfe_ahb_clk>,
<&clock_mmss clk_camss_csi_vfe0_clk>,
<&clock_mmss clk_vfe0_clk_src>,
<&clock_mmss clk_camss_csi_vfe0_clk>,
<&clock_mmss clk_camss_csi2_ahb_clk>,
<&clock_mmss clk_camss_csi2_clk>,
<&clock_mmss clk_camss_csi2phy_clk>,
<&clock_mmss clk_csi2phytimer_clk_src>,
<&clock_mmss clk_camss_csi2phytimer_clk>,
<&clock_mmss clk_camss_csi2rdi_clk>,
<&clock_mmss clk_camss_ispif_ahb_clk>,
<&clock_mmss clk_camss_vfe0_clk>;
clock-names =
"mmss_mmagic_ahb_clk",
"camss_top_ahb_clk",
"cci_clk_src",
"camss_cci_ahb_clk",
"camss_cci_clk",
"camss_ahb_clk",
"mmagic_camss_axi_clk",
"camss_vfe_ahb_clk",
"camss_vfe0_ahb_clk",
"camss_vfe_axi_clk",
"camss_vfe0_stream_clk",
"smmu_vfe_axi_clk",
"smmu_vfe_ahb_clk",
"camss_csi_vfe0_clk",
"vfe0_clk_src",
"camss_csi_vfe0_clk",
"camss_csi2_ahb_clk",
"camss_csi2_clk",
"camss_csi2phy_clk",
"csi2phytimer_clk_src",
"camss_csi2phytimer_clk",
"camss_csi2rdi_clk",
"camss_ispif_ahb_clk",
"clk_camss_vfe0_clk";
qcom,clock-rates = <19200000
19200000
19200000
19200000
19200000
19200000
0
0
0
320000000
0
0
0
0
19200000
0
0
200000000
200000000
200000000
200000000
200000000
0
100000000>;
};
qcom,ntn_avb {
compatible = "qcom,ntn_avb";
@ -868,6 +953,9 @@
qcom,ntn-rst-delay-msec = <100>;
qcom,ntn-rc-num = <1>;
qcom,ntn-bus-num = <1>;
qcom,ntn-mdio-bus-id = <1>;
qcom,ntn-phy-addr = <7>;
qcom,msm-bus,name = "ntn";
qcom,msm-bus,num-cases = <2>;
@ -1012,6 +1100,10 @@
<&afe_proxy_rx>, <&afe_proxy_tx>,
<&incall_record_rx>, <&incall_record_tx>,
<&incall_music_rx>, <&incall_music2_rx>,
<&dai_pri_tdm_tx_0>, <&dai_pri_tdm_tx_1>,
<&dai_pri_tdm_tx_2>, <&dai_pri_tdm_tx_3>,
<&dai_pri_tdm_rx_0>, <&dai_pri_tdm_rx_1>,
<&dai_pri_tdm_rx_2>, <&dai_pri_tdm_rx_3>,
<&dai_sec_tdm_tx_0>, <&dai_sec_tdm_tx_1>,
<&dai_sec_tdm_tx_2>, <&dai_sec_tdm_tx_3>,
<&dai_tert_tdm_rx_0>, <&dai_tert_tdm_rx_1>,
@ -1030,6 +1122,10 @@
"msm-dai-q6-dev.241", "msm-dai-q6-dev.240",
"msm-dai-q6-dev.32771", "msm-dai-q6-dev.32772",
"msm-dai-q6-dev.32773", "msm-dai-q6-dev.32770",
"msm-dai-q6-tdm.36865", "msm-dai-q6-tdm.36867",
"msm-dai-q6-tdm.36869", "msm-dai-q6-tdm.36871",
"msm-dai-q6-tdm.36864", "msm-dai-q6-tdm.36866",
"msm-dai-q6-tdm.36868", "msm-dai-q6-tdm.36870",
"msm-dai-q6-tdm.36881", "msm-dai-q6-tdm.36883",
"msm-dai-q6-tdm.36885", "msm-dai-q6-tdm.36887",
"msm-dai-q6-tdm.36896", "msm-dai-q6-tdm.36898",
@ -1098,17 +1194,58 @@
pinctrl-0 = <&quat_tdm_dout_active>;
pinctrl-1 = <&quat_tdm_dout_sleep>;
};
qcom,adv7481@70 {
compatible = "qcom,adv7481";
reg = <0x70 0xff>;
cam_vdig-supply = <&pm8994_s3>;
/* Cameras powered by PMIC: */
cam_vio-supply = <&pm8994_lvs1>;
cam_vana-supply = <&pm8994_l17>;
/* Self-powered cameras: */
qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana";
qcom,cam-vreg-min-voltage = <1300000 0 2500000>;
qcom,cam-vreg-max-voltage = <1300000 0 2500000>;
qcom,cam-vreg-op-mode = <105000 0 80000>;
qcom,cci-master = <0>;
gpios = <&tlmm 17 0>, /* I2C SDA */
<&tlmm 18 0>, /* I2C SCL */
<&pm8994_gpios 4 0>, /* RST */
<&pm8994_gpios 5 0>, /* INT1 */
<&pm8994_gpios 6 0>, /* INT2 */
<&pm8994_gpios 7 0>; /* INT3 */
};
qcom,msm-ba {
compatible = "qcom,msm-ba";
qcom,ba-input-profile-0 {
qcom,type = <4>; /* input type */
qcom,name = "HDMI-1"; /* input name */
qcom,ba-input = <13>; /* ba input id */
qcom,ba-output = <0>; /* ba output id */
qcom,sd-name = "adv7481"; /* sd name */
qcom,ba-node = <0>; /* ba node */
qcom,user-type = <1>; /* user type */
};
qcom,ba-input-profile-1 {
qcom,type = <0>; /* input type */
qcom,name = "CVBS-0"; /* input name */
qcom,ba-input = <0>; /* ba input id */
qcom,ba-output = <0>; /* ba output id */
qcom,sd-name = "adv7481"; /* sd name */
qcom,ba-node = <1>; /* ba node */
qcom,user-type = <1>; /* user type */
};
};
};
&pm8994_gpios {
gpio@c600 { /* GPIO 7 - NFC DWL REQ */
qcom,mode = <1>;
qcom,output-type = <0>;
qcom,pull = <5>;
gpio@c600 { /* GPIO 7 - adv7481 INT3 */
qcom,mode = <0>;
qcom,vin-sel = <2>;
qcom,out-strength = <3>;
qcom,src-sel = <0>;
qcom,master-en = <1>;
status = "okay";
};
@ -1159,17 +1296,23 @@
status = "okay";
};
gpio@c300 { /* GPIO 4 */
qcom,mode = <0>;
gpio@c300 { /* GPIO 4 - adv7481 RST */
qcom,mode = <1>;
qcom,pull = <0>;
qcom,vin-sel = <2>;
qcom,src-sel = <0>;
status = "okay";
};
gpio@c400 { /* GPIO 5 */
gpio@c400 { /* GPIO 5 - adv7481 INT1 */
qcom,mode = <0>;
qcom,vin-sel = <2>;
qcom,src-sel = <0>;
status = "okay";
};
gpio@c500 { /* GPIO 6 - adv7481 INT2*/
qcom,mode = <0>;
qcom,pull = <0>;
qcom,vin-sel = <2>;
qcom,src-sel = <0>;
status = "okay";
@ -1190,7 +1333,7 @@
qcom,vin-sel = <2>; /* 1.8 */
qcom,out-strength = <1>;
qcom,src-sel = <0>; /* GPIO */
qcom,master-en = <0>; /* Disable GPIO */
qcom,master-en = <1>; /* Enable GPIO */
status = "okay";
};
@ -1397,3 +1540,22 @@
spi-cpha;
};
};
&vfe_smmu {
qcom,no-smr-check;
};
/ {
reserved-memory {
lk_mem: lk_pool@0x91600000 {
no-map;
reg = <0 0x91600000 0 0x00600000>;
label = "lk_pool";
};
early_camera_mem: early_camera_mem@b3fff000 {
reg = <0 0xb3fff000 0 0x800000>;
label = "early_camera_mem";
};
};
};

136
arch/arm/boot/dts/qcom/msm8996-auto-cdp.dtsi
View file

@ -333,7 +333,7 @@
};
};
&mdss_mdp {
&sde_kms {
qcom,mdss-pref-prim-intf = "dsi";
qcom,sde-plane-id-map {
qcom,sde-plane-id@0 {
@ -623,6 +623,90 @@
};
&soc {
qcom,early-cam {
cell-index = <0>;
compatible = "qcom,early-cam";
status = "ok";
mmagic-supply = <&gdsc_mmagic_camss>;
gdscr-supply = <&gdsc_camss_top>;
vfe0-vdd-supply = <&gdsc_vfe0>;
qcom,cam-vreg-name = "mmagic", "gdscr", "vfe0-vdd";
clocks = <&clock_mmss clk_mmss_mmagic_ahb_clk>,
<&clock_mmss clk_camss_top_ahb_clk>,
<&clock_mmss clk_cci_clk_src>,
<&clock_mmss clk_camss_cci_ahb_clk>,
<&clock_mmss clk_camss_cci_clk>,
<&clock_mmss clk_camss_ahb_clk>,
<&clock_mmss clk_mmagic_camss_axi_clk>,
<&clock_mmss clk_camss_vfe_ahb_clk>,
<&clock_mmss clk_camss_vfe0_ahb_clk>,
<&clock_mmss clk_camss_vfe_axi_clk>,
<&clock_mmss clk_camss_vfe0_stream_clk>,
<&clock_mmss clk_smmu_vfe_axi_clk>,
<&clock_mmss clk_smmu_vfe_ahb_clk>,
<&clock_mmss clk_camss_csi_vfe0_clk>,
<&clock_mmss clk_vfe0_clk_src>,
<&clock_mmss clk_camss_csi_vfe0_clk>,
<&clock_mmss clk_camss_csi2_ahb_clk>,
<&clock_mmss clk_camss_csi2_clk>,
<&clock_mmss clk_camss_csi2phy_clk>,
<&clock_mmss clk_csi2phytimer_clk_src>,
<&clock_mmss clk_camss_csi2phytimer_clk>,
<&clock_mmss clk_camss_csi2rdi_clk>,
<&clock_mmss clk_camss_ispif_ahb_clk>,
<&clock_mmss clk_camss_vfe0_clk>;
clock-names =
"mmss_mmagic_ahb_clk",
"camss_top_ahb_clk",
"cci_clk_src",
"camss_cci_ahb_clk",
"camss_cci_clk",
"camss_ahb_clk",
"mmagic_camss_axi_clk",
"camss_vfe_ahb_clk",
"camss_vfe0_ahb_clk",
"camss_vfe_axi_clk",
"camss_vfe0_stream_clk",
"smmu_vfe_axi_clk",
"smmu_vfe_ahb_clk",
"camss_csi_vfe0_clk",
"vfe0_clk_src",
"camss_csi_vfe0_clk",
"camss_csi2_ahb_clk",
"camss_csi2_clk",
"camss_csi2phy_clk",
"csi2phytimer_clk_src",
"camss_csi2phytimer_clk",
"camss_csi2rdi_clk",
"camss_ispif_ahb_clk",
"clk_camss_vfe0_clk";
qcom,clock-rates = <19200000
19200000
19200000
19200000
19200000
19200000
0
0
0
320000000
0
0
0
0
19200000
0
0
200000000
200000000
200000000
200000000
200000000
0
100000000>;
};
ntn1: ntn_avb@1 { /* Neutrno device on RC1*/
compatible = "qcom,ntn_avb";
@ -635,6 +719,8 @@
qcom,ntn-rst-delay-msec = <100>;
qcom,ntn-rc-num = <1>;
qcom,ntn-bus-num = <1>;
qcom,ntn-mdio-bus-id = <1>;
qcom,ntn-phy-addr = <7>;
qcom,msm-bus,name = "ntn";
qcom,msm-bus,num-cases = <2>;
@ -649,6 +735,7 @@
qcom,ntn-rst-delay-msec = <100>;
qcom,ntn-rc-num = <2>;
qcom,ntn-bus-num = <1>;
qcom,ntn-mdio-bus-id = <2>;
qcom,msm-bus,name = "ntn";
qcom,msm-bus,num-cases = <2>;
@ -835,6 +922,10 @@
<&afe_proxy_rx>, <&afe_proxy_tx>,
<&incall_record_rx>, <&incall_record_tx>,
<&incall_music_rx>, <&incall_music2_rx>,
<&dai_pri_tdm_tx_0>, <&dai_pri_tdm_tx_1>,
<&dai_pri_tdm_tx_2>, <&dai_pri_tdm_tx_3>,
<&dai_pri_tdm_rx_0>, <&dai_pri_tdm_rx_1>,
<&dai_pri_tdm_rx_2>, <&dai_pri_tdm_rx_3>,
<&dai_sec_tdm_tx_0>, <&dai_sec_tdm_tx_1>,
<&dai_sec_tdm_tx_2>, <&dai_sec_tdm_tx_3>,
<&dai_tert_tdm_rx_0>, <&dai_tert_tdm_rx_1>,
@ -853,6 +944,10 @@
"msm-dai-q6-dev.241", "msm-dai-q6-dev.240",
"msm-dai-q6-dev.32771", "msm-dai-q6-dev.32772",
"msm-dai-q6-dev.32773", "msm-dai-q6-dev.32770",
"msm-dai-q6-tdm.36865", "msm-dai-q6-tdm.36867",
"msm-dai-q6-tdm.36869", "msm-dai-q6-tdm.36871",
"msm-dai-q6-tdm.36864", "msm-dai-q6-tdm.36866",
"msm-dai-q6-tdm.36868", "msm-dai-q6-tdm.36870",
"msm-dai-q6-tdm.36881", "msm-dai-q6-tdm.36883",
"msm-dai-q6-tdm.36885", "msm-dai-q6-tdm.36887",
"msm-dai-q6-tdm.36896", "msm-dai-q6-tdm.36898",
@ -868,11 +963,12 @@
asoc-codec-names = "msm-stub-codec.1";
};
usb_detect {
usb_detect: usb_detect {
compatible = "qcom,gpio-usbdetect";
qcom,vbus-det-gpio = <&pm8994_gpios 17 0>;
interrupt-parent = <&spmi_bus>;
interrupts = <0x0 0xd0 0x0>; /* PM8994 GPIO17 */
interrupt-names = "vbus_det_irq";
interrupts = <0x0 0x9 0x0 IRQ_TYPE_NONE>;
interrupt-names ="pmic_id_irq";
};
loopback1: qcom,msm-pcm-loopback-low-latency {
@ -1071,18 +1167,10 @@
};
&usb3 {
interrupt-parent = <&usb3>;
interrupts = <0 1 2 3>;
#interrupt-cells = <1>;
interrupt-map-mask = <0x0 0xffffffff>;
interrupt-map = <0x0 0 &intc 0 0 347 0
0x0 1 &intc 0 0 243 0
0x0 2 &intc 0 0 180 0
0x0 3 &spmi_bus 0x0 0x0 0x9 0x0>;
interrupt-names = "hs_phy_irq", "ss_phy_irq", "pwr_event_irq",
"pmic_id_irq";
extcon = <&usb_detect>;
vbus_dwc3-supply = <&usb_otg_switch>;
vdda33-supply = <&pm8994_l24>;
vdda18-supply = <&pm8994_l12>;
};
&blsp1_uart2 {
@ -1227,4 +1315,22 @@
/delete-property/ qcom,spkr-sd-n-gpio;
};
&vfe_smmu {
qcom,no-smr-check;
};
/ {
reserved-memory {
lk_mem: lk_pool@0x91600000 {
no-map;
reg = <0 0x91600000 0 0x00600000>;
label = "lk_pool";
};
early_camera_mem: early_camera_mem@b3fff000 {
reg = <0 0xb3fff000 0 0x800000>;
label = "early_camera_mem";
};
};
};

3
arch/arm/boot/dts/qcom/msm8996-mdss-panels.dtsi
View file

@ -1,4 +1,4 @@
/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -24,6 +24,7 @@
#include "dsi-panel-nt35597-dsc-wqxga-cmd.dtsi"
#include "dsi-panel-hx8379a-truly-fwvga-video.dtsi"
#include "dsi-panel-r69007-dualdsi-wqxga-cmd.dtsi"
#include "dsi-adv7533-1024-600p.dtsi"
#include "dsi-adv7533-720p.dtsi"
#include "dsi-adv7533-1080p.dtsi"
#include "dsi-panel-nt35950-dsc-4k-cmd.dtsi"

16
arch/arm/boot/dts/qcom/msm8996-mdss.dtsi
View file

@ -1,4 +1,4 @@
/* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
/* Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -459,6 +459,15 @@
qcom,mdss_pan_bpp = <24>;
};
msm_ext_disp: qcom,msm_ext_disp {
compatible = "qcom,msm-ext-disp";
ext_disp_audio_codec: qcom,msm-ext-disp-audio-codec-rx {
compatible = "qcom,msm-ext-disp-audio-codec-rx";
qcom,msm_ext_disp = <&msm_ext_disp>;
};
};
mdss_hdmi_tx: qcom,hdmi_tx@9a0000 {
cell-index = <0>;
compatible = "qcom,hdmi-tx";
@ -476,13 +485,14 @@
qcom,enable-load = <0>;
qcom,disable-load = <0>;
qcom,msm_ext_disp = <&msm_ext_disp>;
clocks = <&clock_mmss clk_mdss_mdp_vote_clk>,
<&clock_mmss clk_mdss_ahb_clk>,
<&clock_mmss clk_mdss_hdmi_clk>,
<&clock_mmss clk_mdss_hdmi_ahb_clk>,
<&clock_mmss clk_mdss_extpclk_clk>;
clock-names = "mdp_core_clk", "iface_clk",
"core_clk", "alt_iface_clk", "extp_clk";
clock-names = "hpd_mdp_core_clk", "hpd_iface_clk",
"hpd_core_clk", "hpd_alt_iface_clk", "core_extp_clk";
qcom,hdmi-tx-hpd = <&pm8994_mpps 4 0>;
qcom,mdss-fb-map = <&mdss_fb2>;

8
arch/arm/boot/dts/qcom/msm8996-mmxf-adp.dtsi
View file

@ -538,6 +538,10 @@
<&afe_proxy_rx>, <&afe_proxy_tx>,
<&incall_record_rx>, <&incall_record_tx>,
<&incall_music_rx>, <&incall_music2_rx>,
<&dai_pri_tdm_tx_0>, <&dai_pri_tdm_tx_1>,
<&dai_pri_tdm_tx_2>, <&dai_pri_tdm_tx_3>,
<&dai_pri_tdm_rx_0>, <&dai_pri_tdm_rx_1>,
<&dai_pri_tdm_rx_2>, <&dai_pri_tdm_rx_3>,
<&dai_sec_tdm_tx_0>, <&dai_sec_tdm_tx_1>,
<&dai_sec_tdm_tx_2>, <&dai_sec_tdm_tx_3>,
<&dai_tert_tdm_rx_0>, <&dai_tert_tdm_rx_1>,
@ -556,6 +560,10 @@
"msm-dai-q6-dev.241", "msm-dai-q6-dev.240",
"msm-dai-q6-dev.32771", "msm-dai-q6-dev.32772",
"msm-dai-q6-dev.32773", "msm-dai-q6-dev.32770",
"msm-dai-q6-tdm.36865", "msm-dai-q6-tdm.36867",
"msm-dai-q6-tdm.36869", "msm-dai-q6-tdm.36871",
"msm-dai-q6-tdm.36864", "msm-dai-q6-tdm.36866",
"msm-dai-q6-tdm.36868", "msm-dai-q6-tdm.36870",
"msm-dai-q6-tdm.36881", "msm-dai-q6-tdm.36883",
"msm-dai-q6-tdm.36885", "msm-dai-q6-tdm.36887",
"msm-dai-q6-tdm.36896", "msm-dai-q6-tdm.36898",

4
arch/arm/boot/dts/qcom/msm8996-mtp.dtsi
View file

@ -1,4 +1,4 @@
/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -343,7 +343,7 @@
qcom,mdss-pref-prim-intf = "dsi";
};
&mdss_hdmi {
&sde_hdmi {
status = "ok";
};

16
arch/arm/boot/dts/qcom/msm8996-pinctrl.dtsi
View file

@ -1449,7 +1449,7 @@
};
cnss_pins {
cnss_default: cnss_default {
cnss_bootstrap_active: cnss_bootstrap_active {
mux {
pins = "gpio46";
function = "gpio";
@ -1458,6 +1458,20 @@
config {
pins = "gpio46";
drive-strength = <16>;
output-high;
bias-pull-up;
};
};
cnss_bootstrap_sleep: cnss_bootstrap_sleep {
mux {
pins = "gpio46";
function = "gpio";
};
config {
pins = "gpio46";
drive-strength = <2>;
output-low;
bias-pull-down;
};
};

20
arch/arm/boot/dts/qcom/msm8996-regulator.dtsi
View file

@ -12,6 +12,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/spmi/spmi.h>
#include <dt-bindings/regulator/max20010.h>
&rpm_bus {
/* PM8994 S1 + S6 = 2 phase VDD_CX supply */
@ -1917,6 +1918,13 @@
gpio = <&pm8994_gpios 9 0>;
};
wlan_en_vreg: wlan_en_vreg {
compatible = "regulator-fixed";
regulator-name = "wlan_en_vreg";
enable-active-high;
gpio = <&pm8994_gpios 8 0>;
};
hl7509_en_vreg: hl7509_en_vreg {
compatible = "regulator-fixed";
regulator-name = "hl7509_en_vreg";
@ -1967,4 +1975,16 @@
onnn,restore-reg;
status = "disabled";
};
max20010_vreg: max20010-regulator@38 {
compatible = "maxim,max20010";
reg = <0x38>;
vin-supply = <&hl7509_en_vreg>;
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <1270000>;
regulator-initial-mode = <MAX20010_OPMODE_SYNC>;
maxim,vrange-sel = <0>;
maxim,soft-start-slew-rate = <5500>;
maxim,dvs-slew-rate = <5500>;
};
};

40
arch/arm/boot/dts/qcom/msm8996-sde-display.dtsi
View file

@ -94,8 +94,8 @@
label = "dsi_dual_sharp_video";
qcom,display-type = "primary";
qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>;
qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;
qcom,dsi-ctrl = <&sde_dsi0 &sde_dsi1>;
qcom,dsi-phy = <&sde_dsi_phy0 &sde_dsi_phy1>;
clocks = <&clock_mmss clk_ext_byte0_clk_src>,
<&clock_mmss clk_ext_pclk0_clk_src>;
clock-names = "src_byte_clk", "src_pixel_clk";
@ -118,8 +118,8 @@
label = "single_dsi_sim";
qcom,display-type = "primary";
qcom,dsi-ctrl = <&mdss_dsi0>;
qcom,dsi-phy = <&mdss_dsi_phy0>;
qcom,dsi-ctrl = <&sde_dsi0>;
qcom,dsi-phy = <&sde_dsi_phy0>;
clocks = <&clock_mmss clk_ext_byte0_clk_src>,
<&clock_mmss clk_ext_pclk0_clk_src>;
clock-names = "src_byte_clk", "src_pixel_clk";
@ -140,8 +140,8 @@
label = "single_dsi_toshiba_720p";
qcom,display-type = "primary";
qcom,dsi-ctrl = <&mdss_dsi0>;
qcom,dsi-phy = <&mdss_dsi_phy0>;
qcom,dsi-ctrl = <&sde_dsi0>;
qcom,dsi-phy = <&sde_dsi_phy0>;
clocks = <&clock_mmss clk_ext_byte0_clk_src>,
<&clock_mmss clk_ext_pclk0_clk_src>;
clock-names = "src_byte_clk", "src_pixel_clk";
@ -161,8 +161,8 @@
label = "single_dsi_jdi_1080p";
qcom,display-type = "primary";
qcom,dsi-ctrl = <&mdss_dsi0>;
qcom,dsi-phy = <&mdss_dsi_phy0>;
qcom,dsi-ctrl = <&sde_dsi0>;
qcom,dsi-phy = <&sde_dsi_phy0>;
clocks = <&clock_mmss clk_ext_byte0_clk_src>,
<&clock_mmss clk_ext_pclk0_clk_src>;
clock-names = "src_byte_clk", "src_pixel_clk";
@ -180,8 +180,8 @@
label = "single_dsi_sharp_1080p";
qcom,display-type = "primary";
qcom,dsi-ctrl = <&mdss_dsi0>;
qcom,dsi-phy = <&mdss_dsi_phy0>;
qcom,dsi-ctrl = <&sde_dsi0>;
qcom,dsi-phy = <&sde_dsi_phy0>;
clocks = <&clock_mmss clk_ext_byte0_clk_src>,
<&clock_mmss clk_ext_pclk0_clk_src>;
clock-names = "src_byte_clk", "src_pixel_clk";
@ -209,8 +209,8 @@
qcom,display-type = "primary";
/* dsi1/dsi0 swapped due to IMGSWAP */
qcom,dsi-ctrl = <&mdss_dsi1 &mdss_dsi0>;
qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;
qcom,dsi-ctrl = <&sde_dsi1 &sde_dsi0>;
qcom,dsi-phy = <&sde_dsi_phy0 &sde_dsi_phy1>;
clocks = <&clock_mmss clk_ext_byte0_clk_src>,
<&clock_mmss clk_ext_pclk0_clk_src>;
clock-names = "src_byte_clk", "src_pixel_clk";
@ -231,8 +231,8 @@
label = "dsi_dual_nt35597_video";
qcom,display-type = "primary";
qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>;
qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;
qcom,dsi-ctrl = <&sde_dsi0 &sde_dsi1>;
qcom,dsi-phy = <&sde_dsi_phy0 &sde_dsi_phy1>;
clocks = <&clock_mmss clk_ext_byte0_clk_src>,
<&clock_mmss clk_ext_pclk0_clk_src>;
clock-names = "src_byte_clk", "src_pixel_clk";
@ -253,8 +253,8 @@
label = "dsi_adv_7533_1";
qcom,display-type = "secondary";
qcom,dsi-ctrl = <&mdss_dsi0>;
qcom,dsi-phy = <&mdss_dsi_phy0>;
qcom,dsi-ctrl = <&sde_dsi0>;
qcom,dsi-phy = <&sde_dsi_phy0>;
clocks = <&clock_mmss clk_ext_byte0_clk_src>,
<&clock_mmss clk_ext_pclk0_clk_src>;
clock-names = "src_byte_clk", "src_pixel_clk";
@ -269,8 +269,8 @@
label = "dsi_adv_7533_2";
qcom,display-type = "tertiary";
qcom,dsi-ctrl = <&mdss_dsi1>;
qcom,dsi-phy = <&mdss_dsi_phy1>;
qcom,dsi-ctrl = <&sde_dsi1>;
qcom,dsi-phy = <&sde_dsi_phy1>;
clocks = <&clock_mmss clk_ext_byte1_clk_src>,
<&clock_mmss clk_ext_pclk1_clk_src>;
clock-names = "src_byte_clk", "src_pixel_clk";
@ -297,8 +297,8 @@
};
};
&mdss_mdp {
connectors = <&mdss_hdmi &sde_hdmi &dsi_adv_7533_1 &dsi_adv_7533_2>;
&sde_kms {
connectors = <&sde_hdmi_tx &sde_hdmi &dsi_adv_7533_1 &dsi_adv_7533_2>;
};
&dsi_dual_sharp_video {

39
arch/arm/boot/dts/qcom/msm8996-sde.dtsi
View file

@ -11,7 +11,7 @@
*/
&soc {
mdss_mdp: qcom,mdss_mdp@900000 {
sde_kms: qcom,sde_kms@900000 {
compatible = "qcom,sde-kms";
reg = <0x00900000 0x90000>,
<0x009b0000 0x1040>,
@ -182,8 +182,8 @@
};
};
smmu_mdp_unsec: qcom,smmu_mdp_unsec_cb {
compatible = "qcom,smmu_mdp_unsec";
smmu_kms_unsec: qcom,smmu_kms_unsec_cb {
compatible = "qcom,smmu_kms_unsec";
iommus = <&mdp_smmu 0>;
};
@ -213,7 +213,7 @@
};
};
mdss_dsi0: qcom,mdss_dsi_ctrl0@994000 {
sde_dsi0: qcom,sde_dsi_ctrl0@994000 {
compatible = "qcom,dsi-ctrl-hw-v1.4";
label = "dsi-ctrl-0";
cell-index = <0>;
@ -248,7 +248,7 @@
<22 512 0 0>,
<22 512 0 1000>;
interrupt-parent = <&mdss_mdp>;
interrupt-parent = <&sde_kms>;
interrupts = <4 0>;
qcom,core-supply-entries {
#address-cells = <1>;
@ -289,7 +289,7 @@
};
};
mdss_dsi1: qcom,mdss_dsi_ctrl1@996000 {
sde_dsi1: qcom,sde_dsi_ctrl1@996000 {
compatible = "qcom,dsi-ctrl-hw-v1.4";
label = "dsi-ctrl-1";
cell-index = <1>;
@ -323,7 +323,7 @@
<22 512 0 0>,
<22 512 0 1000>;
interrupt-parent = <&mdss_mdp>;
interrupt-parent = <&sde_kms>;
interrupts = <5 0>;
qcom,core-supply-entries {
#address-cells = <1>;
@ -363,7 +363,7 @@
};
};
mdss_dsi_phy0: qcom,mdss_dsi_phy0@994400 {
sde_dsi_phy0: qcom,sde_dsi_phy0@994400 {
compatible = "qcom,dsi-phy-v4.0";
label = "dsi-phy-0";
cell-index = <0>;
@ -422,7 +422,7 @@
};
};
mdss_dsi_phy1: qcom,mdss_dsi_phy1@996400 {
sde_dsi_phy1: qcom,sde_dsi_phy1@996400 {
compatible = "qcom,dsi-phy-v4.0";
label = "dsi-phy-1";
cell-index = <1>;
@ -481,7 +481,7 @@
};
};
mdss_hdmi: qcom,hdmi_tx@9a0000 {
sde_hdmi_tx: qcom,hdmi_tx_8996@9a0000 {
compatible = "qcom,hdmi-tx-8996";
reg = <0x009a0000 0x50c>,
@ -501,7 +501,7 @@
"core_clk",
"alt_iface_clk",
"extp_clk";
interrupt-parent = <&mdss_mdp>;
interrupt-parent = <&sde_kms>;
interrupts = <8 0>;
hpd-gdsc-supply = <&gdsc_mdss>;
qcom,hdmi-tx-hpd-gpio = <&pm8994_mpps 4 0>;
@ -513,23 +513,8 @@
&mdss_hdmi_ddc_suspend
&mdss_hdmi_cec_suspend>;
hdmi_audio: qcom,msm-hdmi-audio-rx {
sde_hdmi_audio: qcom,sde-hdmi-audio-rx {
compatible = "qcom,msm-hdmi-audio-codec-rx";
};
};
};
/* dummy nodes for compatibility with 8996 mdss dtsi */
&soc {
mdss_dsi: qcom,mdss_dsi_dummy {
/* dummy node for backward compatibility */
};
mdss_hdmi_tx: qcom,mdss_hdmi_tx_dummy {
/* dummy node for backward compatibility */
};
mdss_fb2: qcom,mdss_fb2_dummy {
/* dummy node for backward compatibility */
};
};

4
arch/arm/boot/dts/qcom/msm8996-v2.dtsi
View file

@ -1,4 +1,4 @@
/* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
/* Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -480,7 +480,7 @@
gdsc-venus-supply = <&gdsc_venus>;
};
&mdss_hdmi {
&sde_hdmi_tx {
hpd-gdsc-venus-supply = <&gdsc_venus>;
};

1
arch/arm/boot/dts/qcom/msm8996-vidc.dtsi
View file

@ -226,6 +226,7 @@
clocks = <&clock_mmss clk_vmem_ahb_clk>,
<&clock_mmss clk_vmem_maxi_clk>;
clock-names = "ahb", "maxi";
clock-config = <0x0 0x0 0x0 0x1>;
qcom,msm-bus,name = "vmem";
qcom,msm-bus,num-cases = <2>;

87
arch/arm/boot/dts/qcom/msm8996.dtsi
View file

@ -242,6 +242,7 @@
#include "msm8996-ion.dtsi"
#include "msm8996-sde.dtsi"
#include "msm8996-mdss.dtsi"
#include "msm8996-mdss-pll.dtsi"
#include "msm8996-smp2p.dtsi"
#include "msm8996-ipcrouter.dtsi"
@ -1064,6 +1065,7 @@
qcom,pm-qos-irq-cpu = <0>;
qcom,pm-qos-irq-latency = <70 70>;
non-removable;
status = "disabled";
};
@ -1268,6 +1270,7 @@
qcom,pm-qos-cpu-group-latency-us = <70 70>;
qcom,pm-qos-default-cpu = <0>;
non-removable;
status = "disabled";
};
@ -2332,15 +2335,17 @@
qcom,cnss {
compatible = "qcom,cnss";
wlan-bootstrap-gpio = <&tlmm 46 0>;
wlan-en-gpio = <&pm8994_gpios 8 0>;
vdd-wlan-en-supply = <&wlan_en_vreg>;
vdd-wlan-supply = <&rome_vreg>;
vdd-wlan-io-supply = <&pm8994_s4>;
vdd-wlan-xtal-supply = <&pm8994_l30>;
vdd-wlan-core-supply = <&pm8994_s3>;
wlan-ant-switch-supply = <&pm8994_l18_pin_ctrl>;
qcom,wlan-en-vreg-support;
qcom,notify-modem-status;
pinctrl-names = "default";
pinctrl-0 = <&cnss_default>;
pinctrl-names = "bootstrap_active", "bootstrap_sleep";
pinctrl-0 = <&cnss_bootstrap_active>;
pinctrl-1 = <&cnss_bootstrap_sleep>;
qcom,wlan-rc-num = <0>;
qcom,wlan-ramdump-dynamic = <0x200000>;
@ -3352,6 +3357,82 @@
};
};
qcom,msm-dai-tdm-pri-rx {
compatible = "qcom,msm-dai-tdm";
qcom,msm-cpudai-tdm-group-id = <37120>;
qcom,msm-cpudai-tdm-group-num-ports = <4>;
qcom,msm-cpudai-tdm-group-port-id = <36864 36866 36868 36870>;
qcom,msm-cpudai-tdm-clk-rate = <12288000>;
qcom,msm-cpudai-tdm-clk-internal = <1>;
qcom,msm-cpudai-tdm-sync-mode = <0>;
qcom,msm-cpudai-tdm-sync-src = <1>;
qcom,msm-cpudai-tdm-data-out = <0>;
qcom,msm-cpudai-tdm-invert-sync = <0>;
qcom,msm-cpudai-tdm-data-delay = <1>;
qcom,msm-cpudai-tdm-clk-attribute = /bits/ 16 <1>;
dai_pri_tdm_rx_0: qcom,msm-dai-q6-tdm-pri-rx-0 {
compatible = "qcom,msm-dai-q6-tdm";
qcom,msm-cpudai-tdm-dev-id = <36864>;
qcom,msm-cpudai-tdm-data-align = <0>;
};
dai_pri_tdm_rx_1: qcom,msm-dai-q6-tdm-pri-rx-1 {
compatible = "qcom,msm-dai-q6-tdm";
qcom,msm-cpudai-tdm-dev-id = <36866>;
qcom,msm-cpudai-tdm-data-align = <0>;
};
dai_pri_tdm_rx_2: qcom,msm-dai-q6-tdm-pri-rx-2 {
compatible = "qcom,msm-dai-q6-tdm";
qcom,msm-cpudai-tdm-dev-id = <36868>;
qcom,msm-cpudai-tdm-data-align = <0>;
};
dai_pri_tdm_rx_3: qcom,msm-dai-q6-tdm-pri-rx-3 {
compatible = "qcom,msm-dai-q6-tdm";
qcom,msm-cpudai-tdm-dev-id = <36870>;
qcom,msm-cpudai-tdm-data-align = <0>;
};
};
qcom,msm-dai-tdm-pri-tx {
compatible = "qcom,msm-dai-tdm";
qcom,msm-cpudai-tdm-group-id = <37121>;
qcom,msm-cpudai-tdm-group-num-ports = <4>;
qcom,msm-cpudai-tdm-group-port-id = <36865 36867 36869 36871>;
qcom,msm-cpudai-tdm-clk-rate = <12288000>;
qcom,msm-cpudai-tdm-clk-internal = <1>;
qcom,msm-cpudai-tdm-sync-mode = <0>;
qcom,msm-cpudai-tdm-sync-src = <1>;
qcom,msm-cpudai-tdm-data-out = <0>;
qcom,msm-cpudai-tdm-invert-sync = <0>;
qcom,msm-cpudai-tdm-data-delay = <1>;
qcom,msm-cpudai-tdm-clk-attribute = /bits/ 16 <1>;
dai_pri_tdm_tx_0: qcom,msm-dai-q6-tdm-pri-tx-0 {
compatible = "qcom,msm-dai-q6-tdm";
qcom,msm-cpudai-tdm-dev-id = <36865>;
qcom,msm-cpudai-tdm-data-align = <0>;
};
dai_pri_tdm_tx_1: qcom,msm-dai-q6-tdm-pri-tx-1 {
compatible = "qcom,msm-dai-q6-tdm";
qcom,msm-cpudai-tdm-dev-id = <36867>;
qcom,msm-cpudai-tdm-data-align = <0>;
};
dai_pri_tdm_tx_2: qcom,msm-dai-q6-tdm-pri-tx-2 {
compatible = "qcom,msm-dai-q6-tdm";
qcom,msm-cpudai-tdm-dev-id = <36869>;
qcom,msm-cpudai-tdm-data-align = <0>;
};
dai_pri_tdm_tx_3: qcom,msm-dai-q6-tdm-pri-tx-3 {
compatible = "qcom,msm-dai-q6-tdm";
qcom,msm-cpudai-tdm-dev-id = <36871>;
qcom,msm-cpudai-tdm-data-align = <0>;
};
};
qcom,msm-dai-tdm-sec-tx {
compatible = "qcom,msm-dai-tdm";
qcom,msm-cpudai-tdm-group-id = <37137>;

8
arch/arm/boot/dts/qcom/msm8996pro-auto-adp-lite.dts
View file

@ -49,6 +49,14 @@
status = "disabled";
};
};
qcom,adv7481@70 {
status = "disabled";
};
qcom,msm-ba {
status = "disabled";
};
};
&pil_modem {

9
arch/arm/boot/dts/qcom/msm8996pro-auto-adp.dts
View file

@ -1,4 +1,4 @@
/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -22,7 +22,7 @@
model = "Qualcomm Technologies, Inc. MSM 8996pro AUTO ADP";
compatible = "qcom,msm8996-adp", "qcom,msm8996", "qcom,adp";
qcom,msm-id = <315 0x10000>;
qcom,board-id = <0x02010019 0>;
qcom,board-id = <0x02010019 0>, <0x00010001 0>;
};
&spi_9 {
@ -46,6 +46,11 @@
qcom,hotplug-temp-hysteresis = <25>;
qcom,therm-reset-temp = <119>;
};
qcom,adv7481@70 {
qcom,cam-vreg-min-voltage = <1300000 0 1800000>;
qcom,cam-vreg-max-voltage = <1300000 0 1800000>;
};
};
&pil_modem {

9
arch/arm/boot/dts/qcom/msm8996pro-auto.dtsi
View file

@ -459,3 +459,12 @@
< 0 0 >,
< 315000000 4 >;
};
/* GPU overrides for auto */
&msm_gpu {
qcom,gpu-pwrlevel-bins {
qcom,gpu-pwrlevels-0 {
qcom,initial-pwrlevel = <1>;
};
};
};

6
arch/arm/boot/dts/qcom/msm8996pro.dtsi
View file

@ -22,7 +22,7 @@
qcom,msm-id = <305 0x10000>;
chosen {
bootargs = "fpsimd.fpsimd_settings=1 app_setting.use_app_setting=0 app_setting.use_32bit_app_setting_pro=1";
bootargs = "lpm_levels.sleep_disabled=1 fpsimd.fpsimd_settings=1 app_setting.use_app_setting=0 app_setting.use_32bit_app_setting_pro=1";
};
};
@ -1331,6 +1331,10 @@
qcom,poll-ms = <50>;
qcom,limit-temp = <80>;
qcom,core-limit-temp = <90>;
msm_thermal_freq: qcom,vdd-apps-rstr {
qcom,max-freq-level = <1209600>;
qcom,levels = <1056000 1516800 1516800>;
};
qcom,vdd-gfx-rstr{
qcom,levels = <6 8 9>; /* Nominal, Turbo, Turbo_L1 */
};

39
arch/arm/boot/dts/qcom/msm8996v3-auto.dtsi
View file

@ -1,4 +1,4 @@
/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
/* Copyright (c) 2016 - 2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -167,3 +167,40 @@
< 560000000 7 >,
< 624000000 7 >;
};
&soc {
ipa_hw: qcom,ipa@680000 {
compatible = "qcom,ipa";
reg = <0x680000 0x4effc>,
<0x684000 0x26934>;
reg-names = "ipa-base", "bam-base";
interrupts = <0 333 0>,
<0 432 0>;
interrupt-names = "ipa-irq", "bam-irq";
qcom,ipa-hw-ver = <5>; /* IPA core version = IPAv2.5 */
qcom,ipa-hw-mode = <0>;
qcom,ee = <0>;
qcom,use-ipa-tethering-bridge;
qcom,ipa-bam-remote-mode;
qcom,modem-cfg-emb-pipe-flt;
clocks = <&clock_gcc clk_ipa_clk>;
clock-names = "core_clk";
qcom,use-dma-zone;
qcom,msm-bus,name = "ipa";
qcom,msm-bus,num-cases = <3>;
qcom,msm-bus,num-paths = <2>;
qcom,msm-bus,vectors-KBps =
<90 512 0 0>, <90 585 0 0>, /* No vote */
<90 512 80000 640000>, <90 585 80000 640000>, /* SVS */
<90 512 206000 960000>, <90 585 206000 960000>; /* PERF */
qcom,bus-vector-names = "MIN", "SVS", "PERF";
};
qcom,rmnet-ipa {
compatible = "qcom,rmnet-ipa";
qcom,rmnet-ipa-ssr;
qcom,ipa-loaduC;
qcom,ipa-advertise-sg-support;
};
};

24
arch/arm/boot/dts/qcom/msm8998-9x55-cdp.dts Normal file
View file

@ -0,0 +1,24 @@
/*
* Copyright (c) 2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "msm8998-9x55.dtsi"
#include "msm8998-mdss-panels.dtsi"
#include "msm8998-cdp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. MSM8998-9x55 CDP";
compatible = "qcom,msm8998-9x55-cdp", "qcom,msm8998-9x55", "qcom,cdp";
qcom,board-id= <1 2>;
};

24
arch/arm/boot/dts/qcom/msm8998-9x55-mtp.dts Normal file
View file

@ -0,0 +1,24 @@
/*
* Copyright (c) 2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "msm8998-9x55.dtsi"
#include "msm8998-mdss-panels.dtsi"
#include "msm8998-mtp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. MSM8998-9x55 MTP";
compatible = "qcom,msm8998-9x55-mtp", "qcom,msm8998-9x55", "qcom,mtp";
qcom,board-id= <8 6>;
};

24
arch/arm/boot/dts/qcom/msm8998-9x55-rcm.dts Normal file
View file

@ -0,0 +1,24 @@
/*
* Copyright (c) 2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "msm8998-9x55.dtsi"
#include "msm8998-mdss-panels.dtsi"
#include "msm8998-cdp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. MSM8998-9x55 RCM";
compatible = "qcom,msm8998-9x55-cdp", "qcom,msm8998-9x55", "qcom,cdp";
qcom,board-id= <0x21 2>;
};

25
arch/arm/boot/dts/qcom/msm8998-9x55.dtsi Normal file
View file

@ -0,0 +1,25 @@
/*
* Copyright (c) 2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "skeleton64.dtsi"
#include "msm8998-v2.1.dtsi"
/ {
model = "Qualcomm Technologies, Inc. MSM8998-9x55";
compatible = "qcom,msm8998-9x55";
qcom,msm-id = <292 0x0>;
interrupt-parent = <&intc>;
soc: soc { };
};

56
arch/arm/boot/dts/qcom/msm8998-camera-sensor-qrd-vr1.dtsi
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016, The Linux Foundation. All rights reserved.
* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -345,6 +345,60 @@
clock-names = "cam_src_clk", "cam_clk";
qcom,clock-rates = <24000000 0>;
};
/* ToF Camera*/
qcom,camera@3 {
cell-index = <3>;
compatible = "qcom,camera";
reg = <0x3>;
qcom,csiphy-sd-index = <1>;
qcom,csid-sd-index = <3>;
qcom,mount-angle = <90>;
cam_vio-supply = <&pm8998_lvs1>;
qcom,cam-vreg-name = "cam_vio";
qcom,cam-vreg-min-voltage = <1800000>;
qcom,cam-vreg-max-voltage = <1800000>;
qcom,cam-vreg-op-mode = <80000>;
qcom,gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk3_active
&cam_sensor_depth_v1_active
&cam_sensor_depth_v2_active
&cam_sensor_depth_default>;
pinctrl-1 = <&cam_sensor_mclk3_suspend
&cam_sensor_depth_v1_sleep
&cam_sensor_depth_v2_sleep
&cam_sensor_depth_sleep>;
gpios = <&tlmm 16 0>,
<&tlmm 24 0>,
<&tlmm 21 0>,
<&tlmm 28 0>,
<&tlmm 23 0>,
<&tlmm 7 0>;
qcom,gpio-vana = <1>;
qcom,gpio-custom2 = <2>;
qcom,gpio-reset = <3>;
qcom,gpio-custom3 = <4>;
qcom,gpio-custom1 = <5>;
qcom,gpio-req-tbl-num = <0 1 2 3 4 5>;
qcom,gpio-req-tbl-flags = <1 0 0 0 1 1>;
qcom,gpio-req-tbl-label =
"CAMIF_MCLK3",
"CAM_VANA",
"CAM_CUSTOM2",
"CAM_RESET1",
"CAM_CUSTOM3",
"CAM_CUSTOM1";
qcom,sensor-position = <1>; /* 0 rear */
qcom,sensor-mode = <0>;
qcom,cci-master = <1>; /* I2C 1 */
status = "ok";
clocks = <&clock_mmss clk_mclk3_clk_src>,
<&clock_mmss clk_mmss_camss_mclk3_clk>;
clock-names = "cam_src_clk", "cam_clk";
qcom,clock-rates = <24000000 0>;
};
};
&pm8998_gpios {

399
arch/arm/boot/dts/qcom/msm8998-camera-sensor-svr20.dtsi Normal file
View file

@ -0,0 +1,399 @@
/*
* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
led_flash0: qcom,camera-flash@0 {
cell-index = <0>;
compatible = "qcom,camera-flash";
qcom,flash-source = <&pmi8998_flash0 &pmi8998_flash1>;
qcom,torch-source = <&pmi8998_torch0 &pmi8998_torch1>;
qcom,switch-source = <&pmi8998_switch0>;
status = "ok";
};
led_flash1: qcom,camera-flash@1 {
cell-index = <1>;
compatible = "qcom,camera-flash";
qcom,flash-source = <&pmi8998_flash2>;
qcom,torch-source = <&pmi8998_torch2>;
qcom,switch-source = <&pmi8998_switch1>;
status = "ok";
};
};
&cci {
actuator0: qcom,actuator@0 {
cell-index = <0>;
reg = <0x0>;
compatible = "qcom,actuator";
qcom,cci-master = <0>;
gpios = <&tlmm 27 0>;
qcom,gpio-vaf = <0>;
qcom,gpio-req-tbl-num = <0>;
qcom,gpio-req-tbl-flags = <0>;
qcom,gpio-req-tbl-label = "CAM_VAF";
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_actuator_vaf_active>;
pinctrl-1 = <&cam_actuator_vaf_suspend>;
};
actuator1: qcom,actuator@1 {
cell-index = <1>;
reg = <0x1>;
compatible = "qcom,actuator";
qcom,cci-master = <1>;
gpios = <&tlmm 27 0>;
qcom,gpio-vaf = <0>;
qcom,gpio-req-tbl-num = <0>;
qcom,gpio-req-tbl-flags = <0>;
qcom,gpio-req-tbl-label = "CAM_VAF";
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_actuator_vaf_active>;
pinctrl-1 = <&cam_actuator_vaf_suspend>;
};
ois0: qcom,ois@0 {
cell-index = <0>;
reg = <0x0>;
compatible = "qcom,ois";
qcom,cci-master = <0>;
gpios = <&tlmm 27 0>;
qcom,gpio-vaf = <0>;
qcom,gpio-req-tbl-num = <0>;
qcom,gpio-req-tbl-flags = <0>;
qcom,gpio-req-tbl-label = "CAM_VAF";
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_actuator_vaf_active>;
pinctrl-1 = <&cam_actuator_vaf_suspend>;
status = "disabled";
};
eeprom0: qcom,eeprom@0 {
cell-index = <0>;
reg = <0>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8998_lvs1>;
cam_vana-supply = <&pmi8998_bob>;
cam_vdig-supply = <&pm8998_s3>;
qcom,cam-vreg-name = "cam_vio", "cam_vana", "cam_vdig";
qcom,cam-vreg-min-voltage = <0 3312000 1352000>;
qcom,cam-vreg-max-voltage = <0 3600000 1352000>;
qcom,cam-vreg-op-mode = <0 80000 105000>;
qcom,gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_rear_active
&cam_actuator_vaf_active>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_rear_suspend
&cam_actuator_vaf_suspend>;
gpios = <&tlmm 13 0>,
<&tlmm 30 0>,
<&pm8998_gpios 20 0>,
<&tlmm 29 0>,
<&tlmm 27 0>;
qcom,gpio-reset = <1>;
qcom,gpio-vdig = <2>;
qcom,gpio-vana = <3>;
qcom,gpio-vaf = <4>;
qcom,gpio-req-tbl-num = <0 1 2 3 4>;
qcom,gpio-req-tbl-flags = <1 0 0 0 0>;
qcom,gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0",
"CAM_VDIG",
"CAM_VANA",
"CAM_VAF";
qcom,sensor-position = <0>;
qcom,sensor-mode = <0>;
qcom,cci-master = <0>;
status = "ok";
clocks = <&clock_mmss clk_mclk0_clk_src>,
<&clock_mmss clk_mmss_camss_mclk0_clk>;
clock-names = "cam_src_clk", "cam_clk";
qcom,clock-rates = <24000000 0>;
};
eeprom1: qcom,eeprom@1 {
cell-index = <1>;
reg = <0x1>;
compatible = "qcom,eeprom";
cam_vdig-supply = <&pm8998_lvs1>;
cam_vio-supply = <&pm8998_lvs1>;
cam_vana-supply = <&pmi8998_bob>;
qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana";
qcom,cam-vreg-min-voltage = <0 0 3312000>;
qcom,cam-vreg-max-voltage = <0 0 3600000>;
qcom,cam-vreg-op-mode = <0 0 80000>;
qcom,gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_rear2_active>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_rear2_suspend>;
gpios = <&tlmm 15 0>,
<&tlmm 9 0>,
<&tlmm 8 0>;
qcom,gpio-reset = <1>;
qcom,gpio-vana = <2>;
qcom,gpio-req-tbl-num = <0 1 2>;
qcom,gpio-req-tbl-flags = <1 0 0>;
qcom,gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1",
"CAM_VANA1";
qcom,sensor-position = <0>;
qcom,sensor-mode = <0>;
qcom,cci-master = <1>;
status = "ok";
clocks = <&clock_mmss clk_mclk2_clk_src>,
<&clock_mmss clk_mmss_camss_mclk2_clk>;
clock-names = "cam_src_clk", "cam_clk";
qcom,clock-rates = <24000000 0>;
};
eeprom2: qcom,eeprom@2 {
cell-index = <2>;
reg = <0x2>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8998_lvs1>;
/*cam_vana-supply = <&pm8998_l22>;*/
cam_vdig-supply = <&pm8998_s3>;
qcom,cam-vreg-name = "cam_vio", "cam_vana", "cam_vdig";
qcom,cam-vreg-min-voltage =
<0 2864000 1352000>;
qcom,cam-vreg-max-voltage =
<0 2864000 1352000>;
qcom,cam-vreg-op-mode = <0 80000 105000>;
qcom,gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_front_active>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_front_suspend>;
gpios = <&tlmm 14 0>,
<&tlmm 28 0>,
<&pm8998_gpios 9 0>;
qcom,gpio-reset = <1>;
qcom,gpio-vdig = <2>;
qcom,gpio-req-tbl-num = <0 1 2>;
qcom,gpio-req-tbl-flags = <1 0 0>;
qcom,gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2",
"CAM_VDIG";
qcom,sensor-position = <1>;
qcom,sensor-mode = <0>;
qcom,cci-master = <1>;
status = "ok";
clocks = <&clock_mmss clk_mclk1_clk_src>,
<&clock_mmss clk_mmss_camss_mclk1_clk>;
clock-names = "cam_src_clk", "cam_clk";
qcom,clock-rates = <24000000 0>;
};
qcom,camera@0 {
cell-index = <0>;
compatible = "qcom,camera";
reg = <0x0>;
qcom,csiphy-sd-index = <0>;
qcom,csid-sd-index = <0>;
qcom,mount-angle = <270>;
cam_vio-supply = <&pm8998_l8>;
cam_vana-supply = <&pmi8998_bob>;
cam_vdig-supply = <&pm8998_l9>;
cam_v_custom1-supply = <&pm8998_lvs1>;
qcom,cam-vreg-name = "cam_vdig", "cam_vana",
"cam_vio", "cam_v_custom1";
qcom,cam-vreg-min-voltage = <1808000 3312000 1200000 0>;
qcom,cam-vreg-max-voltage = <2960000 3600000 1200000 0>;
qcom,cam-vreg-op-mode = <0 80000 105000 0>;
qcom,gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_6dofl_active>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_6dofl_suspend>;
gpios = <&tlmm 13 0>,
<&tlmm 148 0>,
<&tlmm 93 0>,
<&tlmm 52 0>;
qcom,gpio-reset = <1>;
qcom,gpio-vana = <2>;
qcom,gpio-vdig = <3>;
qcom,gpio-req-tbl-num = <0 1 2 3>;
qcom,gpio-req-tbl-flags = <1 0 0 0>;
qcom,gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0",
"CAM_VANA",
"CAM_VDIG";
qcom,sensor-position = <0>;
qcom,sensor-mode = <1>;
qcom,cci-master = <0>;
status = "ok";
clocks = <&clock_mmss clk_mclk0_clk_src>,
<&clock_mmss clk_mmss_camss_mclk0_clk>;
clock-names = "cam_src_clk", "cam_clk";
qcom,clock-rates = <24000000 0>;
};
qcom,camera@1 {
cell-index = <1>;
compatible = "qcom,camera";
reg = <0x1>;
qcom,csiphy-sd-index = <1>;
qcom,csid-sd-index = <1>;
qcom,mount-angle = <90>;
qcom,eeprom-src = <&eeprom1>;
qcom,actuator-src = <&actuator1>;
cam_vdig-supply = <&pm8998_lvs1>;
cam_vio-supply = <&pm8998_lvs1>;
cam_vana-supply = <&pmi8998_bob>;
qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana";
qcom,cam-vreg-min-voltage = <0 0 3312000>;
qcom,cam-vreg-max-voltage = <0 0 3600000>;
qcom,cam-vreg-op-mode = <0 0 80000>;
qcom,gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_rear2_active>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_rear2_suspend>;
gpios = <&tlmm 15 0>,
<&tlmm 9 0>,
<&tlmm 8 0>;
qcom,gpio-reset = <1>;
qcom,gpio-vana = <2>;
qcom,gpio-req-tbl-num = <0 1 2>;
qcom,gpio-req-tbl-flags = <1 0 0>;
qcom,gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1",
"CAM_VANA1";
qcom,sensor-position = <0>;
qcom,sensor-mode = <0>;
qcom,cci-master = <1>;
status = "ok";
clocks = <&clock_mmss clk_mclk2_clk_src>,
<&clock_mmss clk_mmss_camss_mclk2_clk>;
clock-names = "cam_src_clk", "cam_clk";
qcom,clock-rates = <24000000 0>;
};
qcom,camera@2 {
cell-index = <2>;
compatible = "qcom,camera";
reg = <0x02>;
qcom,csiphy-sd-index = <2>;
qcom,csid-sd-index = <2>;
qcom,mount-angle = <90>;
qcom,eeprom-src = <&eeprom2>;
qcom,led-flash-src = <&led_flash1>;
qcom,actuator-src = <&actuator1>;
cam_vio-supply = <&pm8998_lvs1>;
cam_vana-supply = <&pmi8998_bob>;
cam_vdig-supply = <&pm8998_s3>;
qcom,cam-vreg-name = "cam_vio", "cam_vana", "cam_vdig";
qcom,cam-vreg-min-voltage =
<0 3312000 1352000>;
qcom,cam-vreg-max-voltage =
<0 3600000 1352000>;
qcom,cam-vreg-op-mode = <0 80000 105000>;
qcom,gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_front_active>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_front_suspend>;
gpios = <&tlmm 14 0>,
<&tlmm 28 0>,
<&pm8998_gpios 9 0>;
qcom,gpio-reset = <1>;
qcom,gpio-vdig = <2>;
qcom,gpio-req-tbl-num = <0 1 2>;
qcom,gpio-req-tbl-flags = <1 0 0>;
qcom,gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2",
"CAM_VDIG";
qcom,sensor-position = <1>;
qcom,sensor-mode = <0>;
qcom,cci-master = <1>;
status = "disabled";
clocks = <&clock_mmss clk_mclk1_clk_src>,
<&clock_mmss clk_mmss_camss_mclk1_clk>;
clock-names = "cam_src_clk", "cam_clk";
qcom,clock-rates = <24000000 0>;
};
qcom,camera@3 {
cell-index = <3>;
compatible = "qcom,camera";
reg = <0x3>;
qcom,csiphy-sd-index = <0>;
qcom,csid-sd-index = <0>;
qcom,mount-angle = <270>;
cam_vio-supply = <&pm8998_l8>;
cam_vana-supply = <&pmi8998_bob>;
cam_vdig-supply = <&pm8998_l9>;
cam_v_custom1-supply = <&pm8998_lvs1>;
qcom,cam-vreg-name = "cam_vdig", "cam_vana",
"cam_vio", "cam_v_custom1";
qcom,cam-vreg-min-voltage = <1808000 3312000 1200000 0>;
qcom,cam-vreg-max-voltage = <2960000 3600000 1200000 0>;
qcom,cam-vreg-op-mode = <0 80000 105000 0>;
qcom,gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_6dofr_active>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_6dofr_suspend>;
gpios = <&tlmm 13 0>,
<&tlmm 149 0>,
<&tlmm 93 0>,
<&tlmm 52 0>;
qcom,gpio-reset = <1>;
qcom,gpio-vana = <2>;
qcom,gpio-vdig = <3>;
qcom,gpio-req-tbl-num = <0 1 2 3>;
qcom,gpio-req-tbl-flags = <1 0 0 0>;
qcom,gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET1",
"CAM_VANA1",
"CAM_VDIG1";
qcom,sensor-position = <1>;
qcom,sensor-mode = <1>;
qcom,cci-master = <0>;
status = "ok";
clocks = <&clock_mmss clk_mclk0_clk_src>,
<&clock_mmss clk_mmss_camss_mclk0_clk>;
clock-names = "cam_src_clk", "cam_clk";
qcom,clock-rates = <24000000 0>;
};
};
&pm8998_gpios {
gpio@c800 { /* GPIO 9 - CAMERA SENSOR 2 VDIG */
qcom,mode = <1>; /* Output */
qcom,pull = <5>; /* No Pull */
qcom,vin-sel = <0>; /* VIN1 GPIO_LV */
qcom,src-sel = <0>; /* GPIO */
qcom,invert = <0>; /* Invert */
qcom,master-en = <1>; /* Enable GPIO */
status = "ok";
};
gpio@d300 { /* GPIO 20 - CAMERA SENSOR 0 VDIG */
qcom,mode = <1>; /* Output */
qcom,pull = <5>; /* No Pull */
qcom,vin-sel = <1>; /* VIN1 GPIO_MV */
qcom,src-sel = <0>; /* GPIO */
qcom,invert = <0>; /* Invert */
qcom,master-en = <1>; /* Enable GPIO */
status = "ok";
};
};

10
arch/arm/boot/dts/qcom/msm8998-cdp.dtsi
View file

@ -149,6 +149,16 @@
status = "okay";
};
gpio@d200 { /* GPIO 19 - wil6210 refclk3_en */
qcom,mode = <0>; /* Input */
qcom,pull = <5>; /* No Pull */
qcom,vin-sel = <1>; /* VIN1 GPIO_MV */
qcom,src-sel = <0>; /* GPIO */
qcom,invert = <0>; /* Invert */
qcom,master-en = <1>; /* Enable GPIO */
status = "okay";
};
/* GPIO 21 (NFC_CLK_REQ) */
gpio@d400 {
qcom,mode = <0>;

3
arch/arm/boot/dts/qcom/msm8998-gpu.dtsi
View file

@ -79,6 +79,9 @@
qcom,tsens-name = "tsens_tz_sensor12";
/* Avoid L2PC on big cluster CPUs (CPU 4,5,6,7) */
qcom,l2pc-cpu-mask = <0x000000f0>;
/* Quirks */
qcom,gpu-quirk-lmloadkill-disable;

2
arch/arm/boot/dts/qcom/msm8998-mdss-panels.dtsi
View file

@ -87,7 +87,6 @@
qcom,mdss-dsi-t-clk-post = <0x07>;
qcom,mdss-dsi-t-clk-pre = <0x25>;
qcom,mdss-dsi-tx-eot-append;
qcom,cmd-sync-wait-broadcast;
qcom,esd-check-enabled;
qcom,mdss-dsi-min-refresh-rate = <55>;
qcom,mdss-dsi-max-refresh-rate = <60>;
@ -107,7 +106,6 @@
qcom,mdss-dsi-t-clk-post = <0x0d>;
qcom,mdss-dsi-t-clk-pre = <0x2d>;
qcom,mdss-dsi-tx-eot-append;
qcom,cmd-sync-wait-broadcast;
qcom,esd-check-enabled;
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];

10
arch/arm/boot/dts/qcom/msm8998-mtp.dtsi
View file

@ -150,6 +150,16 @@
status = "okay";
};
gpio@d200 { /* GPIO 19 - wil6210 refclk3_en */
qcom,mode = <0>; /* Input */
qcom,pull = <5>; /* No Pull */
qcom,vin-sel = <1>; /* VIN1 GPIO_MV */
qcom,src-sel = <0>; /* GPIO */
qcom,invert = <0>; /* Invert */
qcom,master-en = <1>; /* Enable GPIO */
status = "okay";
};
/* GPIO 21 (NFC_CLK_REQ) */
gpio@d400 {
qcom,mode = <0>;

80
arch/arm/boot/dts/qcom/msm8998-pinctrl.dtsi
View file

@ -993,6 +993,86 @@
};
};
cam_sensor_depth_default: cam_sensor_depth_default {
mux {
pins = "gpio28","gpio23","gpio7";
function = "gpio";
};
config {
pins = "gpio28","gpio23","gpio7";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_depth_sleep: cam_sensor_depth_sleep {
mux {
pins = "gpio28","gpio23","gpio7";
function = "gpio";
};
config {
pins = "gpio28","gpio23","gpio7";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_depth_v1_active: cam_sensor_depth_v1_active {
/* Depth VANA */
mux {
pins = "gpio24";
function = "gpio";
};
config {
pins = "gpio24";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_depth_v1_sleep: cam_sensor_depth_v1_sleep {
mux {
pins = "gpio24";
function = "gpio";
};
config {
pins = "gpio24";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_depth_v2_active: cam_sensor_depth_v2_active {
/* Depth CUSTOM2 */
mux {
pins = "gpio21";
function = "gpio";
};
config {
pins = "gpio21";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_depth_v2_sleep: cam_sensor_depth_v2_sleep {
mux {
pins = "gpio21";
function = "gpio";
};
config {
pins = "gpio21";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_mclk0_active: cam_sensor_mclk0_active {
/* MCLK0 */
mux {

1
arch/arm/boot/dts/qcom/msm8998-qrd-overlay.dts
View file

@ -17,6 +17,7 @@
#include <dt-bindings/clock/msm-clocks-8998.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "msm8998-mdss-panels.dtsi"
#include "msm8998-qrd.dtsi"
/ {

10
arch/arm/boot/dts/qcom/msm8998-qrd-skuk.dtsi
View file

@ -143,6 +143,16 @@
qcom,out-strength = <1>;
};
gpio@d200 { /* GPIO 19 - wil6210 refclk3_en */
qcom,mode = <0>; /* Input */
qcom,pull = <5>; /* No Pull */
qcom,vin-sel = <1>; /* VIN1 GPIO_MV */
qcom,src-sel = <0>; /* GPIO */
qcom,invert = <0>; /* Invert */
qcom,master-en = <1>; /* Enable GPIO */
status = "okay";
};
/* GPIO 21 (NFC_CLK_REQ) */
gpio@d400 {
qcom,mode = <0>;

10
arch/arm/boot/dts/qcom/msm8998-qrd.dtsi
View file

@ -139,6 +139,16 @@
status = "okay";
};
gpio@d200 { /* GPIO 19 - wil6210 refclk3_en */
qcom,mode = <0>; /* Input */
qcom,pull = <5>; /* No Pull */
qcom,vin-sel = <1>; /* VIN1 GPIO_MV */
qcom,src-sel = <0>; /* GPIO */
qcom,invert = <0>; /* Invert */
qcom,master-en = <1>; /* Enable GPIO */
status = "okay";
};
/* GPIO 21 (NFC_CLK_REQ) */
gpio@d400 {
qcom,mode = <0>;

3386
arch/arm/boot/dts/qcom/msm8998-svr20-pinctrl.dtsi Normal file
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File diff suppressed because it is too large Load diff

409
arch/arm/boot/dts/qcom/msm8998-svr20.dtsi Normal file
View file

@ -0,0 +1,409 @@
/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include "msm8998-svr20-pinctrl.dtsi"
#include "msm8998-camera-sensor-svr20.dtsi"
&vendor {
bluetooth: bt_wcn3990 {
compatible = "qca,wcn3990";
qca,bt-vdd-io-supply = <&pm8998_s3>;
qca,bt-vdd-xtal-supply = <&pm8998_s5>;
qca,bt-vdd-core-supply = <&pm8998_l7>;
qca,bt-vdd-pa-supply = <&pm8998_l17>;
qca,bt-vdd-ldo-supply = <&pm8998_l25>;
qca,bt-chip-pwd-supply = <&pmi8998_bob_pin1>;
clocks = <&clock_gcc clk_rf_clk2_pin>;
clock-names = "rf_clk2";
qca,bt-vdd-io-voltage-level = <1352000 1352000>;
qca,bt-vdd-xtal-voltage-level = <2040000 2040000>;
qca,bt-vdd-core-voltage-level = <1800000 1800000>;
qca,bt-vdd-pa-voltage-level = <1304000 1304000>;
qca,bt-vdd-ldo-voltage-level = <3312000 3312000>;
qca,bt-chip-pwd-voltage-level = <3600000 3600000>;
qca,bt-vdd-io-current-level = <1>; /* LPM/PFM */
qca,bt-vdd-xtal-current-level = <1>; /* LPM/PFM */
qca,bt-vdd-core-current-level = <1>; /* LPM/PFM */
qca,bt-vdd-pa-current-level = <1>; /* LPM/PFM */
qca,bt-vdd-ldo-current-level = <1>; /* LPM/PFM */
};
svr20_batterydata: qcom,battery-data {
qcom,batt-id-range-pct = <25>;
#include "fg-gen3-batterydata-svr-v2-3200mah.dtsi"
};
};
&blue_led {
qcom,default-state = "on";
linux,default-trigger = "system-running";
};
&pmi8998_charger {
qcom,fcc-max-ua = <5000000>;
qcom,usb-icl-ua = <3000000>;
};
&blsp1_uart3_hs {
status = "ok";
};
&ufsphy1 {
vdda-phy-supply = <&pm8998_l1>;
vdda-pll-supply = <&pm8998_l2>;
vddp-ref-clk-supply = <&pm8998_l26>;
vdda-phy-max-microamp = <51400>;
vdda-pll-max-microamp = <14600>;
vddp-ref-clk-max-microamp = <100>;
vddp-ref-clk-always-on;
status = "ok";
};
&ufs1 {
vdd-hba-supply = <&gdsc_ufs>;
vdd-hba-fixed-regulator;
vcc-supply = <&pm8998_l20>;
vccq-supply = <&pm8998_l26>;
vccq2-supply = <&pm8998_s4>;
vcc-max-microamp = <750000>;
vccq-max-microamp = <560000>;
vccq2-max-microamp = <750000>;
status = "ok";
};
&ufs_ice {
status = "ok";
};
&sdhc_2 {
vdd-supply = <&pm8998_l21>;
qcom,vdd-voltage-level = <2950000 2960000>;
qcom,vdd-current-level = <200 800000>;
vdd-io-supply = <&pm8998_l13>;
qcom,vdd-io-voltage-level = <1808000 2960000>;
qcom,vdd-io-current-level = <200 22000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
qcom,clk-rates = <400000 20000000 25000000
50000000 100000000 200000000>;
qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
cd-gpios = <&tlmm 95 0x1>;
status = "ok";
};
&uartblsp2dm1 {
status = "ok";
pinctrl-names = "default";
pinctrl-0 = <&uart_console_active>;
};
&pm8998_gpios {
/* GPIO 5 for Home Key */
gpio@c400 {
status = "okay";
qcom,mode = <0>;
qcom,pull = <0>;
qcom,vin-sel = <0>;
qcom,src-sel = <0>;
qcom,out-strength = <1>;
};
/* GPIO 6 for Vol+ Key */
gpio@c500 {
status = "okay";
qcom,mode = <0>;
qcom,pull = <0>;
qcom,vin-sel = <0>;
qcom,src-sel = <0>;
qcom,out-strength = <1>;
};
/* GPIO 7 for Snapshot Key */
gpio@c600 {
status = "okay";
qcom,mode = <0>;
qcom,pull = <0>;
qcom,vin-sel = <0>;
qcom,src-sel = <0>;
qcom,out-strength = <1>;
};
/* GPIO 8 for Focus Key */
gpio@c700 {
status = "okay";
qcom,mode = <0>;
qcom,pull = <0>;
qcom,vin-sel = <0>;
qcom,src-sel = <0>;
qcom,out-strength = <1>;
};
gpio@cc00 { /* GPIO 13 */
qcom,mode = <1>;
qcom,output-type = <0>;
qcom,pull = <5>;
qcom,vin-sel = <0>;
qcom,out-strength = <1>;
qcom,src-sel = <3>;
qcom,master-en = <1>;
status = "okay";
};
/* GPIO 21 (NFC_CLK_REQ) */
gpio@d400 {
qcom,mode = <0>;
qcom,vin-sel = <1>;
qcom,src-sel = <0>;
qcom,master-en = <1>;
status = "okay";
};
/* GPIO 18 SMB138X */
gpio@d100 {
qcom,mode = <0>;
qcom,pull = <0>;
qcom,vin-sel = <0>;
qcom,src-sel = <0>;
qcom,master-en = <1>;
status = "okay";
};
};
&i2c_5 {
status = "okay";
};
&i2c_6 { /* BLSP1 QUP6 (NFC) */
status = "okay";
nq@28 {
compatible = "qcom,nq-nci";
reg = <0x28>;
qcom,nq-irq = <&tlmm 92 0x00>;
qcom,nq-ven = <&tlmm 12 0x00>;
qcom,nq-firm = <&tlmm 93 0x00>;
qcom,nq-clkreq = <&pm8998_gpios 21 0x00>;
qcom,nq-esepwr = <&tlmm 116 0x00>;
interrupt-parent = <&tlmm>;
qcom,clk-src = "BBCLK3";
interrupts = <92 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
clocks = <&clock_gcc clk_ln_bb_clk3_pin>;
clock-names = "ref_clk";
};
};
&mdss_hdmi_tx {
status = "disabled";
pinctrl-names = "hdmi_hpd_active", "hdmi_ddc_active", "hdmi_cec_active",
"hdmi_active", "hdmi_sleep";
pinctrl-0 = <&mdss_hdmi_5v_active &mdss_hdmi_hpd_active
&mdss_hdmi_ddc_suspend &mdss_hdmi_cec_suspend>;
pinctrl-1 = <&mdss_hdmi_5v_active &mdss_hdmi_hpd_active
&mdss_hdmi_ddc_active &mdss_hdmi_cec_suspend>;
pinctrl-2 = <&mdss_hdmi_5v_active &mdss_hdmi_hpd_active
&mdss_hdmi_cec_active &mdss_hdmi_ddc_suspend>;
pinctrl-3 = <&mdss_hdmi_5v_active &mdss_hdmi_hpd_active
&mdss_hdmi_ddc_active &mdss_hdmi_cec_active>;
pinctrl-4 = <&mdss_hdmi_5v_suspend &mdss_hdmi_hpd_suspend
&mdss_hdmi_ddc_suspend &mdss_hdmi_cec_suspend>;
};
&mdss_dp_ctrl {
status = "disabled";
pinctrl-names = "mdss_dp_active", "mdss_dp_sleep";
pinctrl-0 = <&mdss_dp_aux_active &mdss_dp_usbplug_cc_active>;
pinctrl-1 = <&mdss_dp_aux_suspend &mdss_dp_usbplug_cc_suspend>;
qcom,aux-en-gpio = <&tlmm 77 0>;
qcom,aux-sel-gpio = <&tlmm 78 0>;
qcom,usbplug-cc-gpio = <&tlmm 38 0>;
};
&mdss_mdp {
qcom,mdss-pref-prim-intf = "dsi";
};
&mdss_dsi {
hw-config = "split_dsi";
};
&mem_client_3_size {
qcom,peripheral-size = <0x500000>;
};
&pmi8998_haptics {
status = "okay";
};
&pm8998_vadc {
chan@83 {
label = "vph_pwr";
reg = <0x83>;
qcom,decimation = <2>;
qcom,pre-div-channel-scaling = <1>;
qcom,calibration-type = "absolute";
qcom,scale-function = <0>;
qcom,hw-settle-time = <0>;
qcom,fast-avg-setup = <0>;
};
chan@85 {
label = "vcoin";
reg = <0x85>;
qcom,decimation = <2>;
qcom,pre-div-channel-scaling = <1>;
qcom,calibration-type = "absolute";
qcom,scale-function = <0>;
qcom,hw-settle-time = <0>;
qcom,fast-avg-setup = <0>;
};
chan@4c {
label = "xo_therm";
reg = <0x4c>;
qcom,decimation = <2>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "ratiometric";
qcom,scale-function = <4>;
qcom,hw-settle-time = <2>;
qcom,fast-avg-setup = <0>;
};
chan@4d {
label = "msm_therm";
reg = <0x4d>;
qcom,decimation = <2>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "ratiometric";
qcom,scale-function = <2>;
qcom,hw-settle-time = <2>;
qcom,fast-avg-setup = <0>;
};
chan@51 {
label = "quiet_therm";
reg = <0x51>;
qcom,decimation = <2>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "ratiometric";
qcom,scale-function = <2>;
qcom,hw-settle-time = <2>;
qcom,fast-avg-setup = <0>;
};
};
&pm8998_adc_tm {
chan@83 {
label = "vph_pwr";
reg = <0x83>;
qcom,pre-div-channel-scaling = <1>;
qcom,calibration-type = "absolute";
qcom,scale-function = <0>;
qcom,hw-settle-time = <0>;
qcom,btm-channel-number = <0x60>;
};
chan@4d {
label = "msm_therm";
reg = <0x4d>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "ratiometric";
qcom,scale-function = <2>;
qcom,hw-settle-time = <2>;
qcom,btm-channel-number = <0x68>;
qcom,thermal-node;
};
chan@51 {
label = "quiet_therm";
reg = <0x51>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "ratiometric";
qcom,scale-function = <2>;
qcom,hw-settle-time = <2>;
qcom,btm-channel-number = <0x70>;
qcom,thermal-node;
};
chan@4c {
label = "xo_therm";
reg = <0x4c>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "ratiometric";
qcom,scale-function = <4>;
qcom,hw-settle-time = <2>;
qcom,btm-channel-number = <0x78>;
qcom,thermal-node;
};
};
&wil6210 {
status = "ok";
};
&soc {
gpio_keys {
compatible = "gpio-keys";
input-name = "gpio-keys";
status = "okay";
home {
label = "home";
gpios = <&pm8998_gpios 5 0x1>;
linux,input-type = <1>;
linux,code = <158>;
gpio-key,wakeup;
debounce-interval = <15>;
};
vol_up {
label = "volume_up";
gpios = <&pm8998_gpios 6 0x1>;
linux,input-type = <1>;
linux,code = <115>;
gpio-key,wakeup;
debounce-interval = <15>;
};
vol_down {
label = "volume_down";
gpios = <&pm8998_gpios 7 0x1>;
linux,input-type = <1>;
linux,code = <114>;
gpio-key,wakeup;
debounce-interval = <15>;
};
confirm {
label = "confirm_key";
gpios = <&pm8998_gpios 8 0x1>;
linux,input-type = <1>;
linux,code = <28>;
gpio-key,wakeup;
debounce-interval = <15>;
};
};
};
&pmi8998_fg {
qcom,battery-data = <&svr20_batterydata>;
qcom,fg-force-load-profile;
};

2
arch/arm/boot/dts/qcom/msm8998-v2.dtsi
View file

@ -436,7 +436,7 @@
0x9ac 0x00 0x00
0x8a0 0x01 0x00
0x9e0 0x00 0x00
0x9dc 0x01 0x00
0x9dc 0x20 0x00
0x9a8 0x00 0x00
0x8a4 0x01 0x00
0x8a8 0x73 0x00

10
arch/arm/boot/dts/qcom/msm8998.dtsi
View file

@ -2366,6 +2366,10 @@
hyplog-size-offset = <0x414>; /* 0x066BFB34 */
};
qcom_msmhdcp: qcom,msm_hdcp {
compatible = "qcom,msm-hdcp";
};
qcom_crypto: qcrypto@1DE0000 {
compatible = "qcom,qcrypto";
reg = <0x1DE0000 0x20000>,
@ -2671,7 +2675,7 @@
0x9ac 0x00 0x00
0x8a0 0x01 0x00
0x9e0 0x00 0x00
0x9dc 0x01 0x00
0x9dc 0x20 0x00
0x9a8 0x00 0x00
0x8a4 0x01 0x00
0x8a8 0x73 0x00
@ -3059,8 +3063,8 @@
qcom,msm-core@780000 {
compatible = "qcom,apss-core-ea";
reg = <0x780000 0x1000>;
qcom,low-hyst-temp = <10>;
qcom,high-hyst-temp = <5>;
qcom,low-hyst-temp = <100>;
qcom,high-hyst-temp = <100>;
qcom,polling-interval = <50>;
ea0: ea0 {

13
arch/arm/boot/dts/qcom/sda630-pm660a-qrd-hdk.dts
View file

@ -60,6 +60,19 @@
/delete-node/ &tasha_hph_en0;
/delete-node/ &tasha_hph_en1;
&qusb_phy0 {
qcom,qusb-phy-init-seq = <0xf8 0x80
0xb3 0x84
0x83 0x88
0xc7 0x8c
0x30 0x08
0x79 0x0c
0x21 0x10
0x14 0x9c
0x9f 0x1c
0x00 0x18>;
};
&tasha_snd {
qcom,model = "sdm660-tasha-skus-snd-card";
qcom,audio-routing =

19
arch/arm/boot/dts/qcom/sda660-pm660a-qrd-hdk.dts
View file

@ -170,6 +170,15 @@
qcom,mdss-pref-prim-intf = "dsi";
};
&mdss_dp_ctrl {
pinctrl-names = "mdss_dp_active", "mdss_dp_sleep";
pinctrl-0 = <&mdss_dp_aux_active &mdss_dp_usbplug_cc_active>;
pinctrl-1 = <&mdss_dp_aux_suspend &mdss_dp_usbplug_cc_suspend>;
qcom,aux-en-gpio = <&tlmm 55 0>;
qcom,aux-sel-gpio = <&tlmm 56 0>;
qcom,usbplug-cc-gpio = <&tlmm 58 0>;
};
&mdss_dsi {
hw-config = "single_dsi";
};
@ -218,4 +227,14 @@
<0x00188018 0x4>;
reg-names = "qusb_phy_base",
"ref_clk_addr";
qcom,qusb-phy-init-seq = <0xf8 0x80
0xb3 0x84
0x83 0x88
0xc7 0x8c
0x30 0x08
0x79 0x0c
0x21 0x10
0x14 0x9c
0x9f 0x1c
0x00 0x18>;
};

1
arch/arm/boot/dts/qcom/sdm630-gpu.dtsi
View file

@ -152,6 +152,7 @@
qcom,gpu-mempool@1 {
reg = <1>;
qcom,mempool-page-size = <65536>;
qcom,mempool-allocate;
};
};

2
arch/arm/boot/dts/qcom/sdm630-pm.dtsi
View file

@ -343,6 +343,7 @@
<0x02 216>, /* tsens1_tsens_upper_lower_int */
<0x31 212>, /* usb30_power_event_irq */
<0x34 275>, /* qmp_usb3_lfps_rxterm_irq_cx */
<0x3d 209>, /* lpi_dir_conn_irq_apps[1] */
<0x4f 379>, /* qusb2phy_intr */
<0x57 358>, /* ee0_apps_hlos_spmi_periph_irq */
<0x5b 519>, /* lpass_pmu_tmr_timeout_irq_cx */
@ -480,7 +481,6 @@
<0xff 206>, /* rpm_ipc[22] */
<0xff 207>, /* rpm_ipc[23] */
<0xff 208>, /* lpi_dir_conn_irq_apps[0] */
<0xff 209>, /* lpi_dir_conn_irq_apps[1] */
<0xff 210>, /* lpi_dir_conn_irq_apps[2] */
<0xff 213>, /* secure_wdog_bark_irq */
<0xff 214>, /* tsens1_tsens_max_min_int */

47
arch/arm/boot/dts/qcom/sdm630.dtsi
View file

@ -299,21 +299,44 @@
soc: soc { };
firmware: firmware {
android {
compatible = "android,firmware";
fstab {
compatible = "android,fstab";
vendor {
compatible = "android,vendor";
dev = "/dev/block/platform/soc/c0c4000.sdhci/by-name/vendor";
type = "ext4";
mnt_flags = "ro,barrier=1,discard";
fsmgr_flags = "wait,slotselect";
status = "ok";
};
};
};
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
removed_region0: removed_region0@85800000 {
wlan_msa_guard: wlan_msa_guard@85600000 {
compatible = "removed-dma-pool";
no-map;
reg = <0x0 0x85800000 0x0 0x700000>;
reg = <0x0 0x85600000 0x0 0x100000>;
};
removed_region1: removed_region1@86000000 {
wlan_msa_mem: wlan_msa_mem@85700000 {
compatible = "removed-dma-pool";
no-map;
reg = <0x0 0x86000000 0x0 0x2f00000>;
reg = <0x0 0x85700000 0x0 0x100000>;
};
removed_region: removed_region0@85800000 {
compatible = "removed-dma-pool";
no-map;
reg = <0x0 0x85800000 0x0 0x3700000>;
};
modem_fw_mem: modem_fw_region@8ac00000 {
@ -590,6 +613,7 @@
compatible = "qcom,memshare-peripheral";
qcom,peripheral-size = <0x0>;
qcom,client-id = <1>;
qcom,allocate-boot-time;
label = "modem";
};
};
@ -794,8 +818,8 @@
qcom,msm-core@780000 {
compatible = "qcom,apss-core-ea";
reg = <0x780000 0x1000>;
qcom,low-hyst-temp = <10>;
qcom,high-hyst-temp = <5>;
qcom,low-hyst-temp = <100>;
qcom,high-hyst-temp = <100>;
ea0: ea0 {
sensor = <&sensor_information3>;
@ -1142,8 +1166,9 @@
< 1113600 762 >,
< 1344000 2086 >,
< 1670400 2929 >,
< 2150400 3879 >,
< 2380800 4943 >;
< 1881600 3879 >,
< 2150400 4943 >,
< 2380800 5163 >;
};
devfreq_memlat_4: qcom,arm-memlat-mon-4 {
@ -1263,9 +1288,9 @@
};
};
qcom,rmtfs_sharedmem@0 {
qcom,rmtfs_sharedmem@85e00000 {
compatible = "qcom,sharedmem-uio";
reg = <0x0 0x200000>;
reg = <0x85e00000 0x200000>;
reg-names = "rmtfs";
qcom,client-id = <0x00000001>;
};
@ -1657,6 +1682,7 @@
qcom,vdd-1.3-rfa-config = <1200000 1370000>;
qcom,vdd-3.3-ch0-config = <3200000 3400000>;
qcom,wlan-msa-memory = <0x100000>;
qcom,wlan-msa-fixed-region = <&wlan_msa_mem>;
qcom,smmu-s1-bypass;
};
@ -2006,6 +2032,7 @@
qcom,qsee-ce-hw-instance = <0>;
qcom,disk-encrypt-pipe-pair = <2>;
qcom,support-fde;
qcom,fde-key-size;
qcom,no-clock-support;
qcom,msm-bus,name = "qseecom-noc";
qcom,msm-bus,num-cases = <4>;

79
arch/arm/boot/dts/qcom/sdm660-camera-sensor-cdp.dtsi
View file

@ -29,6 +29,16 @@
qcom,switch-source = <&pm660l_switch1>;
status = "ok";
};
cam_actuator_regulator: cam_actuator_fixed_regulator {
compatible = "regulator-fixed";
regulator-name = "cam_actuator_regulator";
regulator-min-microvolt = <3600000>;
regulator-max-microvolt = <3600000>;
enable-active-high;
gpio = <&tlmm 50 0>;
vin-supply = <&pm660l_bob>;
};
};
&cci {
@ -37,14 +47,11 @@
reg = <0x0>;
compatible = "qcom,actuator";
qcom,cci-master = <0>;
gpios = <&tlmm 50 0>;
qcom,gpio-vaf = <0>;
qcom,gpio-req-tbl-num = <0>;
qcom,gpio-req-tbl-flags = <0>;
qcom,gpio-req-tbl-label = "CAM_VAF";
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_actuator_vaf_active>;
pinctrl-1 = <&cam_actuator_vaf_suspend>;
cam_vaf-supply = <&cam_actuator_regulator>;
qcom,cam-vreg-name = "cam_vaf";
qcom,cam-vreg-min-voltage = <3600000>;
qcom,cam-vreg-max-voltage = <3600000>;
qcom,cam-vreg-op-mode = <0>;
};
actuator1: qcom,actuator@1 {
@ -52,14 +59,11 @@
reg = <0x1>;
compatible = "qcom,actuator";
qcom,cci-master = <1>;
gpios = <&tlmm 50 0>;
qcom,gpio-vaf = <0>;
qcom,gpio-req-tbl-num = <0>;
qcom,gpio-req-tbl-flags = <0>;
qcom,gpio-req-tbl-label = "CAM_VAF";
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_actuator_vaf_active>;
pinctrl-1 = <&cam_actuator_vaf_suspend>;
cam_vaf-supply = <&cam_actuator_regulator>;
qcom,cam-vreg-name = "cam_vaf";
qcom,cam-vreg-min-voltage = <3600000>;
qcom,cam-vreg-max-voltage = <3600000>;
qcom,cam-vreg-op-mode = <0>;
};
actuator2: qcom,actuator@2 {
@ -67,14 +71,11 @@
reg = <0x2>;
compatible = "qcom,actuator";
qcom,cci-master = <1>;
gpios = <&tlmm 50 0>;
qcom,gpio-vaf = <0>;
qcom,gpio-req-tbl-num = <0>;
qcom,gpio-req-tbl-flags = <0>;
qcom,gpio-req-tbl-label = "CAM_VAF";
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_actuator_vaf_active>;
pinctrl-1 = <&cam_actuator_vaf_suspend>;
cam_vaf-supply = <&cam_actuator_regulator>;
qcom,cam-vreg-name = "cam_vaf";
qcom,cam-vreg-min-voltage = <3600000>;
qcom,cam-vreg-max-voltage = <3600000>;
qcom,cam-vreg-op-mode = <0>;
};
ois0: qcom,ois@0 {
@ -82,15 +83,31 @@
reg = <0x0>;
compatible = "qcom,ois";
qcom,cci-master = <0>;
gpios = <&tlmm 50 0>;
qcom,gpio-vaf = <0>;
cam_vaf-supply = <&cam_actuator_regulator>;
qcom,cam-vreg-name = "cam_vaf";
qcom,cam-vreg-min-voltage = <3600000>;
qcom,cam-vreg-max-voltage = <3600000>;
qcom,cam-vreg-op-mode = <0>;
status = "disabled";
};
tof0: qcom,tof@29{
cell-index = <0>;
reg = <0x29>;
compatible = "st,stmvl53l0";
qcom,cci-master = <0>;
cam_laser-supply = <&cam_actuator_regulator>;
qcom,cam-vreg-name = "cam_laser";
qcom,cam-vreg-min-voltage = <3600000>;
qcom,cam-vreg-max-voltage = <3600000>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_tof_active>;
pinctrl-1 = <&cam_tof_suspend>;
stm,irq-gpio = <&tlmm 45 0x2008>;
gpios = <&tlmm 42 0>;
qcom,gpio-req-tbl-num = <0>;
qcom,gpio-req-tbl-flags = <0>;
qcom,gpio-req-tbl-label = "CAM_VAF";
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_actuator_vaf_active>;
pinctrl-1 = <&cam_actuator_vaf_suspend>;
status = "disabled";
qcom,gpio-req-tbl-label = "RNG_EN";
};
eeprom0: qcom,eeprom@0 {

79
arch/arm/boot/dts/qcom/sdm660-camera-sensor-mtp.dtsi
View file

@ -40,6 +40,16 @@
vin-supply = <&pm660l_bob>;
};
cam_actuator_regulator: cam_actuator_fixed_regulator {
compatible = "regulator-fixed";
regulator-name = "cam_actuator_regulator";
regulator-min-microvolt = <3600000>;
regulator-max-microvolt = <3600000>;
enable-active-high;
gpio = <&tlmm 50 0>;
vin-supply = <&pm660l_bob>;
};
cam_dvdd_gpio_regulator: cam_dvdd_fixed_regulator {
compatible = "regulator-fixed";
regulator-name = "cam_dvdd_gpio_regulator";
@ -67,14 +77,11 @@
reg = <0x0>;
compatible = "qcom,actuator";
qcom,cci-master = <0>;
gpios = <&tlmm 50 0>;
qcom,gpio-vaf = <0>;
qcom,gpio-req-tbl-num = <0>;
qcom,gpio-req-tbl-flags = <0>;
qcom,gpio-req-tbl-label = "CAM_VAF";
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_actuator_vaf_active>;
pinctrl-1 = <&cam_actuator_vaf_suspend>;
cam_vaf-supply = <&cam_actuator_regulator>;
qcom,cam-vreg-name = "cam_vaf";
qcom,cam-vreg-min-voltage = <3600000>;
qcom,cam-vreg-max-voltage = <3600000>;
qcom,cam-vreg-op-mode = <0>;
};
actuator1: qcom,actuator@1 {
@ -82,14 +89,11 @@
reg = <0x1>;
compatible = "qcom,actuator";
qcom,cci-master = <1>;
gpios = <&tlmm 50 0>;
qcom,gpio-vaf = <0>;
qcom,gpio-req-tbl-num = <0>;
qcom,gpio-req-tbl-flags = <0>;
qcom,gpio-req-tbl-label = "CAM_VAF";
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_actuator_vaf_active>;
pinctrl-1 = <&cam_actuator_vaf_suspend>;
cam_vaf-supply = <&cam_actuator_regulator>;
qcom,cam-vreg-name = "cam_vaf";
qcom,cam-vreg-min-voltage = <3600000>;
qcom,cam-vreg-max-voltage = <3600000>;
qcom,cam-vreg-op-mode = <0>;
};
actuator2: qcom,actuator@2 {
@ -97,14 +101,11 @@
reg = <0x2>;
compatible = "qcom,actuator";
qcom,cci-master = <1>;
gpios = <&tlmm 50 0>;
qcom,gpio-vaf = <0>;
qcom,gpio-req-tbl-num = <0>;
qcom,gpio-req-tbl-flags = <0>;
qcom,gpio-req-tbl-label = "CAM_VAF";
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_actuator_vaf_active>;
pinctrl-1 = <&cam_actuator_vaf_suspend>;
cam_vaf-supply = <&cam_actuator_regulator>;
qcom,cam-vreg-name = "cam_vaf";
qcom,cam-vreg-min-voltage = <3600000>;
qcom,cam-vreg-max-voltage = <3600000>;
qcom,cam-vreg-op-mode = <0>;
};
ois0: qcom,ois@0 {
@ -112,15 +113,31 @@
reg = <0x0>;
compatible = "qcom,ois";
qcom,cci-master = <0>;
gpios = <&tlmm 50 0>;
qcom,gpio-vaf = <0>;
cam_vaf-supply = <&cam_actuator_regulator>;
qcom,cam-vreg-name = "cam_vaf";
qcom,cam-vreg-min-voltage = <3600000>;
qcom,cam-vreg-max-voltage = <3600000>;
qcom,cam-vreg-op-mode = <0>;
status = "disabled";
};
tof0: qcom,tof@29{
cell-index = <0>;
reg = <0x29>;
compatible = "st,stmvl53l0";
qcom,cci-master = <0>;
cam_laser-supply = <&cam_actuator_regulator>;
qcom,cam-vreg-name = "cam_laser";
qcom,cam-vreg-min-voltage = <3600000>;
qcom,cam-vreg-max-voltage = <3600000>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_tof_active>;
pinctrl-1 = <&cam_tof_suspend>;
stm,irq-gpio = <&tlmm 45 0x2008>;
gpios = <&tlmm 42 0>;
qcom,gpio-req-tbl-num = <0>;
qcom,gpio-req-tbl-flags = <0>;
qcom,gpio-req-tbl-label = "CAM_VAF";
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_actuator_vaf_active>;
pinctrl-1 = <&cam_actuator_vaf_suspend>;
status = "disabled";
qcom,gpio-req-tbl-label = "RNG_EN";
};
eeprom0: qcom,eeprom@0 {

84
arch/arm/boot/dts/qcom/sdm660-camera-sensor-qrd.dtsi
View file

@ -40,6 +40,16 @@
gpio = <&tlmm 50 0>;
vin-supply = <&pm660l_bob>;
};
cam_rear_dvdd_gpio_regulator: cam_rear_dvdd_fixed_regulator {
compatible = "regulator-fixed";
regulator-name = "cam_rear_dvdd_gpio_regulator";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
enable-active-high;
gpio = <&pm660l_gpios 4 0>;
vin-supply = <&pm660_s5>;
};
};
&tlmm {
@ -172,10 +182,10 @@
compatible = "qcom,eeprom";
cam_vio-supply = <&pm660_l11>;
cam_vana-supply = <&cam_avdd_gpio_regulator>;
cam_vdig-supply = <&pm660_s5>;
cam_vdig-supply = <&cam_rear_dvdd_gpio_regulator>;
qcom,cam-vreg-name = "cam_vio", "cam_vana", "cam_vdig";
qcom,cam-vreg-min-voltage = <1780000 0 1350000>;
qcom,cam-vreg-max-voltage = <1950000 0 1350000>;
qcom,cam-vreg-min-voltage = <1780000 0 0>;
qcom,cam-vreg-max-voltage = <1950000 0 0>;
qcom,cam-vreg-op-mode = <105000 0 105000>;
qcom,gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
@ -184,15 +194,12 @@
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_rear_suspend>;
gpios = <&tlmm 32 0>,
<&tlmm 46 0>,
<&pm660l_gpios 4 0>;
<&tlmm 46 0>;
qcom,gpio-reset = <1>;
qcom,gpio-vdig = <2>;
qcom,gpio-req-tbl-num = <0 1 1>;
qcom,gpio-req-tbl-flags = <1 0 0>;
qcom,gpio-req-tbl-num = <0 1>;
qcom,gpio-req-tbl-flags = <1 0>;
qcom,gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET0",
"CAM_VDIG";
"CAM_RESET0";
qcom,sensor-position = <0>;
qcom,sensor-mode = <0>;
qcom,cci-master = <0>;
@ -209,11 +216,11 @@
compatible = "qcom,eeprom";
cam_vio-supply = <&pm660_l11>;
cam_vana-supply = <&cam_avdd_gpio_regulator>;
cam_vdig-supply = <&pm660_s5>;
cam_vdig-supply = <&cam_rear_dvdd_gpio_regulator>;
qcom,cam-vreg-name = "cam_vio", "cam_vana", "cam_vdig";
qcom,cam-vreg-min-voltage = <1780000 0 1350000>;
qcom,cam-vreg-max-voltage = <1950000 0 1350000>;
qcom,cam-vreg-op-mode = <105000 0 105000>;
qcom,cam-vreg-min-voltage = <1780000 0 0>;
qcom,cam-vreg-max-voltage = <1950000 0 0>;
qcom,cam-vreg-op-mode = <105000 0 0>;
qcom,gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
@ -221,15 +228,12 @@
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_rear2_suspend>;
gpios = <&tlmm 34 0>,
<&tlmm 48 0>,
<&pm660l_gpios 4 0>;
<&tlmm 48 0>;
qcom,gpio-reset = <1>;
qcom,gpio-vdig = <2>;
qcom,gpio-req-tbl-num = <0 1 1>;
qcom,gpio-req-tbl-flags = <1 0 0>;
qcom,gpio-req-tbl-num = <0 1>;
qcom,gpio-req-tbl-flags = <1 0>;
qcom,gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1",
"CAM_VDIG";
"CAM_RESET1";
qcom,sensor-position = <0>;
qcom,sensor-mode = <0>;
qcom,cci-master = <1>;
@ -290,11 +294,11 @@
qcom,eeprom-src = <&eeprom0>;
cam_vio-supply = <&pm660_l11>;
cam_vana-supply = <&cam_avdd_gpio_regulator>;
cam_vdig-supply = <&pm660_s5>;
cam_vdig-supply = <&cam_rear_dvdd_gpio_regulator>;
qcom,cam-vreg-name = "cam_vio", "cam_vana", "cam_vdig";
qcom,cam-vreg-min-voltage = <1780000 0 1350000>;
qcom,cam-vreg-max-voltage = <1950000 0 1350000>;
qcom,cam-vreg-op-mode = <105000 0 105000>;
qcom,cam-vreg-min-voltage = <1780000 0 0>;
qcom,cam-vreg-max-voltage = <1950000 0 0>;
qcom,cam-vreg-op-mode = <105000 0 0>;
qcom,gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
@ -302,15 +306,12 @@
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_rear_suspend>;
gpios = <&tlmm 32 0>,
<&tlmm 46 0>,
<&pm660l_gpios 4 0>;
<&tlmm 46 0>;
qcom,gpio-reset = <1>;
qcom,gpio-vdig = <2>;
qcom,gpio-req-tbl-num = <0 1 1>;
qcom,gpio-req-tbl-flags = <1 0 0>;
qcom,gpio-req-tbl-num = <0 1>;
qcom,gpio-req-tbl-flags = <1 0>;
qcom,gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET0",
"CAM_VDIG";
"CAM_RESET0";
qcom,sensor-position = <0>;
qcom,sensor-mode = <0>;
qcom,cci-master = <0>;
@ -333,11 +334,11 @@
qcom,eeprom-src = <&eeprom1>;
cam_vio-supply = <&pm660_l11>;
cam_vana-supply = <&cam_avdd_gpio_regulator>;
cam_vdig-supply = <&pm660_s5>;
cam_vdig-supply = <&cam_rear_dvdd_gpio_regulator>;
qcom,cam-vreg-name = "cam_vio", "cam_vana", "cam_vdig";
qcom,cam-vreg-min-voltage = <1780000 0 1350000>;
qcom,cam-vreg-max-voltage = <1950000 0 1350000>;
qcom,cam-vreg-op-mode = <105000 0 105000>;
qcom,cam-vreg-min-voltage = <1780000 0 0>;
qcom,cam-vreg-max-voltage = <1950000 0 0>;
qcom,cam-vreg-op-mode = <105000 0 0>;
qcom,gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
@ -345,15 +346,12 @@
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_rear2_suspend>;
gpios = <&tlmm 34 0>,
<&tlmm 48 0>,
<&pm660l_gpios 4 0>;
<&tlmm 48 0>;
qcom,gpio-reset = <1>;
qcom,gpio-vdig = <2>;
qcom,gpio-req-tbl-num = <0 1 1>;
qcom,gpio-req-tbl-flags = <1 0 0>;
qcom,gpio-req-tbl-num = <0 1>;
qcom,gpio-req-tbl-flags = <1 0>;
qcom,gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1",
"CAM_VDIG";
"CAM_RESET1";
qcom,sensor-position = <0>;
qcom,sensor-mode = <0>;
qcom,cci-master = <1>;

5
arch/arm/boot/dts/qcom/sdm660-common.dtsi
View file

@ -108,6 +108,7 @@
lanes-per-direction = <1>;
non-removable;
qcom,msm-bus,name = "ufs1";
qcom,msm-bus,num-cases = <12>;
qcom,msm-bus,num-paths = <2>;
@ -268,14 +269,18 @@
compatible = "qcom,qusb2phy";
reg = <0x0c012000 0x180>,
<0x01fcb24c 0x4>,
<0x00780240 0x4>,
<0x00188018 0x4>;
reg-names = "qusb_phy_base",
"tcsr_clamp_dig_n_1p8",
"tune2_efuse_addr",
"ref_clk_addr";
vdd-supply = <&pm660l_l1>;
vdda18-supply = <&pm660_l10>;
vdda33-supply = <&pm660l_l7>;
qcom,vdd-voltage-level = <0 925000 925000>;
qcom,tune2-efuse-bit-pos = <25>;
qcom,tune2-efuse-num-bits = <4>;
qcom,qusb-phy-init-seq = <0xf8 0x80
0xb3 0x84
0x83 0x88

1
arch/arm/boot/dts/qcom/sdm660-gpu.dtsi
View file

@ -158,6 +158,7 @@
qcom,gpu-mempool@1 {
reg = <1>;
qcom,mempool-page-size = <65536>;
qcom,mempool-allocate;
};
};

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