arch/tile: big-endian: properly bswap instruction bundles when backtracing
Instruction bundles are always little-endian, even when running in big-endian mode. I missed this internal bug fix when cherry-picking the big-endian code to return to the community. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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1 changed files with 7 additions and 2 deletions
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@ -14,6 +14,7 @@
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#include <linux/kernel.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/string.h>
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#include <asm/byteorder.h>
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#include <asm/backtrace.h>
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#include <asm/backtrace.h>
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#include <asm/tile-desc.h>
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#include <asm/tile-desc.h>
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#include <arch/abi.h>
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#include <arch/abi.h>
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@ -336,8 +337,12 @@ static void find_caller_pc_and_caller_sp(CallerLocation *location,
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bytes_to_prefetch / sizeof(tile_bundle_bits);
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bytes_to_prefetch / sizeof(tile_bundle_bits);
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}
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}
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/* Decode the next bundle. */
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/*
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bundle.bits = prefetched_bundles[next_bundle++];
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* Decode the next bundle.
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* TILE always stores instruction bundles in little-endian
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* mode, even when the chip is running in big-endian mode.
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*/
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bundle.bits = le64_to_cpu(prefetched_bundles[next_bundle++]);
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bundle.num_insns =
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bundle.num_insns =
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parse_insn_tile(bundle.bits, pc, bundle.insns);
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parse_insn_tile(bundle.bits, pc, bundle.insns);
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num_info_ops = bt_get_info_ops(&bundle, info_operands);
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num_info_ops = bt_get_info_ops(&bundle, info_operands);
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