usb: phy: qmp: Select usb3 phy mode during PHY reset

commit a3e98f0134 ("usb: phy: qmp: Select usb3 phy mode before
initializing PHY") moved the USB/DP mode selection to just prior
to performing PHY initialization. This resolved initialization
failure however it still may fail to result in SuperSpeed
enumeration on when first switching from DP back to USB3 mode.
According to HW documentation the correct place to perform the
mode switch is while the PHY is under reset, so move this step
to msm_ssphy_qmp_reset().

Change-Id: Ia540b3793440e1d203b79cf129a9e80ad2b0e3e9
Signed-off-by: Jack Pham <jackp@codeaurora.org>
This commit is contained in:
Jack Pham 2017-03-22 12:03:53 -07:00
parent 25ed77f5bb
commit 9f5b3e1ea4

View file

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. * Copyright (c) 2013-2017, The Linux Foundation. All rights reserved.
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and * it under the terms of the GNU General Public License version 2 and
@ -307,10 +307,6 @@ static int msm_ssphy_qmp_init(struct usb_phy *uphy)
phy->clk_enabled = true; phy->clk_enabled = true;
} }
/* select usb3 phy mode */
if (phy->tcsr_usb3_dp_phymode)
writel_relaxed(0x0, phy->tcsr_usb3_dp_phymode);
writel_relaxed(0x01, writel_relaxed(0x01,
phy->base + phy->phy_reg[USB3_PHY_POWER_DOWN_CONTROL]); phy->base + phy->phy_reg[USB3_PHY_POWER_DOWN_CONTROL]);
@ -386,6 +382,10 @@ static int msm_ssphy_qmp_reset(struct usb_phy *uphy)
goto deassert_phy_phy_reset; goto deassert_phy_phy_reset;
} }
/* select usb3 phy mode */
if (phy->tcsr_usb3_dp_phymode)
writel_relaxed(0x0, phy->tcsr_usb3_dp_phymode);
/* Deassert USB3 PHY CSR reset */ /* Deassert USB3 PHY CSR reset */
ret = reset_control_deassert(phy->phy_reset); ret = reset_control_deassert(phy->phy_reset);
if (ret) { if (ret) {