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ARM: dts: msm: Add sdhc1 for sdm660 MTP/CDP

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Add sdhc1 to support eMMC for sdm660 mtp and
cdp platforms. Also add some missing device
properties for sdm660 simulator and rumi platforms.

Change-Id: I4bea35ebea8e710d82724a3d5098d952b71875f4
Signed-off-by: Sayali Lokhande <sayalil@codeaurora.org>
This commit is contained in:
Sayali Lokhande 2016-12-28 14:48:38 +05:30
parent 98a47a0419
commit a0130eccd3
5 changed files with 70 additions and 3 deletions
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26
arch/arm/boot/dts/qcom/sdm660-cdp.dtsi
View file

@ -88,6 +88,32 @@
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
};
&sdhc_1 {
/* device core power supply */
vdd-supply = <&pm660l_l4>;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <200 570000>;
/* device communication power supply */
vdd-io-supply = <&pm660_l8>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <200 325000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;
qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 192000000
384000000>;
qcom,nonremovable;
qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v";
status = "ok";
};
&soc {
qcom,msm-ssc-sensors {
compatible = "qcom,msm-ssc-sensors";

26
arch/arm/boot/dts/qcom/sdm660-mtp.dtsi
View file

@ -88,6 +88,32 @@
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
};
&sdhc_1 {
/* device core power supply */
vdd-supply = <&pm660l_l4>;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <200 570000>;
/* device communication power supply */
vdd-io-supply = <&pm660_l8>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <200 325000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;
qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 192000000
384000000>;
qcom,nonremovable;
qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v";
status = "ok";
};
&soc {
qcom,msm-ssc-sensors {
compatible = "qcom,msm-ssc-sensors";

2
arch/arm/boot/dts/qcom/sdm660-rumi.dts
View file

@ -84,7 +84,7 @@
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;
qcom,clk-rates = <400000 20000000 25000000 50000000 192000000
qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 192000000
384000000>;
qcom,nonremovable;

2
arch/arm/boot/dts/qcom/sdm660-sim.dts
View file

@ -68,7 +68,7 @@
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;
qcom,clk-rates = <400000 20000000 25000000 50000000 192000000
qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 192000000
384000000>;
qcom,nonremovable;

17
arch/arm/boot/dts/qcom/sdm660.dtsi
View file

@ -1183,7 +1183,7 @@
reg = <0xc0c4000 0x1000>, <0xc0c5000 0x1000>;
reg-names = "hc_mem", "cmdq_mem";
interrupts = <0 129 0>, <0 227 0>;
interrupts = <0 110 0>, <0 112 0>;
interrupt-names = "hc_irq", "pwr_irq";
qcom,bus-width = <8>;
@ -1191,6 +1191,21 @@
qcom,devfreq,freq-table = <50000000 200000000>;
qcom,msm-bus,name = "sdhc1";
qcom,msm-bus,num-cases = <9>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
<78 512 1046 3200>, /* 400 KB/s*/
<78 512 52286 160000>, /* 20 MB/s */
<78 512 65360 200000>, /* 25 MB/s */
<78 512 130718 400000>, /* 50 MB/s */
<78 512 130718 400000>, /* 100 MB/s */
<78 512 261438 800000>, /* 200 MB/s */
<78 512 261438 800000>, /* 400 MB/s */
<78 512 1338562 4096000>; /* Max. bandwidth */
qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
100000000 200000000 400000000 4294967295>;
clocks = <&clock_gcc GCC_SDCC1_AHB_CLK>,
<&clock_gcc GCC_SDCC1_APPS_CLK>;
clock-names = "iface_clk", "core_clk";