drm/i915: kill ranged cpu read domain support
No longer needed. Tested-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2 changed files with 0 additions and 124 deletions
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@ -927,13 +927,6 @@ struct drm_i915_gem_object {
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/** Record of address bit 17 of each page at last unbind. */
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/** Record of address bit 17 of each page at last unbind. */
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unsigned long *bit_17;
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unsigned long *bit_17;
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/**
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* If present, while GEM_DOMAIN_CPU is in the read domain this array
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* flags which individual pages are valid.
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*/
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uint8_t *page_cpu_valid;
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/** User space pin count and filp owning the pin */
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/** User space pin count and filp owning the pin */
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uint32_t user_pin_count;
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uint32_t user_pin_count;
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struct drm_file *pin_filp;
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struct drm_file *pin_filp;
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@ -39,10 +39,6 @@
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static __must_check int i915_gem_object_flush_gpu_write_domain(struct drm_i915_gem_object *obj);
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static __must_check int i915_gem_object_flush_gpu_write_domain(struct drm_i915_gem_object *obj);
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static void i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj);
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static void i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj);
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static void i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj);
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static void i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj);
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static __must_check int i915_gem_object_set_cpu_read_domain_range(struct drm_i915_gem_object *obj,
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uint64_t offset,
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uint64_t size);
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static void i915_gem_object_set_to_full_cpu_read_domain(struct drm_i915_gem_object *obj);
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static __must_check int i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
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static __must_check int i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
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unsigned alignment,
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unsigned alignment,
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bool map_and_fenceable);
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bool map_and_fenceable);
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@ -2990,11 +2986,6 @@ i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj, bool write)
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i915_gem_object_flush_gtt_write_domain(obj);
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i915_gem_object_flush_gtt_write_domain(obj);
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/* If we have a partially-valid cache of the object in the CPU,
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* finish invalidating it and free the per-page flags.
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*/
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i915_gem_object_set_to_full_cpu_read_domain(obj);
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old_write_domain = obj->base.write_domain;
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old_write_domain = obj->base.write_domain;
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old_read_domains = obj->base.read_domains;
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old_read_domains = obj->base.read_domains;
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@ -3025,113 +3016,6 @@ i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj, bool write)
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return 0;
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return 0;
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}
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}
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/**
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* Moves the object from a partially CPU read to a full one.
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*
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* Note that this only resolves i915_gem_object_set_cpu_read_domain_range(),
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* and doesn't handle transitioning from !(read_domains & I915_GEM_DOMAIN_CPU).
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*/
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static void
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i915_gem_object_set_to_full_cpu_read_domain(struct drm_i915_gem_object *obj)
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{
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if (!obj->page_cpu_valid)
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return;
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/* If we're partially in the CPU read domain, finish moving it in.
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*/
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if (obj->base.read_domains & I915_GEM_DOMAIN_CPU) {
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int i;
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for (i = 0; i <= (obj->base.size - 1) / PAGE_SIZE; i++) {
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if (obj->page_cpu_valid[i])
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continue;
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drm_clflush_pages(obj->pages + i, 1);
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}
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}
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/* Free the page_cpu_valid mappings which are now stale, whether
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* or not we've got I915_GEM_DOMAIN_CPU.
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*/
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kfree(obj->page_cpu_valid);
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obj->page_cpu_valid = NULL;
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}
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/**
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* Set the CPU read domain on a range of the object.
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*
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* The object ends up with I915_GEM_DOMAIN_CPU in its read flags although it's
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* not entirely valid. The page_cpu_valid member of the object flags which
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* pages have been flushed, and will be respected by
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* i915_gem_object_set_to_cpu_domain() if it's called on to get a valid mapping
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* of the whole object.
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*
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* This function returns when the move is complete, including waiting on
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* flushes to occur.
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*/
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static int
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i915_gem_object_set_cpu_read_domain_range(struct drm_i915_gem_object *obj,
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uint64_t offset, uint64_t size)
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{
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uint32_t old_read_domains;
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int i, ret;
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if (offset == 0 && size == obj->base.size)
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return i915_gem_object_set_to_cpu_domain(obj, 0);
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ret = i915_gem_object_flush_gpu_write_domain(obj);
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if (ret)
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return ret;
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ret = i915_gem_object_wait_rendering(obj);
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if (ret)
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return ret;
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i915_gem_object_flush_gtt_write_domain(obj);
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/* If we're already fully in the CPU read domain, we're done. */
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if (obj->page_cpu_valid == NULL &&
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(obj->base.read_domains & I915_GEM_DOMAIN_CPU) != 0)
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return 0;
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/* Otherwise, create/clear the per-page CPU read domain flag if we're
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* newly adding I915_GEM_DOMAIN_CPU
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*/
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if (obj->page_cpu_valid == NULL) {
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obj->page_cpu_valid = kzalloc(obj->base.size / PAGE_SIZE,
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GFP_KERNEL);
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if (obj->page_cpu_valid == NULL)
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return -ENOMEM;
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} else if ((obj->base.read_domains & I915_GEM_DOMAIN_CPU) == 0)
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memset(obj->page_cpu_valid, 0, obj->base.size / PAGE_SIZE);
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/* Flush the cache on any pages that are still invalid from the CPU's
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* perspective.
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*/
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for (i = offset / PAGE_SIZE; i <= (offset + size - 1) / PAGE_SIZE;
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i++) {
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if (obj->page_cpu_valid[i])
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continue;
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drm_clflush_pages(obj->pages + i, 1);
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obj->page_cpu_valid[i] = 1;
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}
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/* It should now be out of any other write domains, and we can update
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* the domain values for our changes.
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*/
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BUG_ON((obj->base.write_domain & ~I915_GEM_DOMAIN_CPU) != 0);
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old_read_domains = obj->base.read_domains;
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obj->base.read_domains |= I915_GEM_DOMAIN_CPU;
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trace_i915_gem_object_change_domain(obj,
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old_read_domains,
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obj->base.write_domain);
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return 0;
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}
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/* Throttle our rendering by waiting until the ring has completed our requests
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/* Throttle our rendering by waiting until the ring has completed our requests
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* emitted over 20 msec ago.
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* emitted over 20 msec ago.
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*
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*
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@ -3556,7 +3440,6 @@ static void i915_gem_free_object_tail(struct drm_i915_gem_object *obj)
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drm_gem_object_release(&obj->base);
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drm_gem_object_release(&obj->base);
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i915_gem_info_remove_obj(dev_priv, obj->base.size);
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i915_gem_info_remove_obj(dev_priv, obj->base.size);
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kfree(obj->page_cpu_valid);
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kfree(obj->bit_17);
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kfree(obj->bit_17);
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kfree(obj);
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kfree(obj);
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}
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}
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