Merge "arm64: SW PAN: Update saved ttbr0 value on enter_lazy_tlb"
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commit
a0befb254e
1 changed files with 10 additions and 14 deletions
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@ -165,20 +165,6 @@ void check_and_switch_context(struct mm_struct *mm, unsigned int cpu);
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#define init_new_context(tsk,mm) ({ atomic64_set(&(mm)->context.id, 0); 0; })
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/*
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* This is called when "tsk" is about to enter lazy TLB mode.
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*
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* mm: describes the currently active mm context
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* tsk: task which is entering lazy tlb
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* cpu: cpu number which is entering lazy tlb
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*
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* tsk->mm will be NULL
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*/
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static inline void
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enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
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{
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}
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#ifdef CONFIG_ARM64_SW_TTBR0_PAN
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static inline void update_saved_ttbr0(struct task_struct *tsk,
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struct mm_struct *mm)
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@ -202,6 +188,16 @@ static inline void update_saved_ttbr0(struct task_struct *tsk,
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}
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#endif
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static inline void
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enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
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{
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/*
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* We don't actually care about the ttbr0 mapping, so point it at the
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* zero page.
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*/
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update_saved_ttbr0(tsk, &init_mm);
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}
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static inline void __switch_mm(struct mm_struct *next)
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{
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unsigned int cpu = smp_processor_id();
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