staging: comedi: ni_stc.h: tidy up AI_Command_2_Register and bits
Rename the CamelCase. Use the BIT() macro to define the bits. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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2 changed files with 25 additions and 25 deletions
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@ -316,7 +316,7 @@ struct mio_regmap {
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static const struct mio_regmap m_series_stc_write_regmap[] = {
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static const struct mio_regmap m_series_stc_write_regmap[] = {
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[NISTC_INTA_ACK_REG] = { 0x104, 2 },
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[NISTC_INTA_ACK_REG] = { 0x104, 2 },
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[NISTC_INTB_ACK_REG] = { 0x106, 2 },
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[NISTC_INTB_ACK_REG] = { 0x106, 2 },
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[AI_Command_2_Register] = { 0x108, 2 },
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[NISTC_AI_CMD2_REG] = { 0x108, 2 },
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[AO_Command_2_Register] = { 0x10a, 2 },
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[AO_Command_2_Register] = { 0x10a, 2 },
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[G_Command_Register(0)] = { 0x10c, 2 },
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[G_Command_Register(0)] = { 0x10c, 2 },
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[G_Command_Register(1)] = { 0x10e, 2 },
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[G_Command_Register(1)] = { 0x10e, 2 },
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@ -1315,8 +1315,8 @@ static void ni_handle_eos(struct comedi_device *dev, struct comedi_subdevice *s)
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s->async->events |= COMEDI_CB_EOS;
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s->async->events |= COMEDI_CB_EOS;
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#endif
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#endif
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}
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}
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/* handle special case of single scan using AI_End_On_End_Of_Scan */
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/* handle special case of single scan */
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if ((devpriv->ai_cmd2 & AI_End_On_End_Of_Scan))
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if (devpriv->ai_cmd2 & NISTC_AI_CMD2_END_ON_EOS)
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shutdown_ai_command(dev);
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shutdown_ai_command(dev);
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}
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}
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@ -2253,8 +2253,8 @@ static int ni_ai_inttrig(struct comedi_device *dev,
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if (trig_num != cmd->start_arg)
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if (trig_num != cmd->start_arg)
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return -EINVAL;
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return -EINVAL;
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ni_stc_writew(dev, AI_START1_Pulse | devpriv->ai_cmd2,
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ni_stc_writew(dev, NISTC_AI_CMD2_START1_PULSE | devpriv->ai_cmd2,
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AI_Command_2_Register);
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NISTC_AI_CMD2_REG);
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s->async->inttrig = NULL;
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s->async->inttrig = NULL;
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return 1;
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return 1;
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@ -2344,7 +2344,7 @@ static int ni_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
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ni_stc_writew(dev, AI_SC_Load, AI_Command_1_Register);
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ni_stc_writew(dev, AI_SC_Load, AI_Command_1_Register);
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if (stop_count == 0) {
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if (stop_count == 0) {
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devpriv->ai_cmd2 |= AI_End_On_End_Of_Scan;
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devpriv->ai_cmd2 |= NISTC_AI_CMD2_END_ON_EOS;
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interrupt_a_enable |= AI_STOP_Interrupt_Enable;
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interrupt_a_enable |= AI_STOP_Interrupt_Enable;
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/* this is required to get the last sample for chanlist_len > 1, not sure why */
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/* this is required to get the last sample for chanlist_len > 1, not sure why */
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if (cmd->chanlist_len > 1)
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if (cmd->chanlist_len > 1)
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@ -2460,8 +2460,8 @@ static int ni_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
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interrupt_a_enable |= AI_FIFO_Interrupt_Enable;
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interrupt_a_enable |= AI_FIFO_Interrupt_Enable;
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#endif
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#endif
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if (cmd->flags & CMDF_WAKE_EOS
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if ((cmd->flags & CMDF_WAKE_EOS) ||
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|| (devpriv->ai_cmd2 & AI_End_On_End_Of_Scan)) {
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(devpriv->ai_cmd2 & NISTC_AI_CMD2_END_ON_EOS)) {
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/* wake on end-of-scan */
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/* wake on end-of-scan */
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devpriv->aimode = AIMODE_SCAN;
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devpriv->aimode = AIMODE_SCAN;
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} else {
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} else {
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@ -2537,9 +2537,9 @@ static int ni_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
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#endif
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#endif
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if (cmd->start_src == TRIG_NOW) {
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if (cmd->start_src == TRIG_NOW) {
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/* AI_START1_Pulse */
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ni_stc_writew(dev, NISTC_AI_CMD2_START1_PULSE |
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ni_stc_writew(dev, AI_START1_Pulse | devpriv->ai_cmd2,
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devpriv->ai_cmd2,
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AI_Command_2_Register);
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NISTC_AI_CMD2_REG);
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s->async->inttrig = NULL;
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s->async->inttrig = NULL;
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} else if (cmd->start_src == TRIG_EXT) {
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} else if (cmd->start_src == TRIG_EXT) {
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s->async->inttrig = NULL;
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s->async->inttrig = NULL;
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@ -95,6 +95,20 @@
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NISTC_INTB_ACK_AO_BC_TC_ERR | \
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NISTC_INTB_ACK_AO_BC_TC_ERR | \
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NISTC_INTB_ACK_AO_BC_TC_TRIG_ERR)
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NISTC_INTB_ACK_AO_BC_TC_TRIG_ERR)
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#define NISTC_AI_CMD2_REG 4
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#define NISTC_AI_CMD2_END_ON_SC_TC BIT(15)
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#define NISTC_AI_CMD2_END_ON_EOS BIT(14)
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#define NISTC_AI_CMD2_START1_DISABLE BIT(11)
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#define NISTC_AI_CMD2_SC_SAVE_TRACE BIT(10)
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#define NISTC_AI_CMD2_SI_SW_ON_SC_TC BIT(9)
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#define NISTC_AI_CMD2_SI_SW_ON_STOP BIT(8)
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#define NISTC_AI_CMD2_SI_SW_ON_TC BIT(7)
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#define NISTC_AI_CMD2_SC_SW_ON_TC BIT(4)
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#define NISTC_AI_CMD2_STOP_PULSE BIT(3)
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#define NISTC_AI_CMD2_START_PULSE BIT(2)
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#define NISTC_AI_CMD2_START2_PULSE BIT(1)
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#define NISTC_AI_CMD2_START1_PULSE BIT(0)
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#define AI_Status_1_Register 2
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#define AI_Status_1_Register 2
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#define Interrupt_A_St 0x8000
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#define Interrupt_A_St 0x8000
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#define AI_FIFO_Full_St 0x4000
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#define AI_FIFO_Full_St 0x4000
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@ -133,20 +147,6 @@
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#define AO_FIFO_Request_St _bit1
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#define AO_FIFO_Request_St _bit1
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#define Pass_Thru_1_Interrupt_St _bit0
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#define Pass_Thru_1_Interrupt_St _bit0
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#define AI_Command_2_Register 4
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#define AI_End_On_SC_TC _bit15
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#define AI_End_On_End_Of_Scan _bit14
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#define AI_START1_Disable _bit11
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#define AI_SC_Save_Trace _bit10
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#define AI_SI_Switch_Load_On_SC_TC _bit9
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#define AI_SI_Switch_Load_On_STOP _bit8
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#define AI_SI_Switch_Load_On_TC _bit7
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#define AI_SC_Switch_Load_On_TC _bit4
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#define AI_STOP_Pulse _bit3
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#define AI_START_Pulse _bit2
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#define AI_START2_Pulse _bit1
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#define AI_START1_Pulse _bit0
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#define AO_Command_2_Register 5
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#define AO_Command_2_Register 5
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#define AO_End_On_BC_TC(x) (((x) & 0x3) << 14)
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#define AO_End_On_BC_TC(x) (((x) & 0x3) << 14)
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#define AO_Start_Stop_Gate_Enable _bit13
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#define AO_Start_Stop_Gate_Enable _bit13
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