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mmc: sdhci-msm: Dont enable PWRSAVE_DLL for certain sdhc hosts

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SDHC core with new 14lpp tech DLL should not enable
PWRSAVE_DLL since such controller's internal gating
cannot meet following MCLK requirement:
when MCLK is gated OFF, it is not gated for less than 0.5us
and MCLK must be switched on for at-least 1us before DATA
starts coming.
Add support for this new requirement.

Change-Id: Ief03926e0b9c6ff2f6335a422c576dd489fba9d5
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
This commit is contained in:
Ritesh Harjani 2015-05-13 14:14:45 +05:30 • committed by Subhash Jadavani
parent 5dddfdcab8
commit a5b878365a
1 changed files with 25 additions and 4 deletions
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23
drivers/mmc/host/sdhci-msm.c
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@ -323,6 +323,7 @@ struct sdhci_msm_host {
atomic_t controller_clock;
bool use_cdclp533;
bool use_updated_dll_reset;
bool use_14lpp_dll;
u32 caps_0;
};
@ -881,6 +882,8 @@ out:
static int sdhci_msm_cm_dll_sdc4_calibration(struct sdhci_host *host)
{
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct sdhci_msm_host *msm_host = pltfm_host->priv;
u32 dll_status;
int ret = 0;
@ -910,7 +913,15 @@ static int sdhci_msm_cm_dll_sdc4_calibration(struct sdhci_host *host)
goto out;
}
/* set CORE_PWRSAVE_DLL bit in CORE_VENDOR_SPEC3 */
/*
* set CORE_PWRSAVE_DLL bit in CORE_VENDOR_SPEC3.
* when MCLK is gated OFF, it is not gated for less than 0.5us
* and MCLK must be switched on for at-least 1us before DATA
* starts coming. Controllers with 14lpp tech DLL cannot
* guarantee above requirement. So PWRSAVE_DLL should not be
* turned on for host controllers using this DLL.
*/
if (!msm_host->use_14lpp_dll)
writel_relaxed((readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC3)
| CORE_PWRSAVE_DLL),
host->ioaddr + CORE_VENDOR_SPEC3);
@ -2872,6 +2883,16 @@ static void sdhci_set_default_hw_caps(struct sdhci_msm_host *msm_host,
if ((major == 1) && (minor >= 0x42))
msm_host->use_updated_dll_reset = true;
/*
* SDCC 5 controller with major version 1 and minor version 0x42
* currently uses 14lpp tech DLL whose internal gating cannot
* guarantee MCLK timing requirement i.e.
* when MCLK is gated OFF, it is not gated for less than 0.5us
* and MCLK must be switched on for at-least 1us before DATA
* starts coming.
*/
if ((major == 1) && (minor == 0x42))
msm_host->use_14lpp_dll = true;
/*
* Mask 64-bit support for controller with 32-bit address bus so that
* smaller descriptor size will be used and improve memory consumption.