evie/android_kernel_oneplus_msm8998
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

drm/amdgpu: use PT for VM sync on unmap

Browse source 
Instead of the array which is used for ID management.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
This commit is contained in:
Christian König 2015-09-01 15:33:25 +02:00 • committed by Alex Deucher
parent c9f0fe5e19
commit a60c42320b
1 changed files with 6 additions and 13 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

19
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
View file

@ -627,9 +627,14 @@ static int amdgpu_vm_update_ptes(struct amdgpu_device *adev,
{ {
uint64_t mask = AMDGPU_VM_PTE_COUNT - 1; uint64_t mask = AMDGPU_VM_PTE_COUNT - 1;
uint64_t last_pte = ~0, last_dst = ~0; uint64_t last_pte = ~0, last_dst = ~0;
void *owner = AMDGPU_FENCE_OWNER_VM;
unsigned count = 0; unsigned count = 0;
uint64_t addr; uint64_t addr;
/* sync to everything on unmapping */
if (!(flags & AMDGPU_PTE_VALID))
owner = AMDGPU_FENCE_OWNER_UNDEFINED;
/* walk over the address space and update the page tables */ /* walk over the address space and update the page tables */
for (addr = start; addr < end; ) { for (addr = start; addr < end; ) {
uint64_t pt_idx = addr >> amdgpu_vm_block_size; uint64_t pt_idx = addr >> amdgpu_vm_block_size;
@ -638,8 +643,7 @@ static int amdgpu_vm_update_ptes(struct amdgpu_device *adev,
uint64_t pte; uint64_t pte;
int r; int r;
amdgpu_sync_resv(adev, &ib->sync, pt->tbo.resv, amdgpu_sync_resv(adev, &ib->sync, pt->tbo.resv, owner);
AMDGPU_FENCE_OWNER_VM);
r = reservation_object_reserve_shared(pt->tbo.resv); r = reservation_object_reserve_shared(pt->tbo.resv);
if (r) if (r)
return r; return r;
@ -790,17 +794,6 @@ static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
ib->length_dw = 0; ib->length_dw = 0;
if (!(flags & AMDGPU_PTE_VALID)) {
unsigned i;
for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
struct amdgpu_fence *f = vm->ids[i].last_id_use;
r = amdgpu_sync_fence(adev, &ib->sync, &f->base);
if (r)
return r;
}
}
r = amdgpu_vm_update_ptes(adev, vm, ib, mapping->it.start, r = amdgpu_vm_update_ptes(adev, vm, ib, mapping->it.start,
mapping->it.last + 1, addr + mapping->offset, mapping->it.last + 1, addr + mapping->offset,
flags, gtt_flags); flags, gtt_flags);