Merge branch 'linux-linaro-lsk-v4.4' into linux-linaro-lsk-v4.4-android
This commit is contained in:
commit
a66f9577c6
122 changed files with 838 additions and 425 deletions
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@ -81,9 +81,9 @@ pm8916:
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|||
l14, l15, l16, l17, l18
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pm8941:
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s1, s2, s3, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14,
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l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, lvs1, lvs2, lvs3,
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mvs1, mvs2
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s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13,
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l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, lvs1, lvs2, lvs3,
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5vs1, 5vs2
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The content of each sub-node is defined by the standard binding for regulators -
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see regulator.txt - with additional custom properties described below:
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@ -831,7 +831,7 @@ separate memory range only intended for GPIO driving, and the register
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range dealing with pin config and pin multiplexing get placed into a
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different memory range and a separate section of the data sheet.
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A flag "strict" in struct pinctrl_desc is available to check and deny
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A flag "strict" in struct pinmux_ops is available to check and deny
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simultaneous access to the same pin from GPIO and pin multiplexing
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consumers on hardware of this type. The pinctrl driver should set this flag
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accordingly.
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2
Makefile
2
Makefile
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@ -1,6 +1,6 @@
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VERSION = 4
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PATCHLEVEL = 4
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SUBLEVEL = 23
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SUBLEVEL = 25
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EXTRAVERSION =
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NAME = Blurry Fish Butt
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@ -776,7 +776,7 @@ __armv7_mmu_cache_on:
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orrne r0, r0, #1 @ MMU enabled
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movne r1, #0xfffffffd @ domain 0 = client
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bic r6, r6, #1 << 31 @ 32-bit translation system
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bic r6, r6, #3 << 0 @ use only ttbr0
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bic r6, r6, #(7 << 0) | (1 << 4) @ use only ttbr0
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mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer
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mcrne p15, 0, r0, c8, c7, 0 @ flush I,D TLBs
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mcr p15, 0, r0, c7, c5, 4 @ ISB
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@ -47,6 +47,8 @@
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#include "armada-39x.dtsi"
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/ {
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compatible = "marvell,armada390";
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soc {
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internal-regs {
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pinctrl@18000 {
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@ -54,4 +56,5 @@
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reg = <0x18000 0x20>;
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};
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};
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};
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};
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@ -5,6 +5,7 @@
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#include <dt-bindings/reset/qcom,gcc-msm8960.h>
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#include <dt-bindings/clock/qcom,mmcc-msm8960.h>
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#include <dt-bindings/soc/qcom,gsbi.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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model = "Qualcomm APQ8064";
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@ -354,22 +355,50 @@
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compatible = "qcom,pm8921-gpio";
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reg = <0x150>;
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interrupts = <192 1>, <193 1>, <194 1>,
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<195 1>, <196 1>, <197 1>,
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<198 1>, <199 1>, <200 1>,
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<201 1>, <202 1>, <203 1>,
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<204 1>, <205 1>, <206 1>,
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<207 1>, <208 1>, <209 1>,
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<210 1>, <211 1>, <212 1>,
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<213 1>, <214 1>, <215 1>,
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<216 1>, <217 1>, <218 1>,
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<219 1>, <220 1>, <221 1>,
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<222 1>, <223 1>, <224 1>,
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<225 1>, <226 1>, <227 1>,
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<228 1>, <229 1>, <230 1>,
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<231 1>, <232 1>, <233 1>,
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<234 1>, <235 1>;
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interrupts = <192 IRQ_TYPE_NONE>,
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<193 IRQ_TYPE_NONE>,
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<194 IRQ_TYPE_NONE>,
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<195 IRQ_TYPE_NONE>,
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<196 IRQ_TYPE_NONE>,
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<197 IRQ_TYPE_NONE>,
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<198 IRQ_TYPE_NONE>,
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<199 IRQ_TYPE_NONE>,
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<200 IRQ_TYPE_NONE>,
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<201 IRQ_TYPE_NONE>,
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<202 IRQ_TYPE_NONE>,
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<203 IRQ_TYPE_NONE>,
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<204 IRQ_TYPE_NONE>,
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<205 IRQ_TYPE_NONE>,
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<206 IRQ_TYPE_NONE>,
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<207 IRQ_TYPE_NONE>,
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<208 IRQ_TYPE_NONE>,
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<209 IRQ_TYPE_NONE>,
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<210 IRQ_TYPE_NONE>,
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<211 IRQ_TYPE_NONE>,
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<212 IRQ_TYPE_NONE>,
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<213 IRQ_TYPE_NONE>,
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<214 IRQ_TYPE_NONE>,
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<215 IRQ_TYPE_NONE>,
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<216 IRQ_TYPE_NONE>,
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<217 IRQ_TYPE_NONE>,
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<218 IRQ_TYPE_NONE>,
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<219 IRQ_TYPE_NONE>,
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<220 IRQ_TYPE_NONE>,
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<221 IRQ_TYPE_NONE>,
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<222 IRQ_TYPE_NONE>,
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<223 IRQ_TYPE_NONE>,
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<224 IRQ_TYPE_NONE>,
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<225 IRQ_TYPE_NONE>,
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<226 IRQ_TYPE_NONE>,
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<227 IRQ_TYPE_NONE>,
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<228 IRQ_TYPE_NONE>,
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<229 IRQ_TYPE_NONE>,
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<230 IRQ_TYPE_NONE>,
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<231 IRQ_TYPE_NONE>,
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<232 IRQ_TYPE_NONE>,
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<233 IRQ_TYPE_NONE>,
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<234 IRQ_TYPE_NONE>,
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<235 IRQ_TYPE_NONE>;
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gpio-controller;
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#gpio-cells = <2>;
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@ -381,9 +410,18 @@
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gpio-controller;
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#gpio-cells = <2>;
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interrupts =
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<128 1>, <129 1>, <130 1>, <131 1>,
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<132 1>, <133 1>, <134 1>, <135 1>,
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<136 1>, <137 1>, <138 1>, <139 1>;
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<128 IRQ_TYPE_NONE>,
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<129 IRQ_TYPE_NONE>,
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<130 IRQ_TYPE_NONE>,
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<131 IRQ_TYPE_NONE>,
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<132 IRQ_TYPE_NONE>,
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<133 IRQ_TYPE_NONE>,
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<134 IRQ_TYPE_NONE>,
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<135 IRQ_TYPE_NONE>,
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<136 IRQ_TYPE_NONE>,
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<137 IRQ_TYPE_NONE>,
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<138 IRQ_TYPE_NONE>,
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<139 IRQ_TYPE_NONE>;
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};
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rtc@11d {
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@ -83,7 +83,7 @@
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trips {
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cpu_alert0: cpu_alert0 {
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/* milliCelsius */
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temperature = <850000>;
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temperature = <85000>;
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hysteresis = <2000>;
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type = "passive";
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};
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@ -869,9 +869,9 @@ struct sa1111_save_data {
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#ifdef CONFIG_PM
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static int sa1111_suspend(struct platform_device *dev, pm_message_t state)
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static int sa1111_suspend_noirq(struct device *dev)
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{
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struct sa1111 *sachip = platform_get_drvdata(dev);
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struct sa1111 *sachip = dev_get_drvdata(dev);
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struct sa1111_save_data *save;
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unsigned long flags;
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unsigned int val;
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@ -934,9 +934,9 @@ static int sa1111_suspend(struct platform_device *dev, pm_message_t state)
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* restored by their respective drivers, and must be called
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* via LDM after this function.
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*/
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static int sa1111_resume(struct platform_device *dev)
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static int sa1111_resume_noirq(struct device *dev)
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{
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struct sa1111 *sachip = platform_get_drvdata(dev);
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struct sa1111 *sachip = dev_get_drvdata(dev);
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struct sa1111_save_data *save;
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unsigned long flags, id;
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void __iomem *base;
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@ -952,7 +952,7 @@ static int sa1111_resume(struct platform_device *dev)
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id = sa1111_readl(sachip->base + SA1111_SKID);
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if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
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__sa1111_remove(sachip);
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platform_set_drvdata(dev, NULL);
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dev_set_drvdata(dev, NULL);
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kfree(save);
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return 0;
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}
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@ -1003,8 +1003,8 @@ static int sa1111_resume(struct platform_device *dev)
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}
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#else
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#define sa1111_suspend NULL
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#define sa1111_resume NULL
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#define sa1111_suspend_noirq NULL
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#define sa1111_resume_noirq NULL
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#endif
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static int sa1111_probe(struct platform_device *pdev)
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@ -1038,6 +1038,11 @@ static int sa1111_remove(struct platform_device *pdev)
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return 0;
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}
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static struct dev_pm_ops sa1111_pm_ops = {
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.suspend_noirq = sa1111_suspend_noirq,
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.resume_noirq = sa1111_resume_noirq,
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};
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/*
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* Not sure if this should be on the system bus or not yet.
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* We really want some way to register a system device at
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@ -1050,10 +1055,9 @@ static int sa1111_remove(struct platform_device *pdev)
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static struct platform_driver sa1111_device_driver = {
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.probe = sa1111_probe,
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.remove = sa1111_remove,
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.suspend = sa1111_suspend,
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.resume = sa1111_resume,
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.driver = {
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.name = "sa1111",
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.pm = &sa1111_pm_ops,
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},
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};
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@ -119,7 +119,7 @@ static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
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/* The ARM override for dma_max_pfn() */
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static inline unsigned long dma_max_pfn(struct device *dev)
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{
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return PHYS_PFN_OFFSET + dma_to_pfn(dev, *dev->dma_mask);
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return dma_to_pfn(dev, *dev->dma_mask);
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}
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#define dma_max_pfn(dev) dma_max_pfn(dev)
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|
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@ -87,6 +87,8 @@ void __init arm_dt_init_cpu_maps(void)
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return;
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for_each_child_of_node(cpus, cpu) {
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const __be32 *cell;
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int prop_bytes;
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u32 hwid;
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if (of_node_cmp(cpu->type, "cpu"))
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@ -98,7 +100,8 @@ void __init arm_dt_init_cpu_maps(void)
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* properties is considered invalid to build the
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* cpu_logical_map.
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*/
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if (of_property_read_u32(cpu, "reg", &hwid)) {
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cell = of_get_property(cpu, "reg", &prop_bytes);
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if (!cell || prop_bytes < sizeof(*cell)) {
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pr_debug(" * %s missing reg property\n",
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cpu->full_name);
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of_node_put(cpu);
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|
@ -106,10 +109,15 @@ void __init arm_dt_init_cpu_maps(void)
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}
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|
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/*
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* 8 MSBs must be set to 0 in the DT since the reg property
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* Bits n:24 must be set to 0 in the DT since the reg property
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* defines the MPIDR[23:0].
|
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*/
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if (hwid & ~MPIDR_HWID_BITMASK) {
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do {
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hwid = be32_to_cpu(*cell++);
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prop_bytes -= sizeof(*cell);
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} while (!hwid && prop_bytes > 0);
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|
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if (prop_bytes || (hwid & ~MPIDR_HWID_BITMASK)) {
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of_node_put(cpu);
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return;
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}
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|
|
|
@ -125,6 +125,8 @@ static unsigned long clk_36864_get_rate(struct clk *clk)
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}
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|
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static struct clkops clk_36864_ops = {
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.enable = clk_cpu_enable,
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.disable = clk_cpu_disable,
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.get_rate = clk_36864_get_rate,
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};
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|
@ -140,9 +142,8 @@ static struct clk_lookup sa11xx_clkregs[] = {
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CLKDEV_INIT(NULL, "OSTIMER0", &clk_36864),
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};
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|
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static int __init sa11xx_clk_init(void)
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int __init sa11xx_clk_init(void)
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{
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clkdev_add_table(sa11xx_clkregs, ARRAY_SIZE(sa11xx_clkregs));
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return 0;
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}
|
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core_initcall(sa11xx_clk_init);
|
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|
|
|
@ -34,6 +34,7 @@
|
|||
|
||||
#include <mach/hardware.h>
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#include <mach/irqs.h>
|
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#include <mach/reset.h>
|
||||
|
||||
#include "generic.h"
|
||||
#include <clocksource/pxa.h>
|
||||
|
@ -95,6 +96,8 @@ static void sa1100_power_off(void)
|
|||
|
||||
void sa11x0_restart(enum reboot_mode mode, const char *cmd)
|
||||
{
|
||||
clear_reset_status(RESET_STATUS_ALL);
|
||||
|
||||
if (mode == REBOOT_SOFT) {
|
||||
/* Jump into ROM at address 0 */
|
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soft_restart(0);
|
||||
|
@ -388,6 +391,7 @@ void __init sa1100_init_irq(void)
|
|||
sa11x0_init_irq_nodt(IRQ_GPIO0_SC, irq_resource.start);
|
||||
|
||||
sa1100_init_gpio();
|
||||
sa11xx_clk_init();
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -44,3 +44,5 @@ int sa11x0_pm_init(void);
|
|||
#else
|
||||
static inline int sa11x0_pm_init(void) { return 0; }
|
||||
#endif
|
||||
|
||||
int sa11xx_clk_init(void);
|
||||
|
|
|
@ -41,40 +41,27 @@
|
|||
|
||||
#define REGULATOR_IRQ_MASK BIT(2) /* IRQ2, active low */
|
||||
|
||||
/* start of DA9210 System Control and Event Registers */
|
||||
#define DA9210_REG_MASK_A 0x54
|
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|
||||
static void __iomem *irqc;
|
||||
|
||||
static const u8 da9063_mask_regs[] = {
|
||||
DA9063_REG_IRQ_MASK_A,
|
||||
DA9063_REG_IRQ_MASK_B,
|
||||
DA9063_REG_IRQ_MASK_C,
|
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DA9063_REG_IRQ_MASK_D,
|
||||
/* first byte sets the memory pointer, following are consecutive reg values */
|
||||
static u8 da9063_irq_clr[] = { DA9063_REG_IRQ_MASK_A, 0xff, 0xff, 0xff, 0xff };
|
||||
static u8 da9210_irq_clr[] = { DA9210_REG_MASK_A, 0xff, 0xff };
|
||||
|
||||
static struct i2c_msg da9xxx_msgs[2] = {
|
||||
{
|
||||
.addr = 0x58,
|
||||
.len = ARRAY_SIZE(da9063_irq_clr),
|
||||
.buf = da9063_irq_clr,
|
||||
}, {
|
||||
.addr = 0x68,
|
||||
.len = ARRAY_SIZE(da9210_irq_clr),
|
||||
.buf = da9210_irq_clr,
|
||||
},
|
||||
};
|
||||
|
||||
/* DA9210 System Control and Event Registers */
|
||||
#define DA9210_REG_MASK_A 0x54
|
||||
#define DA9210_REG_MASK_B 0x55
|
||||
|
||||
static const u8 da9210_mask_regs[] = {
|
||||
DA9210_REG_MASK_A,
|
||||
DA9210_REG_MASK_B,
|
||||
};
|
||||
|
||||
static void da9xxx_mask_irqs(struct i2c_client *client, const u8 regs[],
|
||||
unsigned int nregs)
|
||||
{
|
||||
unsigned int i;
|
||||
|
||||
dev_info(&client->dev, "Masking %s interrupt sources\n", client->name);
|
||||
|
||||
for (i = 0; i < nregs; i++) {
|
||||
int error = i2c_smbus_write_byte_data(client, regs[i], ~0);
|
||||
if (error) {
|
||||
dev_err(&client->dev, "i2c error %d\n", error);
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static int regulator_quirk_notify(struct notifier_block *nb,
|
||||
unsigned long action, void *data)
|
||||
{
|
||||
|
@ -93,12 +80,15 @@ static int regulator_quirk_notify(struct notifier_block *nb,
|
|||
client = to_i2c_client(dev);
|
||||
dev_dbg(dev, "Detected %s\n", client->name);
|
||||
|
||||
if ((client->addr == 0x58 && !strcmp(client->name, "da9063")))
|
||||
da9xxx_mask_irqs(client, da9063_mask_regs,
|
||||
ARRAY_SIZE(da9063_mask_regs));
|
||||
else if (client->addr == 0x68 && !strcmp(client->name, "da9210"))
|
||||
da9xxx_mask_irqs(client, da9210_mask_regs,
|
||||
ARRAY_SIZE(da9210_mask_regs));
|
||||
if ((client->addr == 0x58 && !strcmp(client->name, "da9063")) ||
|
||||
(client->addr == 0x68 && !strcmp(client->name, "da9210"))) {
|
||||
int ret;
|
||||
|
||||
dev_info(&client->dev, "clearing da9063/da9210 interrupts\n");
|
||||
ret = i2c_transfer(client->adapter, da9xxx_msgs, ARRAY_SIZE(da9xxx_msgs));
|
||||
if (ret != ARRAY_SIZE(da9xxx_msgs))
|
||||
dev_err(&client->dev, "i2c error %d\n", ret);
|
||||
}
|
||||
|
||||
mon = ioread32(irqc + IRQC_MONITOR);
|
||||
if (mon & REGULATOR_IRQ_MASK)
|
||||
|
|
|
@ -422,8 +422,10 @@ int kernel_active_single_step(void)
|
|||
/* ptrace API */
|
||||
void user_enable_single_step(struct task_struct *task)
|
||||
{
|
||||
set_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);
|
||||
set_regs_spsr_ss(task_pt_regs(task));
|
||||
struct thread_info *ti = task_thread_info(task);
|
||||
|
||||
if (!test_and_set_ti_thread_flag(ti, TIF_SINGLESTEP))
|
||||
set_regs_spsr_ss(task_pt_regs(task));
|
||||
}
|
||||
|
||||
void user_disable_single_step(struct task_struct *task)
|
||||
|
|
|
@ -435,7 +435,7 @@ void __init at32_init_pio(struct platform_device *pdev)
|
|||
struct resource *regs;
|
||||
struct pio_device *pio;
|
||||
|
||||
if (pdev->id > MAX_NR_PIO_DEVICES) {
|
||||
if (pdev->id >= MAX_NR_PIO_DEVICES) {
|
||||
dev_err(&pdev->dev, "only %d PIO devices supported\n",
|
||||
MAX_NR_PIO_DEVICES);
|
||||
return;
|
||||
|
|
|
@ -36,7 +36,6 @@ struct arch_uprobe {
|
|||
unsigned long resume_epc;
|
||||
u32 insn[2];
|
||||
u32 ixol[2];
|
||||
union mips_instruction orig_inst[MAX_UINSN_BYTES / 4];
|
||||
};
|
||||
|
||||
struct arch_uprobe_task {
|
||||
|
|
|
@ -157,7 +157,6 @@ bool is_trap_insn(uprobe_opcode_t *insn)
|
|||
int arch_uprobe_pre_xol(struct arch_uprobe *aup, struct pt_regs *regs)
|
||||
{
|
||||
struct uprobe_task *utask = current->utask;
|
||||
union mips_instruction insn;
|
||||
|
||||
/*
|
||||
* Now find the EPC where to resume after the breakpoint has been
|
||||
|
@ -168,10 +167,10 @@ int arch_uprobe_pre_xol(struct arch_uprobe *aup, struct pt_regs *regs)
|
|||
unsigned long epc;
|
||||
|
||||
epc = regs->cp0_epc;
|
||||
__compute_return_epc_for_insn(regs, insn);
|
||||
__compute_return_epc_for_insn(regs,
|
||||
(union mips_instruction) aup->insn[0]);
|
||||
aup->resume_epc = regs->cp0_epc;
|
||||
}
|
||||
|
||||
utask->autask.saved_trap_nr = current->thread.trap_nr;
|
||||
current->thread.trap_nr = UPROBE_TRAP_NR;
|
||||
regs->cp0_epc = current->utask->xol_vaddr;
|
||||
|
@ -257,7 +256,7 @@ unsigned long arch_uretprobe_hijack_return_addr(
|
|||
ra = regs->regs[31];
|
||||
|
||||
/* Replace the return address with the trampoline address */
|
||||
regs->regs[31] = ra;
|
||||
regs->regs[31] = trampoline_vaddr;
|
||||
|
||||
return ra;
|
||||
}
|
||||
|
@ -280,24 +279,6 @@ int __weak set_swbp(struct arch_uprobe *auprobe, struct mm_struct *mm,
|
|||
return uprobe_write_opcode(mm, vaddr, UPROBE_SWBP_INSN);
|
||||
}
|
||||
|
||||
/**
|
||||
* set_orig_insn - Restore the original instruction.
|
||||
* @mm: the probed process address space.
|
||||
* @auprobe: arch specific probepoint information.
|
||||
* @vaddr: the virtual address to insert the opcode.
|
||||
*
|
||||
* For mm @mm, restore the original opcode (opcode) at @vaddr.
|
||||
* Return 0 (success) or a negative errno.
|
||||
*
|
||||
* This overrides the weak version in kernel/events/uprobes.c.
|
||||
*/
|
||||
int set_orig_insn(struct arch_uprobe *auprobe, struct mm_struct *mm,
|
||||
unsigned long vaddr)
|
||||
{
|
||||
return uprobe_write_opcode(mm, vaddr,
|
||||
*(uprobe_opcode_t *)&auprobe->orig_inst[0].word);
|
||||
}
|
||||
|
||||
void __weak arch_uprobe_copy_ixol(struct page *page, unsigned long vaddr,
|
||||
void *src, unsigned long len)
|
||||
{
|
||||
|
|
|
@ -807,6 +807,47 @@ enum emulation_result kvm_mips_emul_tlbr(struct kvm_vcpu *vcpu)
|
|||
return EMULATE_FAIL;
|
||||
}
|
||||
|
||||
/**
|
||||
* kvm_mips_invalidate_guest_tlb() - Indicates a change in guest MMU map.
|
||||
* @vcpu: VCPU with changed mappings.
|
||||
* @tlb: TLB entry being removed.
|
||||
*
|
||||
* This is called to indicate a single change in guest MMU mappings, so that we
|
||||
* can arrange TLB flushes on this and other CPUs.
|
||||
*/
|
||||
static void kvm_mips_invalidate_guest_tlb(struct kvm_vcpu *vcpu,
|
||||
struct kvm_mips_tlb *tlb)
|
||||
{
|
||||
int cpu, i;
|
||||
bool user;
|
||||
|
||||
/* No need to flush for entries which are already invalid */
|
||||
if (!((tlb->tlb_lo[0] | tlb->tlb_lo[1]) & ENTRYLO_V))
|
||||
return;
|
||||
/* User address space doesn't need flushing for KSeg2/3 changes */
|
||||
user = tlb->tlb_hi < KVM_GUEST_KSEG0;
|
||||
|
||||
preempt_disable();
|
||||
|
||||
/*
|
||||
* Probe the shadow host TLB for the entry being overwritten, if one
|
||||
* matches, invalidate it
|
||||
*/
|
||||
kvm_mips_host_tlb_inv(vcpu, tlb->tlb_hi);
|
||||
|
||||
/* Invalidate the whole ASID on other CPUs */
|
||||
cpu = smp_processor_id();
|
||||
for_each_possible_cpu(i) {
|
||||
if (i == cpu)
|
||||
continue;
|
||||
if (user)
|
||||
vcpu->arch.guest_user_asid[i] = 0;
|
||||
vcpu->arch.guest_kernel_asid[i] = 0;
|
||||
}
|
||||
|
||||
preempt_enable();
|
||||
}
|
||||
|
||||
/* Write Guest TLB Entry @ Index */
|
||||
enum emulation_result kvm_mips_emul_tlbwi(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
|
@ -826,11 +867,8 @@ enum emulation_result kvm_mips_emul_tlbwi(struct kvm_vcpu *vcpu)
|
|||
}
|
||||
|
||||
tlb = &vcpu->arch.guest_tlb[index];
|
||||
/*
|
||||
* Probe the shadow host TLB for the entry being overwritten, if one
|
||||
* matches, invalidate it
|
||||
*/
|
||||
kvm_mips_host_tlb_inv(vcpu, tlb->tlb_hi);
|
||||
|
||||
kvm_mips_invalidate_guest_tlb(vcpu, tlb);
|
||||
|
||||
tlb->tlb_mask = kvm_read_c0_guest_pagemask(cop0);
|
||||
tlb->tlb_hi = kvm_read_c0_guest_entryhi(cop0);
|
||||
|
@ -859,11 +897,7 @@ enum emulation_result kvm_mips_emul_tlbwr(struct kvm_vcpu *vcpu)
|
|||
|
||||
tlb = &vcpu->arch.guest_tlb[index];
|
||||
|
||||
/*
|
||||
* Probe the shadow host TLB for the entry being overwritten, if one
|
||||
* matches, invalidate it
|
||||
*/
|
||||
kvm_mips_host_tlb_inv(vcpu, tlb->tlb_hi);
|
||||
kvm_mips_invalidate_guest_tlb(vcpu, tlb);
|
||||
|
||||
tlb->tlb_mask = kvm_read_c0_guest_pagemask(cop0);
|
||||
tlb->tlb_hi = kvm_read_c0_guest_entryhi(cop0);
|
||||
|
@ -982,6 +1016,7 @@ enum emulation_result kvm_mips_emulate_CP0(uint32_t inst, uint32_t *opc,
|
|||
int32_t rt, rd, copz, sel, co_bit, op;
|
||||
uint32_t pc = vcpu->arch.pc;
|
||||
unsigned long curr_pc;
|
||||
int cpu, i;
|
||||
|
||||
/*
|
||||
* Update PC and hold onto current PC in case there is
|
||||
|
@ -1089,8 +1124,16 @@ enum emulation_result kvm_mips_emulate_CP0(uint32_t inst, uint32_t *opc,
|
|||
vcpu->arch.gprs[rt]
|
||||
& ASID_MASK);
|
||||
|
||||
preempt_disable();
|
||||
/* Blow away the shadow host TLBs */
|
||||
kvm_mips_flush_host_tlb(1);
|
||||
cpu = smp_processor_id();
|
||||
for_each_possible_cpu(i)
|
||||
if (i != cpu) {
|
||||
vcpu->arch.guest_user_asid[i] = 0;
|
||||
vcpu->arch.guest_kernel_asid[i] = 0;
|
||||
}
|
||||
preempt_enable();
|
||||
}
|
||||
kvm_write_c0_guest_entryhi(cop0,
|
||||
vcpu->arch.gprs[rt]);
|
||||
|
|
|
@ -39,6 +39,9 @@
|
|||
#include <linux/console.h>
|
||||
#endif
|
||||
|
||||
#define ROCIT_CONFIG_GEN0 0x1f403000
|
||||
#define ROCIT_CONFIG_GEN0_PCI_IOCU BIT(7)
|
||||
|
||||
extern void malta_be_init(void);
|
||||
extern int malta_be_handler(struct pt_regs *regs, int is_fixup);
|
||||
|
||||
|
@ -107,6 +110,8 @@ static void __init fd_activate(void)
|
|||
static int __init plat_enable_iocoherency(void)
|
||||
{
|
||||
int supported = 0;
|
||||
u32 cfg;
|
||||
|
||||
if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO) {
|
||||
if (BONITO_PCICACHECTRL & BONITO_PCICACHECTRL_CPUCOH_PRES) {
|
||||
BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_CPUCOH_EN;
|
||||
|
@ -129,7 +134,8 @@ static int __init plat_enable_iocoherency(void)
|
|||
} else if (mips_cm_numiocu() != 0) {
|
||||
/* Nothing special needs to be done to enable coherency */
|
||||
pr_info("CMP IOCU detected\n");
|
||||
if ((*(unsigned int *)0xbf403000 & 0x81) != 0x81) {
|
||||
cfg = __raw_readl((u32 *)CKSEG1ADDR(ROCIT_CONFIG_GEN0));
|
||||
if (!(cfg & ROCIT_CONFIG_GEN0_PCI_IOCU)) {
|
||||
pr_crit("IOCU OPERATION DISABLED BY SWITCH - DEFAULTING TO SW IO COHERENCY\n");
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -708,6 +708,7 @@
|
|||
#define MMCR0_FCHV 0x00000001UL /* freeze conditions in hypervisor mode */
|
||||
#define SPRN_MMCR1 798
|
||||
#define SPRN_MMCR2 785
|
||||
#define SPRN_UMMCR2 769
|
||||
#define SPRN_MMCRA 0x312
|
||||
#define MMCRA_SDSYNC 0x80000000UL /* SDAR synced with SIAR */
|
||||
#define MMCRA_SDAR_DCACHE_MISS 0x40000000UL
|
||||
|
|
|
@ -694,7 +694,7 @@ unsigned char ibm_architecture_vec[] = {
|
|||
OV4_MIN_ENT_CAP, /* minimum VP entitled capacity */
|
||||
|
||||
/* option vector 5: PAPR/OF options */
|
||||
VECTOR_LENGTH(18), /* length */
|
||||
VECTOR_LENGTH(21), /* length */
|
||||
0, /* don't ignore, don't halt */
|
||||
OV5_FEAT(OV5_LPAR) | OV5_FEAT(OV5_SPLPAR) | OV5_FEAT(OV5_LARGE_PAGES) |
|
||||
OV5_FEAT(OV5_DRCONF_MEMORY) | OV5_FEAT(OV5_DONATE_DEDICATE_CPU) |
|
||||
|
@ -725,8 +725,11 @@ unsigned char ibm_architecture_vec[] = {
|
|||
0,
|
||||
0,
|
||||
OV5_FEAT(OV5_PFO_HW_RNG) | OV5_FEAT(OV5_PFO_HW_ENCR) |
|
||||
OV5_FEAT(OV5_PFO_HW_842),
|
||||
OV5_FEAT(OV5_SUB_PROCESSORS),
|
||||
OV5_FEAT(OV5_PFO_HW_842), /* Byte 17 */
|
||||
0, /* Byte 18 */
|
||||
0, /* Byte 19 */
|
||||
0, /* Byte 20 */
|
||||
OV5_FEAT(OV5_SUB_PROCESSORS), /* Byte 21 */
|
||||
|
||||
/* option vector 6: IBM PAPR hints */
|
||||
VECTOR_LENGTH(3), /* length */
|
||||
|
|
|
@ -498,6 +498,7 @@ int kvmppc_core_emulate_mtspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
|
|||
case SPRN_MMCR0:
|
||||
case SPRN_MMCR1:
|
||||
case SPRN_MMCR2:
|
||||
case SPRN_UMMCR2:
|
||||
#endif
|
||||
break;
|
||||
unprivileged:
|
||||
|
@ -640,6 +641,7 @@ int kvmppc_core_emulate_mfspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val
|
|||
case SPRN_MMCR0:
|
||||
case SPRN_MMCR1:
|
||||
case SPRN_MMCR2:
|
||||
case SPRN_UMMCR2:
|
||||
case SPRN_TIR:
|
||||
#endif
|
||||
*spr_val = 0;
|
||||
|
|
|
@ -2033,7 +2033,7 @@ int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
|
|||
if (type == KVMPPC_DEBUG_NONE)
|
||||
continue;
|
||||
|
||||
if (type & !(KVMPPC_DEBUG_WATCH_READ |
|
||||
if (type & ~(KVMPPC_DEBUG_WATCH_READ |
|
||||
KVMPPC_DEBUG_WATCH_WRITE |
|
||||
KVMPPC_DEBUG_BREAKPOINT))
|
||||
return -EINVAL;
|
||||
|
|
|
@ -129,6 +129,7 @@ extern int dump_task_regs(struct task_struct *, elf_gregset_t *);
|
|||
struct linux_binprm;
|
||||
extern int arch_setup_additional_pages(struct linux_binprm *bprm,
|
||||
int executable_stack);
|
||||
/* update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes */
|
||||
#define ARCH_DLINFO \
|
||||
do { \
|
||||
NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_BASE); \
|
||||
|
|
|
@ -18,4 +18,6 @@
|
|||
/* The vDSO location. */
|
||||
#define AT_SYSINFO_EHDR 33
|
||||
|
||||
#define AT_VECTOR_SIZE_ARCH 1 /* entries in ARCH_DLINFO */
|
||||
|
||||
#endif /* _ASM_TILE_AUXVEC_H */
|
||||
|
|
|
@ -32,7 +32,7 @@ DECLARE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate);
|
|||
/* Initialize cr4 shadow for this CPU. */
|
||||
static inline void cr4_init_shadow(void)
|
||||
{
|
||||
this_cpu_write(cpu_tlbstate.cr4, __read_cr4());
|
||||
this_cpu_write(cpu_tlbstate.cr4, __read_cr4_safe());
|
||||
}
|
||||
|
||||
/* Set in this cpu's CR4. */
|
||||
|
|
|
@ -659,11 +659,28 @@ void irq_complete_move(struct irq_cfg *cfg)
|
|||
*/
|
||||
void irq_force_complete_move(struct irq_desc *desc)
|
||||
{
|
||||
struct irq_data *irqdata = irq_desc_get_irq_data(desc);
|
||||
struct apic_chip_data *data = apic_chip_data(irqdata);
|
||||
struct irq_cfg *cfg = data ? &data->cfg : NULL;
|
||||
struct irq_data *irqdata;
|
||||
struct apic_chip_data *data;
|
||||
struct irq_cfg *cfg;
|
||||
unsigned int cpu;
|
||||
|
||||
/*
|
||||
* The function is called for all descriptors regardless of which
|
||||
* irqdomain they belong to. For example if an IRQ is provided by
|
||||
* an irq_chip as part of a GPIO driver, the chip data for that
|
||||
* descriptor is specific to the irq_chip in question.
|
||||
*
|
||||
* Check first that the chip_data is what we expect
|
||||
* (apic_chip_data) before touching it any further.
|
||||
*/
|
||||
irqdata = irq_domain_get_irq_data(x86_vector_domain,
|
||||
irq_desc_get_irq(desc));
|
||||
if (!irqdata)
|
||||
return;
|
||||
|
||||
data = apic_chip_data(irqdata);
|
||||
cfg = data ? &data->cfg : NULL;
|
||||
|
||||
if (!cfg)
|
||||
return;
|
||||
|
||||
|
|
|
@ -737,21 +737,20 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
|
|||
identify_cpu_without_cpuid(c);
|
||||
|
||||
/* cyrix could have cpuid enabled via c_identify()*/
|
||||
if (!have_cpuid_p())
|
||||
return;
|
||||
if (have_cpuid_p()) {
|
||||
cpu_detect(c);
|
||||
get_cpu_vendor(c);
|
||||
get_cpu_cap(c);
|
||||
|
||||
cpu_detect(c);
|
||||
get_cpu_vendor(c);
|
||||
get_cpu_cap(c);
|
||||
if (this_cpu->c_early_init)
|
||||
this_cpu->c_early_init(c);
|
||||
|
||||
if (this_cpu->c_early_init)
|
||||
this_cpu->c_early_init(c);
|
||||
c->cpu_index = 0;
|
||||
filter_cpuid_features(c, false);
|
||||
|
||||
c->cpu_index = 0;
|
||||
filter_cpuid_features(c, false);
|
||||
|
||||
if (this_cpu->c_bsp_init)
|
||||
this_cpu->c_bsp_init(c);
|
||||
if (this_cpu->c_bsp_init)
|
||||
this_cpu->c_bsp_init(c);
|
||||
}
|
||||
|
||||
setup_force_cpu_cap(X86_FEATURE_ALWAYS);
|
||||
fpu__init_system(c);
|
||||
|
|
|
@ -347,7 +347,7 @@ int __init sanitize_e820_map(struct e820entry *biosmap, int max_nr_map,
|
|||
* continue building up new bios map based on this
|
||||
* information
|
||||
*/
|
||||
if (current_type != last_type || current_type == E820_PRAM) {
|
||||
if (current_type != last_type) {
|
||||
if (last_type != 0) {
|
||||
new_bios[new_bios_entry].size =
|
||||
change_point[chgidx]->addr - last_addr;
|
||||
|
@ -753,7 +753,7 @@ u64 __init early_reserve_e820(u64 size, u64 align)
|
|||
/*
|
||||
* Find the highest page frame number we have available
|
||||
*/
|
||||
static unsigned long __init e820_end_pfn(unsigned long limit_pfn)
|
||||
static unsigned long __init e820_end_pfn(unsigned long limit_pfn, unsigned type)
|
||||
{
|
||||
int i;
|
||||
unsigned long last_pfn = 0;
|
||||
|
@ -764,11 +764,7 @@ static unsigned long __init e820_end_pfn(unsigned long limit_pfn)
|
|||
unsigned long start_pfn;
|
||||
unsigned long end_pfn;
|
||||
|
||||
/*
|
||||
* Persistent memory is accounted as ram for purposes of
|
||||
* establishing max_pfn and mem_map.
|
||||
*/
|
||||
if (ei->type != E820_RAM && ei->type != E820_PRAM)
|
||||
if (ei->type != type)
|
||||
continue;
|
||||
|
||||
start_pfn = ei->addr >> PAGE_SHIFT;
|
||||
|
@ -793,12 +789,12 @@ static unsigned long __init e820_end_pfn(unsigned long limit_pfn)
|
|||
}
|
||||
unsigned long __init e820_end_of_ram_pfn(void)
|
||||
{
|
||||
return e820_end_pfn(MAX_ARCH_PFN);
|
||||
return e820_end_pfn(MAX_ARCH_PFN, E820_RAM);
|
||||
}
|
||||
|
||||
unsigned long __init e820_end_of_low_ram_pfn(void)
|
||||
{
|
||||
return e820_end_pfn(1UL << (32-PAGE_SHIFT));
|
||||
return e820_end_pfn(1UL << (32 - PAGE_SHIFT), E820_RAM);
|
||||
}
|
||||
|
||||
static void early_panic(char *msg)
|
||||
|
|
|
@ -188,8 +188,8 @@ unsigned long kernel_stack_pointer(struct pt_regs *regs)
|
|||
return sp;
|
||||
|
||||
prev_esp = (u32 *)(context);
|
||||
if (prev_esp)
|
||||
return (unsigned long)prev_esp;
|
||||
if (*prev_esp)
|
||||
return (unsigned long)*prev_esp;
|
||||
|
||||
return (unsigned long)regs;
|
||||
}
|
||||
|
|
|
@ -408,6 +408,7 @@ struct nested_vmx {
|
|||
struct list_head vmcs02_pool;
|
||||
int vmcs02_num;
|
||||
u64 vmcs01_tsc_offset;
|
||||
bool change_vmcs01_virtual_x2apic_mode;
|
||||
/* L2 must run next, and mustn't decide to exit to L1. */
|
||||
bool nested_run_pending;
|
||||
/*
|
||||
|
@ -8184,6 +8185,12 @@ static void vmx_set_virtual_x2apic_mode(struct kvm_vcpu *vcpu, bool set)
|
|||
{
|
||||
u32 sec_exec_control;
|
||||
|
||||
/* Postpone execution until vmcs01 is the current VMCS. */
|
||||
if (is_guest_mode(vcpu)) {
|
||||
to_vmx(vcpu)->nested.change_vmcs01_virtual_x2apic_mode = true;
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* There is not point to enable virtualize x2apic without enable
|
||||
* apicv
|
||||
|
@ -10483,6 +10490,12 @@ static void nested_vmx_vmexit(struct kvm_vcpu *vcpu, u32 exit_reason,
|
|||
/* Update TSC_OFFSET if TSC was changed while L2 ran */
|
||||
vmcs_write64(TSC_OFFSET, vmx->nested.vmcs01_tsc_offset);
|
||||
|
||||
if (vmx->nested.change_vmcs01_virtual_x2apic_mode) {
|
||||
vmx->nested.change_vmcs01_virtual_x2apic_mode = false;
|
||||
vmx_set_virtual_x2apic_mode(vcpu,
|
||||
vcpu->arch.apic_base & X2APIC_ENABLE);
|
||||
}
|
||||
|
||||
/* This is needed for same reason as it was needed in prepare_vmcs02 */
|
||||
vmx->host_rsp = 0;
|
||||
|
||||
|
|
|
@ -780,7 +780,7 @@ static void __blk_mq_run_hw_queue(struct blk_mq_hw_ctx *hctx)
|
|||
switch (ret) {
|
||||
case BLK_MQ_RQ_QUEUE_OK:
|
||||
queued++;
|
||||
continue;
|
||||
break;
|
||||
case BLK_MQ_RQ_QUEUE_BUSY:
|
||||
list_add(&rq->queuelist, &rq_list);
|
||||
__blk_mq_requeue_request(rq);
|
||||
|
|
|
@ -504,11 +504,20 @@ acpi_get_sleep_type_data(u8 sleep_state, u8 *sleep_type_a, u8 *sleep_type_b)
|
|||
* Evaluate the \_Sx namespace object containing the register values
|
||||
* for this state
|
||||
*/
|
||||
info->relative_pathname =
|
||||
ACPI_CAST_PTR(char, acpi_gbl_sleep_state_names[sleep_state]);
|
||||
info->relative_pathname = ACPI_CAST_PTR(char,
|
||||
acpi_gbl_sleep_state_names
|
||||
[sleep_state]);
|
||||
|
||||
status = acpi_ns_evaluate(info);
|
||||
if (ACPI_FAILURE(status)) {
|
||||
goto cleanup;
|
||||
if (status == AE_NOT_FOUND) {
|
||||
|
||||
/* The _Sx states are optional, ignore NOT_FOUND */
|
||||
|
||||
goto final_cleanup;
|
||||
}
|
||||
|
||||
goto warning_cleanup;
|
||||
}
|
||||
|
||||
/* Must have a return object */
|
||||
|
@ -517,7 +526,7 @@ acpi_get_sleep_type_data(u8 sleep_state, u8 *sleep_type_a, u8 *sleep_type_b)
|
|||
ACPI_ERROR((AE_INFO, "No Sleep State object returned from [%s]",
|
||||
info->relative_pathname));
|
||||
status = AE_AML_NO_RETURN_VALUE;
|
||||
goto cleanup;
|
||||
goto warning_cleanup;
|
||||
}
|
||||
|
||||
/* Return object must be of type Package */
|
||||
|
@ -526,7 +535,7 @@ acpi_get_sleep_type_data(u8 sleep_state, u8 *sleep_type_a, u8 *sleep_type_b)
|
|||
ACPI_ERROR((AE_INFO,
|
||||
"Sleep State return object is not a Package"));
|
||||
status = AE_AML_OPERAND_TYPE;
|
||||
goto cleanup1;
|
||||
goto return_value_cleanup;
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -570,16 +579,17 @@ acpi_get_sleep_type_data(u8 sleep_state, u8 *sleep_type_a, u8 *sleep_type_b)
|
|||
break;
|
||||
}
|
||||
|
||||
cleanup1:
|
||||
return_value_cleanup:
|
||||
acpi_ut_remove_reference(info->return_object);
|
||||
|
||||
cleanup:
|
||||
warning_cleanup:
|
||||
if (ACPI_FAILURE(status)) {
|
||||
ACPI_EXCEPTION((AE_INFO, status,
|
||||
"While evaluating Sleep State [%s]",
|
||||
info->relative_pathname));
|
||||
}
|
||||
|
||||
final_cleanup:
|
||||
ACPI_FREE(info);
|
||||
return_ACPI_STATUS(status);
|
||||
}
|
||||
|
|
|
@ -384,7 +384,12 @@ static int omap_rng_probe(struct platform_device *pdev)
|
|||
}
|
||||
|
||||
pm_runtime_enable(&pdev->dev);
|
||||
pm_runtime_get_sync(&pdev->dev);
|
||||
ret = pm_runtime_get_sync(&pdev->dev);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "Failed to runtime_get device: %d\n", ret);
|
||||
pm_runtime_put_noidle(&pdev->dev);
|
||||
goto err_ioremap;
|
||||
}
|
||||
|
||||
ret = (dev->of_node) ? of_get_omap_rng_device_details(priv, pdev) :
|
||||
get_omap_rng_device_details(priv);
|
||||
|
@ -435,8 +440,15 @@ static int __maybe_unused omap_rng_suspend(struct device *dev)
|
|||
static int __maybe_unused omap_rng_resume(struct device *dev)
|
||||
{
|
||||
struct omap_rng_dev *priv = dev_get_drvdata(dev);
|
||||
int ret;
|
||||
|
||||
ret = pm_runtime_get_sync(dev);
|
||||
if (ret) {
|
||||
dev_err(dev, "Failed to runtime_get device: %d\n", ret);
|
||||
pm_runtime_put_noidle(dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
pm_runtime_get_sync(dev);
|
||||
priv->pdata->init(priv);
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -139,7 +139,7 @@ static ssize_t tpm_write(struct file *file, const char __user *buf,
|
|||
|
||||
/* atomic tpm command send and result receive */
|
||||
out_size = tpm_transmit(priv->chip, priv->data_buffer,
|
||||
sizeof(priv->data_buffer));
|
||||
sizeof(priv->data_buffer), 0);
|
||||
if (out_size < 0) {
|
||||
mutex_unlock(&priv->buffer_mutex);
|
||||
return out_size;
|
||||
|
|
|
@ -328,8 +328,8 @@ EXPORT_SYMBOL_GPL(tpm_calc_ordinal_duration);
|
|||
/*
|
||||
* Internal kernel interface to transmit TPM commands
|
||||
*/
|
||||
ssize_t tpm_transmit(struct tpm_chip *chip, const char *buf,
|
||||
size_t bufsiz)
|
||||
ssize_t tpm_transmit(struct tpm_chip *chip, const u8 *buf, size_t bufsiz,
|
||||
unsigned int flags)
|
||||
{
|
||||
ssize_t rc;
|
||||
u32 count, ordinal;
|
||||
|
@ -348,7 +348,8 @@ ssize_t tpm_transmit(struct tpm_chip *chip, const char *buf,
|
|||
return -E2BIG;
|
||||
}
|
||||
|
||||
mutex_lock(&chip->tpm_mutex);
|
||||
if (!(flags & TPM_TRANSMIT_UNLOCKED))
|
||||
mutex_lock(&chip->tpm_mutex);
|
||||
|
||||
rc = chip->ops->send(chip, (u8 *) buf, count);
|
||||
if (rc < 0) {
|
||||
|
@ -391,20 +392,21 @@ out_recv:
|
|||
dev_err(chip->pdev,
|
||||
"tpm_transmit: tpm_recv: error %zd\n", rc);
|
||||
out:
|
||||
mutex_unlock(&chip->tpm_mutex);
|
||||
if (!(flags & TPM_TRANSMIT_UNLOCKED))
|
||||
mutex_unlock(&chip->tpm_mutex);
|
||||
return rc;
|
||||
}
|
||||
|
||||
#define TPM_DIGEST_SIZE 20
|
||||
#define TPM_RET_CODE_IDX 6
|
||||
|
||||
ssize_t tpm_transmit_cmd(struct tpm_chip *chip, void *cmd,
|
||||
int len, const char *desc)
|
||||
ssize_t tpm_transmit_cmd(struct tpm_chip *chip, const void *cmd,
|
||||
int len, unsigned int flags, const char *desc)
|
||||
{
|
||||
struct tpm_output_header *header;
|
||||
const struct tpm_output_header *header;
|
||||
int err;
|
||||
|
||||
len = tpm_transmit(chip, (u8 *) cmd, len);
|
||||
len = tpm_transmit(chip, (const u8 *)cmd, len, flags);
|
||||
if (len < 0)
|
||||
return len;
|
||||
else if (len < TPM_HEADER_SIZE)
|
||||
|
@ -452,7 +454,8 @@ ssize_t tpm_getcap(struct device *dev, __be32 subcap_id, cap_t *cap,
|
|||
tpm_cmd.params.getcap_in.subcap_size = cpu_to_be32(4);
|
||||
tpm_cmd.params.getcap_in.subcap = subcap_id;
|
||||
}
|
||||
rc = tpm_transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE, desc);
|
||||
rc = tpm_transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE, 0,
|
||||
desc);
|
||||
if (!rc)
|
||||
*cap = tpm_cmd.params.getcap_out.cap;
|
||||
return rc;
|
||||
|
@ -468,7 +471,7 @@ void tpm_gen_interrupt(struct tpm_chip *chip)
|
|||
tpm_cmd.params.getcap_in.subcap_size = cpu_to_be32(4);
|
||||
tpm_cmd.params.getcap_in.subcap = TPM_CAP_PROP_TIS_TIMEOUT;
|
||||
|
||||
rc = tpm_transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE,
|
||||
rc = tpm_transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE, 0,
|
||||
"attempting to determine the timeouts");
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(tpm_gen_interrupt);
|
||||
|
@ -489,7 +492,7 @@ static int tpm_startup(struct tpm_chip *chip, __be16 startup_type)
|
|||
start_cmd.header.in = tpm_startup_header;
|
||||
|
||||
start_cmd.params.startup_in.startup_type = startup_type;
|
||||
return tpm_transmit_cmd(chip, &start_cmd, TPM_INTERNAL_RESULT_SIZE,
|
||||
return tpm_transmit_cmd(chip, &start_cmd, TPM_INTERNAL_RESULT_SIZE, 0,
|
||||
"attempting to start the TPM");
|
||||
}
|
||||
|
||||
|
@ -505,7 +508,8 @@ int tpm_get_timeouts(struct tpm_chip *chip)
|
|||
tpm_cmd.params.getcap_in.cap = TPM_CAP_PROP;
|
||||
tpm_cmd.params.getcap_in.subcap_size = cpu_to_be32(4);
|
||||
tpm_cmd.params.getcap_in.subcap = TPM_CAP_PROP_TIS_TIMEOUT;
|
||||
rc = tpm_transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE, NULL);
|
||||
rc = tpm_transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE, 0,
|
||||
NULL);
|
||||
|
||||
if (rc == TPM_ERR_INVALID_POSTINIT) {
|
||||
/* The TPM is not started, we are the first to talk to it.
|
||||
|
@ -519,7 +523,7 @@ int tpm_get_timeouts(struct tpm_chip *chip)
|
|||
tpm_cmd.params.getcap_in.subcap_size = cpu_to_be32(4);
|
||||
tpm_cmd.params.getcap_in.subcap = TPM_CAP_PROP_TIS_TIMEOUT;
|
||||
rc = tpm_transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE,
|
||||
NULL);
|
||||
0, NULL);
|
||||
}
|
||||
if (rc) {
|
||||
dev_err(chip->pdev,
|
||||
|
@ -580,7 +584,7 @@ duration:
|
|||
tpm_cmd.params.getcap_in.subcap_size = cpu_to_be32(4);
|
||||
tpm_cmd.params.getcap_in.subcap = TPM_CAP_PROP_TIS_DURATION;
|
||||
|
||||
rc = tpm_transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE,
|
||||
rc = tpm_transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE, 0,
|
||||
"attempting to determine the durations");
|
||||
if (rc)
|
||||
return rc;
|
||||
|
@ -636,7 +640,7 @@ static int tpm_continue_selftest(struct tpm_chip *chip)
|
|||
struct tpm_cmd_t cmd;
|
||||
|
||||
cmd.header.in = continue_selftest_header;
|
||||
rc = tpm_transmit_cmd(chip, &cmd, CONTINUE_SELFTEST_RESULT_SIZE,
|
||||
rc = tpm_transmit_cmd(chip, &cmd, CONTINUE_SELFTEST_RESULT_SIZE, 0,
|
||||
"continue selftest");
|
||||
return rc;
|
||||
}
|
||||
|
@ -656,7 +660,7 @@ int tpm_pcr_read_dev(struct tpm_chip *chip, int pcr_idx, u8 *res_buf)
|
|||
|
||||
cmd.header.in = pcrread_header;
|
||||
cmd.params.pcrread_in.pcr_idx = cpu_to_be32(pcr_idx);
|
||||
rc = tpm_transmit_cmd(chip, &cmd, READ_PCR_RESULT_SIZE,
|
||||
rc = tpm_transmit_cmd(chip, &cmd, READ_PCR_RESULT_SIZE, 0,
|
||||
"attempting to read a pcr value");
|
||||
|
||||
if (rc == 0)
|
||||
|
@ -754,7 +758,7 @@ int tpm_pcr_extend(u32 chip_num, int pcr_idx, const u8 *hash)
|
|||
cmd.header.in = pcrextend_header;
|
||||
cmd.params.pcrextend_in.pcr_idx = cpu_to_be32(pcr_idx);
|
||||
memcpy(cmd.params.pcrextend_in.hash, hash, TPM_DIGEST_SIZE);
|
||||
rc = tpm_transmit_cmd(chip, &cmd, EXTEND_PCR_RESULT_SIZE,
|
||||
rc = tpm_transmit_cmd(chip, &cmd, EXTEND_PCR_RESULT_SIZE, 0,
|
||||
"attempting extend a PCR value");
|
||||
|
||||
tpm_chip_put(chip);
|
||||
|
@ -793,7 +797,7 @@ int tpm_do_selftest(struct tpm_chip *chip)
|
|||
/* Attempt to read a PCR value */
|
||||
cmd.header.in = pcrread_header;
|
||||
cmd.params.pcrread_in.pcr_idx = cpu_to_be32(0);
|
||||
rc = tpm_transmit(chip, (u8 *) &cmd, READ_PCR_RESULT_SIZE);
|
||||
rc = tpm_transmit(chip, (u8 *) &cmd, READ_PCR_RESULT_SIZE, 0);
|
||||
/* Some buggy TPMs will not respond to tpm_tis_ready() for
|
||||
* around 300ms while the self test is ongoing, keep trying
|
||||
* until the self test duration expires. */
|
||||
|
@ -834,7 +838,7 @@ int tpm_send(u32 chip_num, void *cmd, size_t buflen)
|
|||
if (chip == NULL)
|
||||
return -ENODEV;
|
||||
|
||||
rc = tpm_transmit_cmd(chip, cmd, buflen, "attempting tpm_cmd");
|
||||
rc = tpm_transmit_cmd(chip, cmd, buflen, 0, "attempting tpm_cmd");
|
||||
|
||||
tpm_chip_put(chip);
|
||||
return rc;
|
||||
|
@ -936,14 +940,15 @@ int tpm_pm_suspend(struct device *dev)
|
|||
cmd.params.pcrextend_in.pcr_idx = cpu_to_be32(tpm_suspend_pcr);
|
||||
memcpy(cmd.params.pcrextend_in.hash, dummy_hash,
|
||||
TPM_DIGEST_SIZE);
|
||||
rc = tpm_transmit_cmd(chip, &cmd, EXTEND_PCR_RESULT_SIZE,
|
||||
rc = tpm_transmit_cmd(chip, &cmd, EXTEND_PCR_RESULT_SIZE, 0,
|
||||
"extending dummy pcr before suspend");
|
||||
}
|
||||
|
||||
/* now do the actual savestate */
|
||||
for (try = 0; try < TPM_RETRY; try++) {
|
||||
cmd.header.in = savestate_header;
|
||||
rc = tpm_transmit_cmd(chip, &cmd, SAVESTATE_RESULT_SIZE, NULL);
|
||||
rc = tpm_transmit_cmd(chip, &cmd, SAVESTATE_RESULT_SIZE, 0,
|
||||
NULL);
|
||||
|
||||
/*
|
||||
* If the TPM indicates that it is too busy to respond to
|
||||
|
@ -1027,8 +1032,8 @@ int tpm_get_random(u32 chip_num, u8 *out, size_t max)
|
|||
tpm_cmd.params.getrandom_in.num_bytes = cpu_to_be32(num_bytes);
|
||||
|
||||
err = tpm_transmit_cmd(chip, &tpm_cmd,
|
||||
TPM_GETRANDOM_RESULT_SIZE + num_bytes,
|
||||
"attempting get random");
|
||||
TPM_GETRANDOM_RESULT_SIZE + num_bytes,
|
||||
0, "attempting get random");
|
||||
if (err)
|
||||
break;
|
||||
|
||||
|
|
|
@ -39,7 +39,7 @@ static ssize_t pubek_show(struct device *dev, struct device_attribute *attr,
|
|||
struct tpm_chip *chip = dev_get_drvdata(dev);
|
||||
|
||||
tpm_cmd.header.in = tpm_readpubek_header;
|
||||
err = tpm_transmit_cmd(chip, &tpm_cmd, READ_PUBEK_RESULT_SIZE,
|
||||
err = tpm_transmit_cmd(chip, &tpm_cmd, READ_PUBEK_RESULT_SIZE, 0,
|
||||
"attempting to read the PUBEK");
|
||||
if (err)
|
||||
goto out;
|
||||
|
|
|
@ -498,11 +498,15 @@ extern struct class *tpm_class;
|
|||
extern dev_t tpm_devt;
|
||||
extern const struct file_operations tpm_fops;
|
||||
|
||||
enum tpm_transmit_flags {
|
||||
TPM_TRANSMIT_UNLOCKED = BIT(0),
|
||||
};
|
||||
|
||||
ssize_t tpm_transmit(struct tpm_chip *chip, const u8 *buf, size_t bufsiz,
|
||||
unsigned int flags);
|
||||
ssize_t tpm_transmit_cmd(struct tpm_chip *chip, const void *cmd, int len,
|
||||
unsigned int flags, const char *desc);
|
||||
ssize_t tpm_getcap(struct device *, __be32, cap_t *, const char *);
|
||||
ssize_t tpm_transmit(struct tpm_chip *chip, const char *buf,
|
||||
size_t bufsiz);
|
||||
ssize_t tpm_transmit_cmd(struct tpm_chip *chip, void *cmd, int len,
|
||||
const char *desc);
|
||||
extern int tpm_get_timeouts(struct tpm_chip *);
|
||||
extern void tpm_gen_interrupt(struct tpm_chip *);
|
||||
extern int tpm_do_selftest(struct tpm_chip *);
|
||||
|
|
|
@ -264,7 +264,7 @@ int tpm2_pcr_read(struct tpm_chip *chip, int pcr_idx, u8 *res_buf)
|
|||
sizeof(cmd.params.pcrread_in.pcr_select));
|
||||
cmd.params.pcrread_in.pcr_select[pcr_idx >> 3] = 1 << (pcr_idx & 0x7);
|
||||
|
||||
rc = tpm_transmit_cmd(chip, &cmd, sizeof(cmd),
|
||||
rc = tpm_transmit_cmd(chip, &cmd, sizeof(cmd), 0,
|
||||
"attempting to read a pcr value");
|
||||
if (rc == 0) {
|
||||
buf = cmd.params.pcrread_out.digest;
|
||||
|
@ -312,7 +312,7 @@ int tpm2_pcr_extend(struct tpm_chip *chip, int pcr_idx, const u8 *hash)
|
|||
cmd.params.pcrextend_in.hash_alg = cpu_to_be16(TPM2_ALG_SHA1);
|
||||
memcpy(cmd.params.pcrextend_in.digest, hash, TPM_DIGEST_SIZE);
|
||||
|
||||
rc = tpm_transmit_cmd(chip, &cmd, sizeof(cmd),
|
||||
rc = tpm_transmit_cmd(chip, &cmd, sizeof(cmd), 0,
|
||||
"attempting extend a PCR value");
|
||||
|
||||
return rc;
|
||||
|
@ -358,7 +358,7 @@ int tpm2_get_random(struct tpm_chip *chip, u8 *out, size_t max)
|
|||
cmd.header.in = tpm2_getrandom_header;
|
||||
cmd.params.getrandom_in.size = cpu_to_be16(num_bytes);
|
||||
|
||||
err = tpm_transmit_cmd(chip, &cmd, sizeof(cmd),
|
||||
err = tpm_transmit_cmd(chip, &cmd, sizeof(cmd), 0,
|
||||
"attempting get random");
|
||||
if (err)
|
||||
break;
|
||||
|
@ -416,12 +416,12 @@ static void tpm2_buf_append_auth(struct tpm_buf *buf, u32 session_handle,
|
|||
}
|
||||
|
||||
/**
|
||||
* tpm2_seal_trusted() - seal a trusted key
|
||||
* @chip_num: A specific chip number for the request or TPM_ANY_NUM
|
||||
* @options: authentication values and other options
|
||||
* tpm2_seal_trusted() - seal the payload of a trusted key
|
||||
* @chip_num: TPM chip to use
|
||||
* @payload: the key data in clear and encrypted form
|
||||
* @options: authentication values and other options
|
||||
*
|
||||
* Returns < 0 on error and 0 on success.
|
||||
* Return: < 0 on error and 0 on success.
|
||||
*/
|
||||
int tpm2_seal_trusted(struct tpm_chip *chip,
|
||||
struct trusted_key_payload *payload,
|
||||
|
@ -472,7 +472,7 @@ int tpm2_seal_trusted(struct tpm_chip *chip,
|
|||
goto out;
|
||||
}
|
||||
|
||||
rc = tpm_transmit_cmd(chip, buf.data, PAGE_SIZE, "sealing data");
|
||||
rc = tpm_transmit_cmd(chip, buf.data, PAGE_SIZE, 0, "sealing data");
|
||||
if (rc)
|
||||
goto out;
|
||||
|
||||
|
@ -494,10 +494,18 @@ out:
|
|||
return rc;
|
||||
}
|
||||
|
||||
static int tpm2_load(struct tpm_chip *chip,
|
||||
struct trusted_key_payload *payload,
|
||||
struct trusted_key_options *options,
|
||||
u32 *blob_handle)
|
||||
/**
|
||||
* tpm2_load_cmd() - execute a TPM2_Load command
|
||||
* @chip_num: TPM chip to use
|
||||
* @payload: the key data in clear and encrypted form
|
||||
* @options: authentication values and other options
|
||||
*
|
||||
* Return: same as with tpm_transmit_cmd
|
||||
*/
|
||||
static int tpm2_load_cmd(struct tpm_chip *chip,
|
||||
struct trusted_key_payload *payload,
|
||||
struct trusted_key_options *options,
|
||||
u32 *blob_handle, unsigned int flags)
|
||||
{
|
||||
struct tpm_buf buf;
|
||||
unsigned int private_len;
|
||||
|
@ -532,7 +540,7 @@ static int tpm2_load(struct tpm_chip *chip,
|
|||
goto out;
|
||||
}
|
||||
|
||||
rc = tpm_transmit_cmd(chip, buf.data, PAGE_SIZE, "loading blob");
|
||||
rc = tpm_transmit_cmd(chip, buf.data, PAGE_SIZE, flags, "loading blob");
|
||||
if (!rc)
|
||||
*blob_handle = be32_to_cpup(
|
||||
(__be32 *) &buf.data[TPM_HEADER_SIZE]);
|
||||
|
@ -546,7 +554,16 @@ out:
|
|||
return rc;
|
||||
}
|
||||
|
||||
static void tpm2_flush_context(struct tpm_chip *chip, u32 handle)
|
||||
/**
|
||||
* tpm2_flush_context_cmd() - execute a TPM2_FlushContext command
|
||||
* @chip_num: TPM chip to use
|
||||
* @payload: the key data in clear and encrypted form
|
||||
* @options: authentication values and other options
|
||||
*
|
||||
* Return: same as with tpm_transmit_cmd
|
||||
*/
|
||||
static void tpm2_flush_context_cmd(struct tpm_chip *chip, u32 handle,
|
||||
unsigned int flags)
|
||||
{
|
||||
struct tpm_buf buf;
|
||||
int rc;
|
||||
|
@ -560,7 +577,8 @@ static void tpm2_flush_context(struct tpm_chip *chip, u32 handle)
|
|||
|
||||
tpm_buf_append_u32(&buf, handle);
|
||||
|
||||
rc = tpm_transmit_cmd(chip, buf.data, PAGE_SIZE, "flushing context");
|
||||
rc = tpm_transmit_cmd(chip, buf.data, PAGE_SIZE, flags,
|
||||
"flushing context");
|
||||
if (rc)
|
||||
dev_warn(chip->pdev, "0x%08x was not flushed, rc=%d\n", handle,
|
||||
rc);
|
||||
|
@ -568,10 +586,18 @@ static void tpm2_flush_context(struct tpm_chip *chip, u32 handle)
|
|||
tpm_buf_destroy(&buf);
|
||||
}
|
||||
|
||||
static int tpm2_unseal(struct tpm_chip *chip,
|
||||
struct trusted_key_payload *payload,
|
||||
struct trusted_key_options *options,
|
||||
u32 blob_handle)
|
||||
/**
|
||||
* tpm2_unseal_cmd() - execute a TPM2_Unload command
|
||||
* @chip_num: TPM chip to use
|
||||
* @payload: the key data in clear and encrypted form
|
||||
* @options: authentication values and other options
|
||||
*
|
||||
* Return: same as with tpm_transmit_cmd
|
||||
*/
|
||||
static int tpm2_unseal_cmd(struct tpm_chip *chip,
|
||||
struct trusted_key_payload *payload,
|
||||
struct trusted_key_options *options,
|
||||
u32 blob_handle, unsigned int flags)
|
||||
{
|
||||
struct tpm_buf buf;
|
||||
u16 data_len;
|
||||
|
@ -589,7 +615,7 @@ static int tpm2_unseal(struct tpm_chip *chip,
|
|||
options->blobauth /* hmac */,
|
||||
TPM_DIGEST_SIZE);
|
||||
|
||||
rc = tpm_transmit_cmd(chip, buf.data, PAGE_SIZE, "unsealing");
|
||||
rc = tpm_transmit_cmd(chip, buf.data, PAGE_SIZE, flags, "unsealing");
|
||||
if (rc > 0)
|
||||
rc = -EPERM;
|
||||
|
||||
|
@ -608,12 +634,12 @@ static int tpm2_unseal(struct tpm_chip *chip,
|
|||
}
|
||||
|
||||
/**
|
||||
* tpm_unseal_trusted() - unseal a trusted key
|
||||
* @chip_num: A specific chip number for the request or TPM_ANY_NUM
|
||||
* @options: authentication values and other options
|
||||
* tpm_unseal_trusted() - unseal the payload of a trusted key
|
||||
* @chip_num: TPM chip to use
|
||||
* @payload: the key data in clear and encrypted form
|
||||
* @options: authentication values and other options
|
||||
*
|
||||
* Returns < 0 on error and 0 on success.
|
||||
* Return: < 0 on error and 0 on success.
|
||||
*/
|
||||
int tpm2_unseal_trusted(struct tpm_chip *chip,
|
||||
struct trusted_key_payload *payload,
|
||||
|
@ -622,14 +648,17 @@ int tpm2_unseal_trusted(struct tpm_chip *chip,
|
|||
u32 blob_handle;
|
||||
int rc;
|
||||
|
||||
rc = tpm2_load(chip, payload, options, &blob_handle);
|
||||
mutex_lock(&chip->tpm_mutex);
|
||||
rc = tpm2_load_cmd(chip, payload, options, &blob_handle,
|
||||
TPM_TRANSMIT_UNLOCKED);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = tpm2_unseal(chip, payload, options, blob_handle);
|
||||
|
||||
tpm2_flush_context(chip, blob_handle);
|
||||
goto out;
|
||||
|
||||
rc = tpm2_unseal_cmd(chip, payload, options, blob_handle,
|
||||
TPM_TRANSMIT_UNLOCKED);
|
||||
tpm2_flush_context_cmd(chip, blob_handle, TPM_TRANSMIT_UNLOCKED);
|
||||
out:
|
||||
mutex_unlock(&chip->tpm_mutex);
|
||||
return rc;
|
||||
}
|
||||
|
||||
|
@ -655,9 +684,9 @@ ssize_t tpm2_get_tpm_pt(struct tpm_chip *chip, u32 property_id, u32 *value,
|
|||
cmd.params.get_tpm_pt_in.property_id = cpu_to_be32(property_id);
|
||||
cmd.params.get_tpm_pt_in.property_cnt = cpu_to_be32(1);
|
||||
|
||||
rc = tpm_transmit_cmd(chip, &cmd, sizeof(cmd), desc);
|
||||
rc = tpm_transmit_cmd(chip, &cmd, sizeof(cmd), 0, desc);
|
||||
if (!rc)
|
||||
*value = cmd.params.get_tpm_pt_out.value;
|
||||
*value = be32_to_cpu(cmd.params.get_tpm_pt_out.value);
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
@ -689,7 +718,7 @@ int tpm2_startup(struct tpm_chip *chip, u16 startup_type)
|
|||
cmd.header.in = tpm2_startup_header;
|
||||
|
||||
cmd.params.startup_in.startup_type = cpu_to_be16(startup_type);
|
||||
return tpm_transmit_cmd(chip, &cmd, sizeof(cmd),
|
||||
return tpm_transmit_cmd(chip, &cmd, sizeof(cmd), 0,
|
||||
"attempting to start the TPM");
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(tpm2_startup);
|
||||
|
@ -718,7 +747,7 @@ void tpm2_shutdown(struct tpm_chip *chip, u16 shutdown_type)
|
|||
cmd.header.in = tpm2_shutdown_header;
|
||||
cmd.params.startup_in.startup_type = cpu_to_be16(shutdown_type);
|
||||
|
||||
rc = tpm_transmit_cmd(chip, &cmd, sizeof(cmd), "stopping the TPM");
|
||||
rc = tpm_transmit_cmd(chip, &cmd, sizeof(cmd), 0, "stopping the TPM");
|
||||
|
||||
/* In places where shutdown command is sent there's no much we can do
|
||||
* except print the error code on a system failure.
|
||||
|
@ -784,7 +813,7 @@ static int tpm2_start_selftest(struct tpm_chip *chip, bool full)
|
|||
cmd.header.in = tpm2_selftest_header;
|
||||
cmd.params.selftest_in.full_test = full;
|
||||
|
||||
rc = tpm_transmit_cmd(chip, &cmd, TPM2_SELF_TEST_IN_SIZE,
|
||||
rc = tpm_transmit_cmd(chip, &cmd, TPM2_SELF_TEST_IN_SIZE, 0,
|
||||
"continue selftest");
|
||||
|
||||
/* At least some prototype chips seem to give RC_TESTING error
|
||||
|
@ -836,7 +865,7 @@ int tpm2_do_selftest(struct tpm_chip *chip)
|
|||
cmd.params.pcrread_in.pcr_select[1] = 0x00;
|
||||
cmd.params.pcrread_in.pcr_select[2] = 0x00;
|
||||
|
||||
rc = tpm_transmit_cmd(chip, (u8 *) &cmd, sizeof(cmd), NULL);
|
||||
rc = tpm_transmit_cmd(chip, &cmd, sizeof(cmd), 0, NULL);
|
||||
if (rc < 0)
|
||||
break;
|
||||
|
||||
|
@ -885,7 +914,7 @@ int tpm2_probe(struct tpm_chip *chip)
|
|||
cmd.params.get_tpm_pt_in.property_id = cpu_to_be32(0x100);
|
||||
cmd.params.get_tpm_pt_in.property_cnt = cpu_to_be32(1);
|
||||
|
||||
rc = tpm_transmit(chip, (const char *) &cmd, sizeof(cmd));
|
||||
rc = tpm_transmit(chip, (const u8 *)&cmd, sizeof(cmd), 0);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
else if (rc < TPM_HEADER_SIZE)
|
||||
|
|
|
@ -149,6 +149,11 @@ static int crb_send(struct tpm_chip *chip, u8 *buf, size_t len)
|
|||
struct crb_priv *priv = chip->vendor.priv;
|
||||
int rc = 0;
|
||||
|
||||
/* Zero the cancel register so that the next command will not get
|
||||
* canceled.
|
||||
*/
|
||||
iowrite32(0, &priv->cca->cancel);
|
||||
|
||||
if (len > le32_to_cpu(ioread32(&priv->cca->cmd_size))) {
|
||||
dev_err(&chip->dev,
|
||||
"invalid command count value %x %zx\n",
|
||||
|
@ -182,8 +187,6 @@ static void crb_cancel(struct tpm_chip *chip)
|
|||
|
||||
if ((priv->flags & CRB_FL_ACPI_START) && crb_do_acpi_start(chip))
|
||||
dev_err(&chip->dev, "ACPI Start failed\n");
|
||||
|
||||
iowrite32(0, &priv->cca->cancel);
|
||||
}
|
||||
|
||||
static bool crb_req_canceled(struct tpm_chip *chip, u8 status)
|
||||
|
|
|
@ -351,8 +351,8 @@ static int xgene_clk_set_rate(struct clk_hw *hw, unsigned long rate,
|
|||
/* Set new divider */
|
||||
data = xgene_clk_read(pclk->param.divider_reg +
|
||||
pclk->param.reg_divider_offset);
|
||||
data &= ~((1 << pclk->param.reg_divider_width) - 1)
|
||||
<< pclk->param.reg_divider_shift;
|
||||
data &= ~(((1 << pclk->param.reg_divider_width) - 1)
|
||||
<< pclk->param.reg_divider_shift);
|
||||
data |= divider;
|
||||
xgene_clk_write(data, pclk->param.divider_reg +
|
||||
pclk->param.reg_divider_offset);
|
||||
|
|
|
@ -135,6 +135,7 @@ static int __init arm_idle_init(void)
|
|||
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
|
||||
if (!dev) {
|
||||
pr_err("Failed to allocate cpuidle device\n");
|
||||
ret = -ENOMEM;
|
||||
goto out_fail;
|
||||
}
|
||||
dev->cpu = cpu;
|
||||
|
|
|
@ -1183,8 +1183,8 @@ static struct at_xdmac_desc *at_xdmac_memset_create_desc(struct dma_chan *chan,
|
|||
desc->lld.mbr_cfg = chan_cc;
|
||||
|
||||
dev_dbg(chan2dev(chan),
|
||||
"%s: lld: mbr_da=%pad, mbr_ds=%pad, mbr_ubc=0x%08x, mbr_cfg=0x%08x\n",
|
||||
__func__, &desc->lld.mbr_da, &desc->lld.mbr_ds, desc->lld.mbr_ubc,
|
||||
"%s: lld: mbr_da=%pad, mbr_ds=0x%08x, mbr_ubc=0x%08x, mbr_cfg=0x%08x\n",
|
||||
__func__, &desc->lld.mbr_da, desc->lld.mbr_ds, desc->lld.mbr_ubc,
|
||||
desc->lld.mbr_cfg);
|
||||
|
||||
return desc;
|
||||
|
@ -2055,7 +2055,7 @@ err_dma_unregister:
|
|||
err_clk_disable:
|
||||
clk_disable_unprepare(atxdmac->clk);
|
||||
err_free_irq:
|
||||
free_irq(atxdmac->irq, atxdmac->dma.dev);
|
||||
free_irq(atxdmac->irq, atxdmac);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -2071,7 +2071,7 @@ static int at_xdmac_remove(struct platform_device *pdev)
|
|||
|
||||
synchronize_irq(atxdmac->irq);
|
||||
|
||||
free_irq(atxdmac->irq, atxdmac->dma.dev);
|
||||
free_irq(atxdmac->irq, atxdmac);
|
||||
|
||||
for (i = 0; i < atxdmac->dma.chancnt; i++) {
|
||||
struct at_xdmac_chan *atchan = &atxdmac->chan[i];
|
||||
|
|
|
@ -155,7 +155,7 @@ static int sa1100_gpio_irqdomain_map(struct irq_domain *d,
|
|||
{
|
||||
irq_set_chip_and_handler(irq, &sa1100_gpio_irq_chip,
|
||||
handle_edge_irq);
|
||||
irq_set_noprobe(irq);
|
||||
irq_set_probe(irq);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -36,7 +36,10 @@ nv04_fifo_dma_object_dtor(struct nvkm_fifo_chan *base, int cookie)
|
|||
{
|
||||
struct nv04_fifo_chan *chan = nv04_fifo_chan(base);
|
||||
struct nvkm_instmem *imem = chan->fifo->base.engine.subdev.device->imem;
|
||||
|
||||
mutex_lock(&chan->fifo->base.engine.subdev.mutex);
|
||||
nvkm_ramht_remove(imem->ramht, cookie);
|
||||
mutex_unlock(&chan->fifo->base.engine.subdev.mutex);
|
||||
}
|
||||
|
||||
static int
|
||||
|
|
|
@ -3015,6 +3015,12 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev,
|
|||
if (rdev->pdev->device == 0x6811 &&
|
||||
rdev->pdev->revision == 0x81)
|
||||
max_mclk = 120000;
|
||||
/* limit sclk/mclk on Jet parts for stability */
|
||||
if (rdev->pdev->device == 0x6665 &&
|
||||
rdev->pdev->revision == 0xc3) {
|
||||
max_sclk = 75000;
|
||||
max_mclk = 80000;
|
||||
}
|
||||
|
||||
if (rps->vce_active) {
|
||||
rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk;
|
||||
|
|
|
@ -30,6 +30,7 @@
|
|||
|
||||
#define ADT7411_REG_CFG1 0x18
|
||||
#define ADT7411_CFG1_START_MONITOR (1 << 0)
|
||||
#define ADT7411_CFG1_RESERVED_BIT3 (1 << 3)
|
||||
|
||||
#define ADT7411_REG_CFG2 0x19
|
||||
#define ADT7411_CFG2_DISABLE_AVG (1 << 5)
|
||||
|
@ -296,8 +297,10 @@ static int adt7411_probe(struct i2c_client *client,
|
|||
mutex_init(&data->device_lock);
|
||||
mutex_init(&data->update_lock);
|
||||
|
||||
/* According to the datasheet, we must only write 1 to bit 3 */
|
||||
ret = adt7411_modify_bit(client, ADT7411_REG_CFG1,
|
||||
ADT7411_CFG1_START_MONITOR, 1);
|
||||
ADT7411_CFG1_RESERVED_BIT3
|
||||
| ADT7411_CFG1_START_MONITOR, 1);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
|
|
|
@ -106,7 +106,6 @@ struct mcast_group {
|
|||
atomic_t refcount;
|
||||
enum mcast_group_state state;
|
||||
struct ib_sa_query *query;
|
||||
int query_id;
|
||||
u16 pkey_index;
|
||||
u8 leave_state;
|
||||
int retries;
|
||||
|
@ -339,11 +338,7 @@ static int send_join(struct mcast_group *group, struct mcast_member *member)
|
|||
member->multicast.comp_mask,
|
||||
3000, GFP_KERNEL, join_handler, group,
|
||||
&group->query);
|
||||
if (ret >= 0) {
|
||||
group->query_id = ret;
|
||||
ret = 0;
|
||||
}
|
||||
return ret;
|
||||
return (ret > 0) ? 0 : ret;
|
||||
}
|
||||
|
||||
static int send_leave(struct mcast_group *group, u8 leave_state)
|
||||
|
@ -363,11 +358,7 @@ static int send_leave(struct mcast_group *group, u8 leave_state)
|
|||
IB_SA_MCMEMBER_REC_JOIN_STATE,
|
||||
3000, GFP_KERNEL, leave_handler,
|
||||
group, &group->query);
|
||||
if (ret >= 0) {
|
||||
group->query_id = ret;
|
||||
ret = 0;
|
||||
}
|
||||
return ret;
|
||||
return (ret > 0) ? 0 : ret;
|
||||
}
|
||||
|
||||
static void join_group(struct mcast_group *group, struct mcast_member *member,
|
||||
|
|
|
@ -1080,6 +1080,27 @@ void handle_port_mgmt_change_event(struct work_struct *work)
|
|||
|
||||
/* Generate GUID changed event */
|
||||
if (changed_attr & MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK) {
|
||||
if (mlx4_is_master(dev->dev)) {
|
||||
union ib_gid gid;
|
||||
int err = 0;
|
||||
|
||||
if (!eqe->event.port_mgmt_change.params.port_info.gid_prefix)
|
||||
err = __mlx4_ib_query_gid(&dev->ib_dev, port, 0, &gid, 1);
|
||||
else
|
||||
gid.global.subnet_prefix =
|
||||
eqe->event.port_mgmt_change.params.port_info.gid_prefix;
|
||||
if (err) {
|
||||
pr_warn("Could not change QP1 subnet prefix for port %d: query_gid error (%d)\n",
|
||||
port, err);
|
||||
} else {
|
||||
pr_debug("Changing QP1 subnet prefix for port %d. old=0x%llx. new=0x%llx\n",
|
||||
port,
|
||||
(u64)atomic64_read(&dev->sriov.demux[port - 1].subnet_prefix),
|
||||
be64_to_cpu(gid.global.subnet_prefix));
|
||||
atomic64_set(&dev->sriov.demux[port - 1].subnet_prefix,
|
||||
be64_to_cpu(gid.global.subnet_prefix));
|
||||
}
|
||||
}
|
||||
mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
|
||||
/*if master, notify all slaves*/
|
||||
if (mlx4_is_master(dev->dev))
|
||||
|
@ -2154,6 +2175,8 @@ int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev)
|
|||
if (err)
|
||||
goto demux_err;
|
||||
dev->sriov.demux[i].guid_cache[0] = gid.global.interface_id;
|
||||
atomic64_set(&dev->sriov.demux[i].subnet_prefix,
|
||||
be64_to_cpu(gid.global.subnet_prefix));
|
||||
err = alloc_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1,
|
||||
&dev->sriov.sqps[i]);
|
||||
if (err)
|
||||
|
|
|
@ -489,7 +489,7 @@ static u8 get_leave_state(struct mcast_group *group)
|
|||
if (!group->members[i])
|
||||
leave_state |= (1 << i);
|
||||
|
||||
return leave_state & (group->rec.scope_join_state & 7);
|
||||
return leave_state & (group->rec.scope_join_state & 0xf);
|
||||
}
|
||||
|
||||
static int join_group(struct mcast_group *group, int slave, u8 join_mask)
|
||||
|
@ -564,8 +564,8 @@ static void mlx4_ib_mcg_timeout_handler(struct work_struct *work)
|
|||
} else
|
||||
mcg_warn_group(group, "DRIVER BUG\n");
|
||||
} else if (group->state == MCAST_LEAVE_SENT) {
|
||||
if (group->rec.scope_join_state & 7)
|
||||
group->rec.scope_join_state &= 0xf8;
|
||||
if (group->rec.scope_join_state & 0xf)
|
||||
group->rec.scope_join_state &= 0xf0;
|
||||
group->state = MCAST_IDLE;
|
||||
mutex_unlock(&group->lock);
|
||||
if (release_group(group, 1))
|
||||
|
@ -605,7 +605,7 @@ static int handle_leave_req(struct mcast_group *group, u8 leave_mask,
|
|||
static int handle_join_req(struct mcast_group *group, u8 join_mask,
|
||||
struct mcast_req *req)
|
||||
{
|
||||
u8 group_join_state = group->rec.scope_join_state & 7;
|
||||
u8 group_join_state = group->rec.scope_join_state & 0xf;
|
||||
int ref = 0;
|
||||
u16 status;
|
||||
struct ib_sa_mcmember_data *sa_data = (struct ib_sa_mcmember_data *)req->sa_mad.data;
|
||||
|
@ -690,8 +690,8 @@ static void mlx4_ib_mcg_work_handler(struct work_struct *work)
|
|||
u8 cur_join_state;
|
||||
|
||||
resp_join_state = ((struct ib_sa_mcmember_data *)
|
||||
group->response_sa_mad.data)->scope_join_state & 7;
|
||||
cur_join_state = group->rec.scope_join_state & 7;
|
||||
group->response_sa_mad.data)->scope_join_state & 0xf;
|
||||
cur_join_state = group->rec.scope_join_state & 0xf;
|
||||
|
||||
if (method == IB_MGMT_METHOD_GET_RESP) {
|
||||
/* successfull join */
|
||||
|
@ -710,7 +710,7 @@ process_requests:
|
|||
req = list_first_entry(&group->pending_list, struct mcast_req,
|
||||
group_list);
|
||||
sa_data = (struct ib_sa_mcmember_data *)req->sa_mad.data;
|
||||
req_join_state = sa_data->scope_join_state & 0x7;
|
||||
req_join_state = sa_data->scope_join_state & 0xf;
|
||||
|
||||
/* For a leave request, we will immediately answer the VF, and
|
||||
* update our internal counters. The actual leave will be sent
|
||||
|
|
|
@ -441,7 +441,7 @@ struct mlx4_ib_demux_ctx {
|
|||
struct workqueue_struct *wq;
|
||||
struct workqueue_struct *ud_wq;
|
||||
spinlock_t ud_lock;
|
||||
__be64 subnet_prefix;
|
||||
atomic64_t subnet_prefix;
|
||||
__be64 guid_cache[128];
|
||||
struct mlx4_ib_dev *dev;
|
||||
/* the following lock protects both mcg_table and mcg_mgid0_list */
|
||||
|
|
|
@ -2331,24 +2331,27 @@ static int build_mlx_header(struct mlx4_ib_sqp *sqp, struct ib_ud_wr *wr,
|
|||
sqp->ud_header.grh.flow_label =
|
||||
ah->av.ib.sl_tclass_flowlabel & cpu_to_be32(0xfffff);
|
||||
sqp->ud_header.grh.hop_limit = ah->av.ib.hop_limit;
|
||||
if (is_eth)
|
||||
if (is_eth) {
|
||||
memcpy(sqp->ud_header.grh.source_gid.raw, sgid.raw, 16);
|
||||
else {
|
||||
if (mlx4_is_mfunc(to_mdev(ib_dev)->dev)) {
|
||||
/* When multi-function is enabled, the ib_core gid
|
||||
* indexes don't necessarily match the hw ones, so
|
||||
* we must use our own cache */
|
||||
sqp->ud_header.grh.source_gid.global.subnet_prefix =
|
||||
to_mdev(ib_dev)->sriov.demux[sqp->qp.port - 1].
|
||||
subnet_prefix;
|
||||
sqp->ud_header.grh.source_gid.global.interface_id =
|
||||
to_mdev(ib_dev)->sriov.demux[sqp->qp.port - 1].
|
||||
guid_cache[ah->av.ib.gid_index];
|
||||
} else
|
||||
ib_get_cached_gid(ib_dev,
|
||||
be32_to_cpu(ah->av.ib.port_pd) >> 24,
|
||||
ah->av.ib.gid_index,
|
||||
&sqp->ud_header.grh.source_gid, NULL);
|
||||
} else {
|
||||
if (mlx4_is_mfunc(to_mdev(ib_dev)->dev)) {
|
||||
/* When multi-function is enabled, the ib_core gid
|
||||
* indexes don't necessarily match the hw ones, so
|
||||
* we must use our own cache
|
||||
*/
|
||||
sqp->ud_header.grh.source_gid.global.subnet_prefix =
|
||||
cpu_to_be64(atomic64_read(&(to_mdev(ib_dev)->sriov.
|
||||
demux[sqp->qp.port - 1].
|
||||
subnet_prefix)));
|
||||
sqp->ud_header.grh.source_gid.global.interface_id =
|
||||
to_mdev(ib_dev)->sriov.demux[sqp->qp.port - 1].
|
||||
guid_cache[ah->av.ib.gid_index];
|
||||
} else {
|
||||
ib_get_cached_gid(ib_dev,
|
||||
be32_to_cpu(ah->av.ib.port_pd) >> 24,
|
||||
ah->av.ib.gid_index,
|
||||
&sqp->ud_header.grh.source_gid, NULL);
|
||||
}
|
||||
}
|
||||
memcpy(sqp->ud_header.grh.destination_gid.raw,
|
||||
ah->av.ib.dgid, 16);
|
||||
|
|
|
@ -472,6 +472,7 @@ void ipoib_send(struct net_device *dev, struct sk_buff *skb,
|
|||
struct ipoib_ah *address, u32 qpn);
|
||||
void ipoib_reap_ah(struct work_struct *work);
|
||||
|
||||
struct ipoib_path *__path_find(struct net_device *dev, void *gid);
|
||||
void ipoib_mark_paths_invalid(struct net_device *dev);
|
||||
void ipoib_flush_paths(struct net_device *dev);
|
||||
struct ipoib_dev_priv *ipoib_intf_alloc(const char *format);
|
||||
|
|
|
@ -1299,6 +1299,8 @@ void ipoib_cm_destroy_tx(struct ipoib_cm_tx *tx)
|
|||
}
|
||||
}
|
||||
|
||||
#define QPN_AND_OPTIONS_OFFSET 4
|
||||
|
||||
static void ipoib_cm_tx_start(struct work_struct *work)
|
||||
{
|
||||
struct ipoib_dev_priv *priv = container_of(work, struct ipoib_dev_priv,
|
||||
|
@ -1307,6 +1309,7 @@ static void ipoib_cm_tx_start(struct work_struct *work)
|
|||
struct ipoib_neigh *neigh;
|
||||
struct ipoib_cm_tx *p;
|
||||
unsigned long flags;
|
||||
struct ipoib_path *path;
|
||||
int ret;
|
||||
|
||||
struct ib_sa_path_rec pathrec;
|
||||
|
@ -1319,7 +1322,19 @@ static void ipoib_cm_tx_start(struct work_struct *work)
|
|||
p = list_entry(priv->cm.start_list.next, typeof(*p), list);
|
||||
list_del_init(&p->list);
|
||||
neigh = p->neigh;
|
||||
|
||||
qpn = IPOIB_QPN(neigh->daddr);
|
||||
/*
|
||||
* As long as the search is with these 2 locks,
|
||||
* path existence indicates its validity.
|
||||
*/
|
||||
path = __path_find(dev, neigh->daddr + QPN_AND_OPTIONS_OFFSET);
|
||||
if (!path) {
|
||||
pr_info("%s ignore not valid path %pI6\n",
|
||||
__func__,
|
||||
neigh->daddr + QPN_AND_OPTIONS_OFFSET);
|
||||
goto free_neigh;
|
||||
}
|
||||
memcpy(&pathrec, &p->path->pathrec, sizeof pathrec);
|
||||
|
||||
spin_unlock_irqrestore(&priv->lock, flags);
|
||||
|
@ -1331,6 +1346,7 @@ static void ipoib_cm_tx_start(struct work_struct *work)
|
|||
spin_lock_irqsave(&priv->lock, flags);
|
||||
|
||||
if (ret) {
|
||||
free_neigh:
|
||||
neigh = p->neigh;
|
||||
if (neigh) {
|
||||
neigh->cm = NULL;
|
||||
|
|
|
@ -1028,8 +1028,17 @@ static void __ipoib_ib_dev_flush(struct ipoib_dev_priv *priv,
|
|||
}
|
||||
|
||||
if (level == IPOIB_FLUSH_LIGHT) {
|
||||
int oper_up;
|
||||
ipoib_mark_paths_invalid(dev);
|
||||
/* Set IPoIB operation as down to prevent races between:
|
||||
* the flush flow which leaves MCG and on the fly joins
|
||||
* which can happen during that time. mcast restart task
|
||||
* should deal with join requests we missed.
|
||||
*/
|
||||
oper_up = test_and_clear_bit(IPOIB_FLAG_OPER_UP, &priv->flags);
|
||||
ipoib_mcast_dev_flush(dev);
|
||||
if (oper_up)
|
||||
set_bit(IPOIB_FLAG_OPER_UP, &priv->flags);
|
||||
ipoib_flush_ah(dev);
|
||||
}
|
||||
|
||||
|
|
|
@ -481,7 +481,7 @@ int ipoib_set_mode(struct net_device *dev, const char *buf)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
static struct ipoib_path *__path_find(struct net_device *dev, void *gid)
|
||||
struct ipoib_path *__path_find(struct net_device *dev, void *gid)
|
||||
{
|
||||
struct ipoib_dev_priv *priv = netdev_priv(dev);
|
||||
struct rb_node *n = priv->path_tree.rb_node;
|
||||
|
|
|
@ -544,7 +544,7 @@ static struct notifier_block gic_cpu_notifier = {
|
|||
static u16 gic_compute_target_list(int *base_cpu, const struct cpumask *mask,
|
||||
unsigned long cluster_id)
|
||||
{
|
||||
int cpu = *base_cpu;
|
||||
int next_cpu, cpu = *base_cpu;
|
||||
unsigned long mpidr = cpu_logical_map(cpu);
|
||||
u16 tlist = 0;
|
||||
|
||||
|
@ -558,9 +558,10 @@ static u16 gic_compute_target_list(int *base_cpu, const struct cpumask *mask,
|
|||
|
||||
tlist |= 1 << (mpidr & 0xf);
|
||||
|
||||
cpu = cpumask_next(cpu, mask);
|
||||
if (cpu >= nr_cpu_ids)
|
||||
next_cpu = cpumask_next(cpu, mask);
|
||||
if (next_cpu >= nr_cpu_ids)
|
||||
goto out;
|
||||
cpu = next_cpu;
|
||||
|
||||
mpidr = cpu_logical_map(cpu);
|
||||
|
||||
|
|
|
@ -259,7 +259,7 @@ static int log_one_block(struct log_writes_c *lc,
|
|||
sector++;
|
||||
|
||||
atomic_inc(&lc->io_blocks);
|
||||
bio = bio_alloc(GFP_KERNEL, block->vec_cnt);
|
||||
bio = bio_alloc(GFP_KERNEL, min(block->vec_cnt, BIO_MAX_PAGES));
|
||||
if (!bio) {
|
||||
DMERR("Couldn't alloc log bio");
|
||||
goto error;
|
||||
|
@ -280,7 +280,7 @@ static int log_one_block(struct log_writes_c *lc,
|
|||
if (ret != block->vecs[i].bv_len) {
|
||||
atomic_inc(&lc->io_blocks);
|
||||
submit_bio(WRITE, bio);
|
||||
bio = bio_alloc(GFP_KERNEL, block->vec_cnt - i);
|
||||
bio = bio_alloc(GFP_KERNEL, min(block->vec_cnt - i, BIO_MAX_PAGES));
|
||||
if (!bio) {
|
||||
DMERR("Couldn't alloc log bio");
|
||||
goto error;
|
||||
|
|
|
@ -507,9 +507,8 @@ static int em28xx_i2c_xfer(struct i2c_adapter *i2c_adap,
|
|||
if (dev->disconnected)
|
||||
return -ENODEV;
|
||||
|
||||
rc = rt_mutex_trylock(&dev->i2c_bus_lock);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
if (!rt_mutex_trylock(&dev->i2c_bus_lock))
|
||||
return -EAGAIN;
|
||||
|
||||
/* Switch I2C bus if needed */
|
||||
if (bus != dev->cur_i2c_bus &&
|
||||
|
|
|
@ -1624,7 +1624,7 @@ static int sd_start(struct gspca_dev *gspca_dev)
|
|||
|
||||
static void sd_stopN(struct gspca_dev *gspca_dev)
|
||||
{
|
||||
struct sd *sd = (struct sd *) gspca_dev;
|
||||
struct sd *sd __maybe_unused = (struct sd *) gspca_dev;
|
||||
|
||||
command_pause(gspca_dev);
|
||||
|
||||
|
|
|
@ -243,7 +243,7 @@ static int sd_start(struct gspca_dev *gspca_dev)
|
|||
|
||||
static void sd_stopN(struct gspca_dev *gspca_dev)
|
||||
{
|
||||
struct sd *sd = (struct sd *) gspca_dev;
|
||||
struct sd *sd __maybe_unused = (struct sd *) gspca_dev;
|
||||
|
||||
konica_stream_off(gspca_dev);
|
||||
#if IS_ENABLED(CONFIG_INPUT)
|
||||
|
|
|
@ -837,7 +837,7 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,
|
|||
u8 *data, /* isoc packet */
|
||||
int len) /* iso packet length */
|
||||
{
|
||||
struct sd *sd = (struct sd *) gspca_dev;
|
||||
struct sd *sd __maybe_unused = (struct sd *) gspca_dev;
|
||||
int pkt_type;
|
||||
|
||||
if (data[0] == 0x5a) {
|
||||
|
|
|
@ -1460,6 +1460,7 @@ config MFD_WM8350
|
|||
config MFD_WM8350_I2C
|
||||
bool "Wolfson Microelectronics WM8350 with I2C"
|
||||
select MFD_WM8350
|
||||
select REGMAP_I2C
|
||||
depends on I2C=y
|
||||
help
|
||||
The WM8350 is an integrated audio and power management
|
||||
|
|
|
@ -50,8 +50,9 @@ static int regmap_atmel_hlcdc_reg_write(void *context, unsigned int reg,
|
|||
if (reg <= ATMEL_HLCDC_DIS) {
|
||||
u32 status;
|
||||
|
||||
readl_poll_timeout(hregmap->regs + ATMEL_HLCDC_SR, status,
|
||||
!(status & ATMEL_HLCDC_SIP), 1, 100);
|
||||
readl_poll_timeout_atomic(hregmap->regs + ATMEL_HLCDC_SR,
|
||||
status, !(status & ATMEL_HLCDC_SIP),
|
||||
1, 100);
|
||||
}
|
||||
|
||||
writel(val, hregmap->regs + reg);
|
||||
|
|
|
@ -46,9 +46,6 @@ static void rtsx_usb_sg_timed_out(unsigned long data)
|
|||
|
||||
dev_dbg(&ucr->pusb_intf->dev, "%s: sg transfer timed out", __func__);
|
||||
usb_sg_cancel(&ucr->current_sg);
|
||||
|
||||
/* we know the cancellation is caused by time-out */
|
||||
ucr->current_sg.status = -ETIMEDOUT;
|
||||
}
|
||||
|
||||
static int rtsx_usb_bulk_transfer_sglist(struct rtsx_ucr *ucr,
|
||||
|
@ -67,12 +64,15 @@ static int rtsx_usb_bulk_transfer_sglist(struct rtsx_ucr *ucr,
|
|||
ucr->sg_timer.expires = jiffies + msecs_to_jiffies(timeout);
|
||||
add_timer(&ucr->sg_timer);
|
||||
usb_sg_wait(&ucr->current_sg);
|
||||
del_timer_sync(&ucr->sg_timer);
|
||||
if (!del_timer_sync(&ucr->sg_timer))
|
||||
ret = -ETIMEDOUT;
|
||||
else
|
||||
ret = ucr->current_sg.status;
|
||||
|
||||
if (act_len)
|
||||
*act_len = ucr->current_sg.bytes;
|
||||
|
||||
return ucr->current_sg.status;
|
||||
return ret;
|
||||
}
|
||||
|
||||
int rtsx_usb_transfer_data(struct rtsx_ucr *ucr, unsigned int pipe,
|
||||
|
|
|
@ -798,14 +798,16 @@ static int pxamci_probe(struct platform_device *pdev)
|
|||
gpio_direction_output(gpio_power,
|
||||
host->pdata->gpio_power_invert);
|
||||
}
|
||||
if (gpio_is_valid(gpio_ro))
|
||||
if (gpio_is_valid(gpio_ro)) {
|
||||
ret = mmc_gpio_request_ro(mmc, gpio_ro);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "Failed requesting gpio_ro %d\n", gpio_ro);
|
||||
goto out;
|
||||
} else {
|
||||
mmc->caps2 |= host->pdata->gpio_card_ro_invert ?
|
||||
0 : MMC_CAP2_RO_ACTIVE_HIGH;
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "Failed requesting gpio_ro %d\n",
|
||||
gpio_ro);
|
||||
goto out;
|
||||
} else {
|
||||
mmc->caps2 |= host->pdata->gpio_card_ro_invert ?
|
||||
0 : MMC_CAP2_RO_ACTIVE_HIGH;
|
||||
}
|
||||
}
|
||||
|
||||
if (gpio_is_valid(gpio_cd))
|
||||
|
|
|
@ -241,6 +241,9 @@ static void nand_davinci_hwctl_4bit(struct mtd_info *mtd, int mode)
|
|||
unsigned long flags;
|
||||
u32 val;
|
||||
|
||||
/* Reset ECC hardware */
|
||||
davinci_nand_readl(info, NAND_4BIT_ECC1_OFFSET);
|
||||
|
||||
spin_lock_irqsave(&davinci_nand_lock, flags);
|
||||
|
||||
/* Start 4-bit ECC calculation for read/write */
|
||||
|
|
|
@ -21,6 +21,7 @@
|
|||
#include <linux/slab.h>
|
||||
#include <linux/netdevice.h>
|
||||
#include <linux/if_arp.h>
|
||||
#include <linux/workqueue.h>
|
||||
#include <linux/can.h>
|
||||
#include <linux/can/dev.h>
|
||||
#include <linux/can/skb.h>
|
||||
|
@ -471,9 +472,8 @@ EXPORT_SYMBOL_GPL(can_free_echo_skb);
|
|||
/*
|
||||
* CAN device restart for bus-off recovery
|
||||
*/
|
||||
static void can_restart(unsigned long data)
|
||||
static void can_restart(struct net_device *dev)
|
||||
{
|
||||
struct net_device *dev = (struct net_device *)data;
|
||||
struct can_priv *priv = netdev_priv(dev);
|
||||
struct net_device_stats *stats = &dev->stats;
|
||||
struct sk_buff *skb;
|
||||
|
@ -513,6 +513,14 @@ restart:
|
|||
netdev_err(dev, "Error %d during restart", err);
|
||||
}
|
||||
|
||||
static void can_restart_work(struct work_struct *work)
|
||||
{
|
||||
struct delayed_work *dwork = to_delayed_work(work);
|
||||
struct can_priv *priv = container_of(dwork, struct can_priv, restart_work);
|
||||
|
||||
can_restart(priv->dev);
|
||||
}
|
||||
|
||||
int can_restart_now(struct net_device *dev)
|
||||
{
|
||||
struct can_priv *priv = netdev_priv(dev);
|
||||
|
@ -526,8 +534,8 @@ int can_restart_now(struct net_device *dev)
|
|||
if (priv->state != CAN_STATE_BUS_OFF)
|
||||
return -EBUSY;
|
||||
|
||||
/* Runs as soon as possible in the timer context */
|
||||
mod_timer(&priv->restart_timer, jiffies);
|
||||
cancel_delayed_work_sync(&priv->restart_work);
|
||||
can_restart(dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -548,8 +556,8 @@ void can_bus_off(struct net_device *dev)
|
|||
netif_carrier_off(dev);
|
||||
|
||||
if (priv->restart_ms)
|
||||
mod_timer(&priv->restart_timer,
|
||||
jiffies + (priv->restart_ms * HZ) / 1000);
|
||||
schedule_delayed_work(&priv->restart_work,
|
||||
msecs_to_jiffies(priv->restart_ms));
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(can_bus_off);
|
||||
|
||||
|
@ -658,6 +666,7 @@ struct net_device *alloc_candev(int sizeof_priv, unsigned int echo_skb_max)
|
|||
return NULL;
|
||||
|
||||
priv = netdev_priv(dev);
|
||||
priv->dev = dev;
|
||||
|
||||
if (echo_skb_max) {
|
||||
priv->echo_skb_max = echo_skb_max;
|
||||
|
@ -667,7 +676,7 @@ struct net_device *alloc_candev(int sizeof_priv, unsigned int echo_skb_max)
|
|||
|
||||
priv->state = CAN_STATE_STOPPED;
|
||||
|
||||
init_timer(&priv->restart_timer);
|
||||
INIT_DELAYED_WORK(&priv->restart_work, can_restart_work);
|
||||
|
||||
return dev;
|
||||
}
|
||||
|
@ -748,8 +757,6 @@ int open_candev(struct net_device *dev)
|
|||
if (!netif_carrier_ok(dev))
|
||||
netif_carrier_on(dev);
|
||||
|
||||
setup_timer(&priv->restart_timer, can_restart, (unsigned long)dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(open_candev);
|
||||
|
@ -764,7 +771,7 @@ void close_candev(struct net_device *dev)
|
|||
{
|
||||
struct can_priv *priv = netdev_priv(dev);
|
||||
|
||||
del_timer_sync(&priv->restart_timer);
|
||||
cancel_delayed_work_sync(&priv->restart_work);
|
||||
can_flush_echo_skb(dev);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(close_candev);
|
||||
|
|
|
@ -302,13 +302,15 @@ void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void *desc,
|
|||
void *buffer, u16 buf_len)
|
||||
{
|
||||
struct i40e_aq_desc *aq_desc = (struct i40e_aq_desc *)desc;
|
||||
u16 len = le16_to_cpu(aq_desc->datalen);
|
||||
u16 len;
|
||||
u8 *buf = (u8 *)buffer;
|
||||
u16 i = 0;
|
||||
|
||||
if ((!(mask & hw->debug_mask)) || (desc == NULL))
|
||||
return;
|
||||
|
||||
len = le16_to_cpu(aq_desc->datalen);
|
||||
|
||||
i40e_debug(hw, mask,
|
||||
"AQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
|
||||
le16_to_cpu(aq_desc->opcode),
|
||||
|
|
|
@ -4176,7 +4176,7 @@ static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah,
|
|||
if (!AR_SREV_9330(ah) && !AR_SREV_9340(ah) && !AR_SREV_9531(ah))
|
||||
ar9003_hw_internal_regulator_apply(ah);
|
||||
ar9003_hw_apply_tuning_caps(ah);
|
||||
ar9003_hw_apply_minccapwr_thresh(ah, chan);
|
||||
ar9003_hw_apply_minccapwr_thresh(ah, is2ghz);
|
||||
ar9003_hw_txend_to_xpa_off_apply(ah, is2ghz);
|
||||
ar9003_hw_thermometer_apply(ah);
|
||||
ar9003_hw_thermo_cal_apply(ah);
|
||||
|
|
|
@ -726,8 +726,10 @@ int brcmf_sdiod_recv_chain(struct brcmf_sdio_dev *sdiodev,
|
|||
return -ENOMEM;
|
||||
err = brcmf_sdiod_buffrw(sdiodev, SDIO_FUNC_2, false, addr,
|
||||
glom_skb);
|
||||
if (err)
|
||||
if (err) {
|
||||
brcmu_pkt_buf_free_skb(glom_skb);
|
||||
goto done;
|
||||
}
|
||||
|
||||
skb_queue_walk(pktq, skb) {
|
||||
memcpy(skb->data, glom_skb->data, skb->len);
|
||||
|
|
|
@ -1079,8 +1079,10 @@ bool dma_rxfill(struct dma_pub *pub)
|
|||
|
||||
pa = dma_map_single(di->dmadev, p->data, di->rxbufsize,
|
||||
DMA_FROM_DEVICE);
|
||||
if (dma_mapping_error(di->dmadev, pa))
|
||||
if (dma_mapping_error(di->dmadev, pa)) {
|
||||
brcmu_pkt_buf_free_skb(p);
|
||||
return false;
|
||||
}
|
||||
|
||||
/* save the free packet pointer */
|
||||
di->rxp[rxout] = p;
|
||||
|
|
|
@ -87,7 +87,7 @@ void
|
|||
brcms_c_stf_ss_algo_channel_get(struct brcms_c_info *wlc, u16 *ss_algo_channel,
|
||||
u16 chanspec)
|
||||
{
|
||||
struct tx_power power;
|
||||
struct tx_power power = { };
|
||||
u8 siso_mcs_id, cdd_mcs_id, stbc_mcs_id;
|
||||
|
||||
/* Clear previous settings */
|
||||
|
|
|
@ -935,7 +935,8 @@ int iwl_mvm_start_fw_dbg_conf(struct iwl_mvm *mvm, u8 conf_id)
|
|||
}
|
||||
|
||||
mvm->fw_dbg_conf = conf_id;
|
||||
return ret;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
|
||||
|
|
|
@ -3992,8 +3992,8 @@ static int iwl_mvm_mac_get_survey(struct ieee80211_hw *hw, int idx,
|
|||
if (idx != 0)
|
||||
return -ENOENT;
|
||||
|
||||
if (fw_has_capa(&mvm->fw->ucode_capa,
|
||||
IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS))
|
||||
if (!fw_has_capa(&mvm->fw->ucode_capa,
|
||||
IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS))
|
||||
return -ENOENT;
|
||||
|
||||
mutex_lock(&mvm->mutex);
|
||||
|
@ -4039,8 +4039,8 @@ static void iwl_mvm_mac_sta_statistics(struct ieee80211_hw *hw,
|
|||
struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
|
||||
struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta);
|
||||
|
||||
if (fw_has_capa(&mvm->fw->ucode_capa,
|
||||
IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS))
|
||||
if (!fw_has_capa(&mvm->fw->ucode_capa,
|
||||
IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS))
|
||||
return;
|
||||
|
||||
/* if beacon filtering isn't on mac80211 does it anyway */
|
||||
|
|
|
@ -215,7 +215,7 @@ static int iwl_mvm_sf_config(struct iwl_mvm *mvm, u8 sta_id,
|
|||
enum iwl_sf_state new_state)
|
||||
{
|
||||
struct iwl_sf_cfg_cmd sf_cmd = {
|
||||
.state = cpu_to_le32(SF_FULL_ON),
|
||||
.state = cpu_to_le32(new_state),
|
||||
};
|
||||
struct ieee80211_sta *sta;
|
||||
int ret = 0;
|
||||
|
|
|
@ -1508,9 +1508,9 @@ static int iwl_pcie_enqueue_hcmd(struct iwl_trans *trans,
|
|||
|
||||
/* start the TFD with the scratchbuf */
|
||||
scratch_size = min_t(int, copy_size, IWL_HCMD_SCRATCHBUF_SIZE);
|
||||
memcpy(&txq->scratchbufs[q->write_ptr], &out_cmd->hdr, scratch_size);
|
||||
memcpy(&txq->scratchbufs[idx], &out_cmd->hdr, scratch_size);
|
||||
iwl_pcie_txq_build_tfd(trans, txq,
|
||||
iwl_pcie_get_scratchbuf_dma(txq, q->write_ptr),
|
||||
iwl_pcie_get_scratchbuf_dma(txq, idx),
|
||||
scratch_size, true);
|
||||
|
||||
/* map first command fragment, if any remains */
|
||||
|
|
|
@ -352,7 +352,7 @@ static int fdp_nci_patch_otp(struct nci_dev *ndev)
|
|||
{
|
||||
struct fdp_nci_info *info = nci_get_drvdata(ndev);
|
||||
struct device *dev = &info->phy->i2c_dev->dev;
|
||||
u8 conn_id;
|
||||
int conn_id;
|
||||
int r = 0;
|
||||
|
||||
if (info->otp_version >= info->otp_patch_version)
|
||||
|
@ -423,7 +423,7 @@ static int fdp_nci_patch_ram(struct nci_dev *ndev)
|
|||
{
|
||||
struct fdp_nci_info *info = nci_get_drvdata(ndev);
|
||||
struct device *dev = &info->phy->i2c_dev->dev;
|
||||
u8 conn_id;
|
||||
int conn_id;
|
||||
int r = 0;
|
||||
|
||||
if (info->ram_version >= info->ram_patch_version)
|
||||
|
|
|
@ -815,6 +815,7 @@ static int of_pmu_irq_cfg(struct arm_pmu *pmu)
|
|||
if (i > 0 && spi != using_spi) {
|
||||
pr_err("PPI/SPI IRQ type mismatch for %s!\n",
|
||||
dn->name);
|
||||
of_node_put(dn);
|
||||
kfree(irqs);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
|
|
@ -73,6 +73,12 @@ static void uniphier_pctl_pin_dbg_show(struct pinctrl_dev *pctldev,
|
|||
case UNIPHIER_PIN_PULL_DOWN:
|
||||
pull_dir = "DOWN";
|
||||
break;
|
||||
case UNIPHIER_PIN_PULL_UP_FIXED:
|
||||
pull_dir = "UP(FIXED)";
|
||||
break;
|
||||
case UNIPHIER_PIN_PULL_DOWN_FIXED:
|
||||
pull_dir = "DOWN(FIXED)";
|
||||
break;
|
||||
case UNIPHIER_PIN_PULL_NONE:
|
||||
pull_dir = "NONE";
|
||||
break;
|
||||
|
|
|
@ -166,29 +166,30 @@ static const struct regulator_desc pm8x41_hfsmps = {
|
|||
static const struct regulator_desc pm8841_ftsmps = {
|
||||
.linear_ranges = (struct regulator_linear_range[]) {
|
||||
REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000),
|
||||
REGULATOR_LINEAR_RANGE(700000, 185, 339, 10000),
|
||||
REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
|
||||
},
|
||||
.n_linear_ranges = 2,
|
||||
.n_voltages = 340,
|
||||
.n_voltages = 262,
|
||||
.ops = &rpm_smps_ldo_ops,
|
||||
};
|
||||
|
||||
static const struct regulator_desc pm8941_boost = {
|
||||
.linear_ranges = (struct regulator_linear_range[]) {
|
||||
REGULATOR_LINEAR_RANGE(4000000, 0, 15, 100000),
|
||||
REGULATOR_LINEAR_RANGE(4000000, 0, 30, 50000),
|
||||
},
|
||||
.n_linear_ranges = 1,
|
||||
.n_voltages = 16,
|
||||
.n_voltages = 31,
|
||||
.ops = &rpm_smps_ldo_ops,
|
||||
};
|
||||
|
||||
static const struct regulator_desc pm8941_pldo = {
|
||||
.linear_ranges = (struct regulator_linear_range[]) {
|
||||
REGULATOR_LINEAR_RANGE( 750000, 0, 30, 25000),
|
||||
REGULATOR_LINEAR_RANGE(1500000, 31, 99, 50000),
|
||||
REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
|
||||
REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
|
||||
REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
|
||||
},
|
||||
.n_linear_ranges = 2,
|
||||
.n_voltages = 100,
|
||||
.n_linear_ranges = 3,
|
||||
.n_voltages = 164,
|
||||
.ops = &rpm_smps_ldo_ops,
|
||||
};
|
||||
|
||||
|
|
|
@ -1050,6 +1050,8 @@ static struct regulator_ops spmi_vs_ops = {
|
|||
.set_pull_down = spmi_regulator_common_set_pull_down,
|
||||
.set_soft_start = spmi_regulator_common_set_soft_start,
|
||||
.set_over_current_protection = spmi_regulator_vs_ocp,
|
||||
.set_mode = spmi_regulator_common_set_mode,
|
||||
.get_mode = spmi_regulator_common_get_mode,
|
||||
};
|
||||
|
||||
static struct regulator_ops spmi_boost_ops = {
|
||||
|
@ -1440,6 +1442,7 @@ static const struct spmi_regulator_data pm8941_regulators[] = {
|
|||
{ "s1", 0x1400, "vdd_s1", },
|
||||
{ "s2", 0x1700, "vdd_s2", },
|
||||
{ "s3", 0x1a00, "vdd_s3", },
|
||||
{ "s4", 0xa000, },
|
||||
{ "l1", 0x4000, "vdd_l1_l3", },
|
||||
{ "l2", 0x4100, "vdd_l2_lvs_1_2_3", },
|
||||
{ "l3", 0x4200, "vdd_l1_l3", },
|
||||
|
@ -1467,8 +1470,8 @@ static const struct spmi_regulator_data pm8941_regulators[] = {
|
|||
{ "lvs1", 0x8000, "vdd_l2_lvs_1_2_3", },
|
||||
{ "lvs2", 0x8100, "vdd_l2_lvs_1_2_3", },
|
||||
{ "lvs3", 0x8200, "vdd_l2_lvs_1_2_3", },
|
||||
{ "mvs1", 0x8300, "vin_5vs", },
|
||||
{ "mvs2", 0x8400, "vin_5vs", },
|
||||
{ "5vs1", 0x8300, "vin_5vs", "ocp-5vs1", },
|
||||
{ "5vs2", 0x8400, "vin_5vs", "ocp-5vs2", },
|
||||
{ }
|
||||
};
|
||||
|
||||
|
|
|
@ -954,8 +954,8 @@ int fnic_alloc_rq_frame(struct vnic_rq *rq)
|
|||
skb_put(skb, len);
|
||||
pa = pci_map_single(fnic->pdev, skb->data, len, PCI_DMA_FROMDEVICE);
|
||||
|
||||
r = pci_dma_mapping_error(fnic->pdev, pa);
|
||||
if (r) {
|
||||
if (pci_dma_mapping_error(fnic->pdev, pa)) {
|
||||
r = -ENOMEM;
|
||||
printk(KERN_ERR "PCI mapping failed with error %d\n", r);
|
||||
goto free_skb;
|
||||
}
|
||||
|
@ -1093,8 +1093,8 @@ static int fnic_send_frame(struct fnic *fnic, struct fc_frame *fp)
|
|||
|
||||
pa = pci_map_single(fnic->pdev, eth_hdr, tot_len, PCI_DMA_TODEVICE);
|
||||
|
||||
ret = pci_dma_mapping_error(fnic->pdev, pa);
|
||||
if (ret) {
|
||||
if (pci_dma_mapping_error(fnic->pdev, pa)) {
|
||||
ret = -ENOMEM;
|
||||
printk(KERN_ERR "DMA map failed with error %d\n", ret);
|
||||
goto free_skb_on_err;
|
||||
}
|
||||
|
|
|
@ -263,6 +263,9 @@ static void sh_msiof_spi_set_clk_regs(struct sh_msiof_spi_priv *p,
|
|||
|
||||
for (k = 0; k < ARRAY_SIZE(sh_msiof_spi_div_table); k++) {
|
||||
brps = DIV_ROUND_UP(div, sh_msiof_spi_div_table[k].div);
|
||||
/* SCR_BRDV_DIV_1 is valid only if BRPS is x 1/1 or x 1/2 */
|
||||
if (sh_msiof_spi_div_table[k].div == 1 && brps > 2)
|
||||
continue;
|
||||
if (brps <= 32) /* max of brdv is 32 */
|
||||
break;
|
||||
}
|
||||
|
|
|
@ -392,11 +392,11 @@ static void fbtft_update_display(struct fbtft_par *par, unsigned start_line,
|
|||
|
||||
if (unlikely(timeit)) {
|
||||
ts_end = ktime_get();
|
||||
if (ktime_to_ns(par->update_time))
|
||||
if (!ktime_to_ns(par->update_time))
|
||||
par->update_time = ts_start;
|
||||
|
||||
par->update_time = ts_start;
|
||||
fps = ktime_us_delta(ts_start, par->update_time);
|
||||
par->update_time = ts_start;
|
||||
fps = fps ? 1000000 / fps : 0;
|
||||
|
||||
throughput = ktime_us_delta(ts_end, ts_start);
|
||||
|
|
|
@ -121,6 +121,7 @@ static void usbtmc_delete(struct kref *kref)
|
|||
struct usbtmc_device_data *data = to_usbtmc_data(kref);
|
||||
|
||||
usb_put_dev(data->usb_dev);
|
||||
kfree(data);
|
||||
}
|
||||
|
||||
static int usbtmc_open(struct inode *inode, struct file *filp)
|
||||
|
@ -1104,7 +1105,7 @@ static int usbtmc_probe(struct usb_interface *intf,
|
|||
|
||||
dev_dbg(&intf->dev, "%s called\n", __func__);
|
||||
|
||||
data = devm_kzalloc(&intf->dev, sizeof(*data), GFP_KERNEL);
|
||||
data = kmalloc(sizeof(*data), GFP_KERNEL);
|
||||
if (!data)
|
||||
return -ENOMEM;
|
||||
|
||||
|
|
|
@ -1878,11 +1878,8 @@ static int qe_get_frame(struct usb_gadget *gadget)
|
|||
|
||||
tmp = in_be16(&udc->usb_param->frame_n);
|
||||
if (tmp & 0x8000)
|
||||
tmp = tmp & 0x07ff;
|
||||
else
|
||||
tmp = -EINVAL;
|
||||
|
||||
return (int)tmp;
|
||||
return tmp & 0x07ff;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
static int fsl_qe_start(struct usb_gadget *gadget,
|
||||
|
|
|
@ -898,24 +898,6 @@ static int tower_probe (struct usb_interface *interface, const struct usb_device
|
|||
dev->interrupt_in_interval = interrupt_in_interval ? interrupt_in_interval : dev->interrupt_in_endpoint->bInterval;
|
||||
dev->interrupt_out_interval = interrupt_out_interval ? interrupt_out_interval : dev->interrupt_out_endpoint->bInterval;
|
||||
|
||||
/* we can register the device now, as it is ready */
|
||||
usb_set_intfdata (interface, dev);
|
||||
|
||||
retval = usb_register_dev (interface, &tower_class);
|
||||
|
||||
if (retval) {
|
||||
/* something prevented us from registering this driver */
|
||||
dev_err(idev, "Not able to get a minor for this device.\n");
|
||||
usb_set_intfdata (interface, NULL);
|
||||
goto error;
|
||||
}
|
||||
dev->minor = interface->minor;
|
||||
|
||||
/* let the user know what node this device is now attached to */
|
||||
dev_info(&interface->dev, "LEGO USB Tower #%d now attached to major "
|
||||
"%d minor %d\n", (dev->minor - LEGO_USB_TOWER_MINOR_BASE),
|
||||
USB_MAJOR, dev->minor);
|
||||
|
||||
/* get the firmware version and log it */
|
||||
result = usb_control_msg (udev,
|
||||
usb_rcvctrlpipe(udev, 0),
|
||||
|
@ -936,6 +918,23 @@ static int tower_probe (struct usb_interface *interface, const struct usb_device
|
|||
get_version_reply.minor,
|
||||
le16_to_cpu(get_version_reply.build_no));
|
||||
|
||||
/* we can register the device now, as it is ready */
|
||||
usb_set_intfdata (interface, dev);
|
||||
|
||||
retval = usb_register_dev (interface, &tower_class);
|
||||
|
||||
if (retval) {
|
||||
/* something prevented us from registering this driver */
|
||||
dev_err(idev, "Not able to get a minor for this device.\n");
|
||||
usb_set_intfdata (interface, NULL);
|
||||
goto error;
|
||||
}
|
||||
dev->minor = interface->minor;
|
||||
|
||||
/* let the user know what node this device is now attached to */
|
||||
dev_info(&interface->dev, "LEGO USB Tower #%d now attached to major "
|
||||
"%d minor %d\n", (dev->minor - LEGO_USB_TOWER_MINOR_BASE),
|
||||
USB_MAJOR, dev->minor);
|
||||
|
||||
exit:
|
||||
return retval;
|
||||
|
|
|
@ -661,7 +661,7 @@ static int musb_tx_dma_set_mode_mentor(struct dma_controller *dma,
|
|||
csr &= ~(MUSB_TXCSR_AUTOSET | MUSB_TXCSR_DMAMODE);
|
||||
csr |= MUSB_TXCSR_DMAENAB; /* against programmer's guide */
|
||||
}
|
||||
channel->desired_mode = mode;
|
||||
channel->desired_mode = *mode;
|
||||
musb_writew(epio, MUSB_TXCSR, csr);
|
||||
|
||||
return 0;
|
||||
|
@ -2008,10 +2008,8 @@ void musb_host_rx(struct musb *musb, u8 epnum)
|
|||
qh->offset,
|
||||
urb->transfer_buffer_length);
|
||||
|
||||
done = musb_rx_dma_in_inventra_cppi41(c, hw_ep, qh,
|
||||
urb, xfer_len,
|
||||
iso_err);
|
||||
if (done)
|
||||
if (musb_rx_dma_in_inventra_cppi41(c, hw_ep, qh, urb,
|
||||
xfer_len, iso_err))
|
||||
goto finish;
|
||||
else
|
||||
dev_err(musb->controller, "error: rx_dma failed\n");
|
||||
|
|
|
@ -117,6 +117,7 @@ static const struct usb_device_id id_table[] = {
|
|||
{ USB_DEVICE(0x10C4, 0x8411) }, /* Kyocera GPS Module */
|
||||
{ USB_DEVICE(0x10C4, 0x8418) }, /* IRZ Automation Teleport SG-10 GSM/GPRS Modem */
|
||||
{ USB_DEVICE(0x10C4, 0x846E) }, /* BEI USB Sensor Interface (VCP) */
|
||||
{ USB_DEVICE(0x10C4, 0x8470) }, /* Juniper Networks BX Series System Console */
|
||||
{ USB_DEVICE(0x10C4, 0x8477) }, /* Balluff RFID */
|
||||
{ USB_DEVICE(0x10C4, 0x84B6) }, /* Starizona Hyperion */
|
||||
{ USB_DEVICE(0x10C4, 0x85EA) }, /* AC-Services IBUS-IF */
|
||||
|
@ -784,7 +785,7 @@ static void cp210x_set_termios(struct tty_struct *tty,
|
|||
} else {
|
||||
modem_ctl[0] &= ~0x7B;
|
||||
modem_ctl[0] |= 0x01;
|
||||
modem_ctl[1] |= 0x40;
|
||||
modem_ctl[1] = 0x40;
|
||||
dev_dbg(dev, "%s - flow control = NONE\n", __func__);
|
||||
}
|
||||
|
||||
|
|
7
fs/aio.c
7
fs/aio.c
|
@ -239,7 +239,12 @@ static struct dentry *aio_mount(struct file_system_type *fs_type,
|
|||
static const struct dentry_operations ops = {
|
||||
.d_dname = simple_dname,
|
||||
};
|
||||
return mount_pseudo(fs_type, "aio:", NULL, &ops, AIO_RING_MAGIC);
|
||||
struct dentry *root = mount_pseudo(fs_type, "aio:", NULL, &ops,
|
||||
AIO_RING_MAGIC);
|
||||
|
||||
if (!IS_ERR(root))
|
||||
root->d_sb->s_iflags |= SB_I_NOEXEC;
|
||||
return root;
|
||||
}
|
||||
|
||||
/* aio_setup
|
||||
|
|
|
@ -1358,15 +1358,20 @@ static int fill_readdir_cache(struct inode *dir, struct dentry *dn,
|
|||
|
||||
if (!ctl->page || pgoff != page_index(ctl->page)) {
|
||||
ceph_readdir_cache_release(ctl);
|
||||
ctl->page = grab_cache_page(&dir->i_data, pgoff);
|
||||
if (idx == 0)
|
||||
ctl->page = grab_cache_page(&dir->i_data, pgoff);
|
||||
else
|
||||
ctl->page = find_lock_page(&dir->i_data, pgoff);
|
||||
if (!ctl->page) {
|
||||
ctl->index = -1;
|
||||
return -ENOMEM;
|
||||
return idx == 0 ? -ENOMEM : 0;
|
||||
}
|
||||
/* reading/filling the cache are serialized by
|
||||
* i_mutex, no need to use page lock */
|
||||
unlock_page(ctl->page);
|
||||
ctl->dentries = kmap(ctl->page);
|
||||
if (idx == 0)
|
||||
memset(ctl->dentries, 0, PAGE_CACHE_SIZE);
|
||||
}
|
||||
|
||||
if (req->r_dir_release_cnt == atomic64_read(&ci->i_release_count) &&
|
||||
|
|
|
@ -912,7 +912,7 @@ static __be32 nfs4_callback_compound(struct svc_rqst *rqstp, void *argp, void *r
|
|||
if (hdr_arg.minorversion == 0) {
|
||||
cps.clp = nfs4_find_client_ident(SVC_NET(rqstp), hdr_arg.cb_ident);
|
||||
if (!cps.clp || !check_gss_callback_principal(cps.clp, rqstp))
|
||||
return rpc_drop_reply;
|
||||
goto out_invalidcred;
|
||||
}
|
||||
|
||||
cps.minorversion = hdr_arg.minorversion;
|
||||
|
@ -940,6 +940,10 @@ static __be32 nfs4_callback_compound(struct svc_rqst *rqstp, void *argp, void *r
|
|||
nfs_put_client(cps.clp);
|
||||
dprintk("%s: done, status = %u\n", __func__, ntohl(status));
|
||||
return rpc_success;
|
||||
|
||||
out_invalidcred:
|
||||
pr_warn_ratelimited("NFS: NFSv4 callback contains invalid cred\n");
|
||||
return rpc_autherr_badcred;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -374,8 +374,7 @@ static int filelayout_commit_done_cb(struct rpc_task *task,
|
|||
return -EAGAIN;
|
||||
}
|
||||
|
||||
if (data->verf.committed == NFS_UNSTABLE)
|
||||
pnfs_set_layoutcommit(data->inode, data->lseg, data->lwb);
|
||||
pnfs_set_layoutcommit(data->inode, data->lseg, data->lwb);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -1414,8 +1414,7 @@ static int ff_layout_commit_done_cb(struct rpc_task *task,
|
|||
return -EAGAIN;
|
||||
}
|
||||
|
||||
if (data->verf.committed == NFS_UNSTABLE
|
||||
&& ff_layout_need_layoutcommit(data->lseg))
|
||||
if (ff_layout_need_layoutcommit(data->lseg))
|
||||
pnfs_set_layoutcommit(data->inode, data->lseg, data->lwb);
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -178,7 +178,6 @@ static loff_t pstore_file_llseek(struct file *file, loff_t off, int whence)
|
|||
}
|
||||
|
||||
static const struct file_operations pstore_file_operations = {
|
||||
.owner = THIS_MODULE,
|
||||
.open = pstore_file_open,
|
||||
.read = pstore_file_read,
|
||||
.llseek = pstore_file_llseek,
|
||||
|
|
|
@ -32,6 +32,7 @@ enum can_mode {
|
|||
* CAN common private data
|
||||
*/
|
||||
struct can_priv {
|
||||
struct net_device *dev;
|
||||
struct can_device_stats can_stats;
|
||||
|
||||
struct can_bittiming bittiming, data_bittiming;
|
||||
|
@ -47,7 +48,7 @@ struct can_priv {
|
|||
u32 ctrlmode_static; /* static enabled options for driver/hardware */
|
||||
|
||||
int restart_ms;
|
||||
struct timer_list restart_timer;
|
||||
struct delayed_work restart_work;
|
||||
|
||||
int (*do_set_bittiming)(struct net_device *dev);
|
||||
int (*do_set_data_bittiming)(struct net_device *dev);
|
||||
|
|
|
@ -350,7 +350,7 @@ static inline int pm80x_dev_suspend(struct device *dev)
|
|||
int irq = platform_get_irq(pdev, 0);
|
||||
|
||||
if (device_may_wakeup(dev))
|
||||
set_bit((1 << irq), &chip->wu_flag);
|
||||
set_bit(irq, &chip->wu_flag);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -362,7 +362,7 @@ static inline int pm80x_dev_resume(struct device *dev)
|
|||
int irq = platform_get_irq(pdev, 0);
|
||||
|
||||
if (device_may_wakeup(dev))
|
||||
clear_bit((1 << irq), &chip->wu_flag);
|
||||
clear_bit(irq, &chip->wu_flag);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -74,7 +74,7 @@ static inline void nvmem_cell_put(struct nvmem_cell *cell)
|
|||
{
|
||||
}
|
||||
|
||||
static inline char *nvmem_cell_read(struct nvmem_cell *cell, size_t *len)
|
||||
static inline void *nvmem_cell_read(struct nvmem_cell *cell, size_t *len)
|
||||
{
|
||||
return ERR_PTR(-ENOSYS);
|
||||
}
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Add table
Reference in a new issue