Merge "ARM: dts: msm: Add support for Lpass PIL on msmtriton"
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2 changed files with 55 additions and 0 deletions
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@ -133,4 +133,27 @@
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compatible = "qcom,smp2pgpio-sleepstate-out";
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gpios = <&smp2pgpio_sleepstate_2_out 0 0>;
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};
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/* ssr - inbound entry from lpass */
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smp2pgpio_ssr_smp2p_2_in: qcom,smp2pgpio-ssr-smp2p-2-in {
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compatible = "qcom,smp2pgpio";
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qcom,entry-name = "slave-kernel";
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qcom,remote-pid = <2>;
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qcom,is-inbound;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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/* ssr - outbound entry to lpass */
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smp2pgpio_ssr_smp2p_2_out: qcom,smp2pgpio-ssr-smp2p-2-out {
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compatible = "qcom,smp2pgpio";
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qcom,entry-name = "master-kernel";
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qcom,remote-pid = <2>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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@ -541,6 +541,38 @@
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<0 425 0>; /* CE11 */
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qcom,wlan-msa-memory = <0x100000>;
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};
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qcom,lpass@15700000 {
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compatible = "qcom,pil-tz-generic";
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reg = <0x15700000 0x00100>;
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interrupts = <0 162 1>;
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vdd_cx-supply = <&pmfalcon_s3b_level>;
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qcom,proxy-reg-names = "vdd_cx";
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qcom,vdd_cx-uV-uA = <RPM_SMD_REGULATOR_LEVEL_TURBO 100000>;
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clocks = <&clock_rpmcc CXO_PIL_LPASS_CLK>;
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clock-names = "xo";
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qcom,proxy-clock-names = "xo";
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qcom,pas-id = <1>;
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qcom,proxy-timeout-ms = <10000>;
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qcom,smem-id = <423>;
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qcom,sysmon-id = <1>;
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qcom,ssctl-instance-id = <0x14>;
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qcom,firmware-name = "adsp";
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memory-region = <&adsp_fw_mem>;
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/* GPIO inputs from lpass */
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qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>;
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qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>;
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qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>;
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qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_2_in 3 0>;
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/* GPIO output to lpass */
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qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;
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status = "ok";
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};
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};
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#include "msmtriton-ion.dtsi"
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