cxl: Add documentation for userspace APIs
This documentation gives an overview of the hardware architecture, userspace APIs via /dev/cxl/afuM.N and the syfs files. It also adds a MAINTAINERS file entry for cxl. Signed-off-by: Ian Munsie <imunsie@au1.ibm.com> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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129
Documentation/ABI/testing/sysfs-class-cxl
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129
Documentation/ABI/testing/sysfs-class-cxl
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Slave contexts (eg. /sys/class/cxl/afu0.0s):
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What: /sys/class/cxl/<afu>/irqs_max
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Date: September 2014
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Contact: linuxppc-dev@lists.ozlabs.org
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Description: read/write
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Decimal value of maximum number of interrupts that can be
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requested by userspace. The default on probe is the maximum
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that hardware can support (eg. 2037). Write values will limit
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userspace applications to that many userspace interrupts. Must
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be >= irqs_min.
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What: /sys/class/cxl/<afu>/irqs_min
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Date: September 2014
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Contact: linuxppc-dev@lists.ozlabs.org
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Description: read only
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Decimal value of the minimum number of interrupts that
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userspace must request on a CXL_START_WORK ioctl. Userspace may
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omit the num_interrupts field in the START_WORK IOCTL to get
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this minimum automatically.
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What: /sys/class/cxl/<afu>/mmio_size
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Date: September 2014
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Contact: linuxppc-dev@lists.ozlabs.org
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Description: read only
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Decimal value of the size of the MMIO space that may be mmaped
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by userspace.
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What: /sys/class/cxl/<afu>/modes_supported
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Date: September 2014
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Contact: linuxppc-dev@lists.ozlabs.org
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Description: read only
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List of the modes this AFU supports. One per line.
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Valid entries are: "dedicated_process" and "afu_directed"
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What: /sys/class/cxl/<afu>/mode
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Date: September 2014
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Contact: linuxppc-dev@lists.ozlabs.org
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Description: read/write
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The current mode the AFU is using. Will be one of the modes
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given in modes_supported. Writing will change the mode
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provided that no user contexts are attached.
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What: /sys/class/cxl/<afu>/prefault_mode
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Date: September 2014
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Contact: linuxppc-dev@lists.ozlabs.org
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Description: read/write
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Set the mode for prefaulting in segments into the segment table
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when performing the START_WORK ioctl. Possible values:
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none: No prefaulting (default)
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work_element_descriptor: Treat the work element
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descriptor as an effective address and
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prefault what it points to.
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all: all segments process calling START_WORK maps.
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What: /sys/class/cxl/<afu>/reset
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Date: September 2014
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Contact: linuxppc-dev@lists.ozlabs.org
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Description: write only
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Writing 1 here will reset the AFU provided there are not
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contexts active on the AFU.
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What: /sys/class/cxl/<afu>/api_version
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Date: September 2014
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Contact: linuxppc-dev@lists.ozlabs.org
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Description: read only
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Decimal value of the current version of the kernel/user API.
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What: /sys/class/cxl/<afu>/api_version_com
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Date: September 2014
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Contact: linuxppc-dev@lists.ozlabs.org
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Description: read only
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Decimal value of the the lowest version of the userspace API
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this this kernel supports.
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Master contexts (eg. /sys/class/cxl/afu0.0m)
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What: /sys/class/cxl/<afu>m/mmio_size
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Date: September 2014
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Contact: linuxppc-dev@lists.ozlabs.org
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Description: read only
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Decimal value of the size of the MMIO space that may be mmaped
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by userspace. This includes all slave contexts space also.
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What: /sys/class/cxl/<afu>m/pp_mmio_len
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Date: September 2014
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Contact: linuxppc-dev@lists.ozlabs.org
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Description: read only
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Decimal value of the Per Process MMIO space length.
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What: /sys/class/cxl/<afu>m/pp_mmio_off
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Date: September 2014
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Contact: linuxppc-dev@lists.ozlabs.org
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Description: read only
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Decimal value of the Per Process MMIO space offset.
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Card info (eg. /sys/class/cxl/card0)
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What: /sys/class/cxl/<card>/caia_version
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Date: September 2014
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Contact: linuxppc-dev@lists.ozlabs.org
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Description: read only
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Identifies the CAIA Version the card implements.
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What: /sys/class/cxl/<card>/psl_version
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Date: September 2014
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Contact: linuxppc-dev@lists.ozlabs.org
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Description: read only
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Identifies the revision level of the PSL.
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What: /sys/class/cxl/<card>/base_image
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Date: September 2014
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Contact: linuxppc-dev@lists.ozlabs.org
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Description: read only
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Identifies the revision level of the base image for devices
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that support loadable PSLs. For FPGAs this field identifies
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the image contained in the on-adapter flash which is loaded
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during the initial program load.
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What: /sys/class/cxl/<card>/image_loaded
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Date: September 2014
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Contact: linuxppc-dev@lists.ozlabs.org
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Description: read only
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Will return "user" or "factory" depending on the image loaded
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onto the card.
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@ -313,6 +313,7 @@ Code Seq#(hex) Include File Comments
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0xB1 00-1F PPPoX <mailto:mostrows@styx.uwaterloo.ca>
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0xB1 00-1F PPPoX <mailto:mostrows@styx.uwaterloo.ca>
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0xB3 00 linux/mmc/ioctl.h
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0xB3 00 linux/mmc/ioctl.h
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0xC0 00-0F linux/usb/iowarrior.h
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0xC0 00-0F linux/usb/iowarrior.h
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0xCA 00-0F uapi/misc/cxl.h
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0xCB 00-1F CBM serial IEC bus in development:
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0xCB 00-1F CBM serial IEC bus in development:
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<mailto:michael.klein@puffin.lb.shuttle.de>
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<mailto:michael.klein@puffin.lb.shuttle.de>
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0xCD 01 linux/reiserfs_fs.h
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0xCD 01 linux/reiserfs_fs.h
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@ -11,6 +11,8 @@ bootwrapper.txt
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cpu_features.txt
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cpu_features.txt
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- info on how we support a variety of CPUs with minimal compile-time
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- info on how we support a variety of CPUs with minimal compile-time
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options.
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options.
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cxl.txt
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- Overview of the CXL driver.
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eeh-pci-error-recovery.txt
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eeh-pci-error-recovery.txt
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- info on PCI Bus EEH Error Recovery
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- info on PCI Bus EEH Error Recovery
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firmware-assisted-dump.txt
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firmware-assisted-dump.txt
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379
Documentation/powerpc/cxl.txt
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379
Documentation/powerpc/cxl.txt
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Coherent Accelerator Interface (CXL)
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====================================
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Introduction
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============
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The coherent accelerator interface is designed to allow the
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coherent connection of accelerators (FPGAs and other devices) to a
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POWER system. These devices need to adhere to the Coherent
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Accelerator Interface Architecture (CAIA).
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IBM refers to this as the Coherent Accelerator Processor Interface
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or CAPI. In the kernel it's referred to by the name CXL to avoid
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confusion with the ISDN CAPI subsystem.
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Coherent in this context means that the accelerator and CPUs can
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both access system memory directly and with the same effective
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addresses.
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Hardware overview
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=================
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POWER8 FPGA
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+----------+ +---------+
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| CPU | | AFU |
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+----------+ +---------+
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| PHB | | |
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| +------+ | PSL |
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| | CAPP |<------>| |
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+---+------+ PCIE +---------+
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The POWER8 chip has a Coherently Attached Processor Proxy (CAPP)
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unit which is part of the PCIe Host Bridge (PHB). This is managed
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by Linux by calls into OPAL. Linux doesn't directly program the
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CAPP.
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The FPGA (or coherently attached device) consists of two parts.
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The POWER Service Layer (PSL) and the Accelerator Function Unit
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(AFU). The AFU is used to implement specific functionality behind
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the PSL. The PSL, among other things, provides memory address
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translation services to allow each AFU direct access to userspace
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memory.
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The AFU is the core part of the accelerator (eg. the compression,
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crypto etc function). The kernel has no knowledge of the function
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of the AFU. Only userspace interacts directly with the AFU.
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The PSL provides the translation and interrupt services that the
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AFU needs. This is what the kernel interacts with. For example, if
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the AFU needs to read a particular effective address, it sends
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that address to the PSL, the PSL then translates it, fetches the
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data from memory and returns it to the AFU. If the PSL has a
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translation miss, it interrupts the kernel and the kernel services
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the fault. The context to which this fault is serviced is based on
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who owns that acceleration function.
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AFU Modes
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=========
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There are two programming modes supported by the AFU. Dedicated
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and AFU directed. AFU may support one or both modes.
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When using dedicated mode only one MMU context is supported. In
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this mode, only one userspace process can use the accelerator at
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time.
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When using AFU directed mode, up to 16K simultaneous contexts can
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be supported. This means up to 16K simultaneous userspace
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applications may use the accelerator (although specific AFUs may
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support fewer). In this mode, the AFU sends a 16 bit context ID
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with each of its requests. This tells the PSL which context is
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associated with each operation. If the PSL can't translate an
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operation, the ID can also be accessed by the kernel so it can
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determine the userspace context associated with an operation.
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MMIO space
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==========
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A portion of the accelerator MMIO space can be directly mapped
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from the AFU to userspace. Either the whole space can be mapped or
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just a per context portion. The hardware is self describing, hence
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the kernel can determine the offset and size of the per context
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portion.
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Interrupts
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==========
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AFUs may generate interrupts that are destined for userspace. These
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are received by the kernel as hardware interrupts and passed onto
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userspace by a read syscall documented below.
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Data storage faults and error interrupts are handled by the kernel
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driver.
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Work Element Descriptor (WED)
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=============================
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The WED is a 64-bit parameter passed to the AFU when a context is
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started. Its format is up to the AFU hence the kernel has no
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knowledge of what it represents. Typically it will be the
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effective address of a work queue or status block where the AFU
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and userspace can share control and status information.
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User API
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========
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For AFUs operating in AFU directed mode, two character device
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files will be created. /dev/cxl/afu0.0m will correspond to a
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master context and /dev/cxl/afu0.0s will correspond to a slave
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context. Master contexts have access to the full MMIO space an
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AFU provides. Slave contexts have access to only the per process
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MMIO space an AFU provides.
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For AFUs operating in dedicated process mode, the driver will
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only create a single character device per AFU called
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/dev/cxl/afu0.0d. This will have access to the entire MMIO space
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that the AFU provides (like master contexts in AFU directed).
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The types described below are defined in include/uapi/misc/cxl.h
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The following file operations are supported on both slave and
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master devices.
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open
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----
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Opens the device and allocates a file descriptor to be used with
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the rest of the API.
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A dedicated mode AFU only has one context and only allows the
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device to be opened once.
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An AFU directed mode AFU can have many contexts, the device can be
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opened once for each context that is available.
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When all available contexts are allocated the open call will fail
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and return -ENOSPC.
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Note: IRQs need to be allocated for each context, which may limit
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the number of contexts that can be created, and therefore
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how many times the device can be opened. The POWER8 CAPP
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supports 2040 IRQs and 3 are used by the kernel, so 2037 are
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left. If 1 IRQ is needed per context, then only 2037
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contexts can be allocated. If 4 IRQs are needed per context,
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then only 2037/4 = 509 contexts can be allocated.
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ioctl
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-----
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CXL_IOCTL_START_WORK:
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Starts the AFU context and associates it with the current
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process. Once this ioctl is successfully executed, all memory
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mapped into this process is accessible to this AFU context
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using the same effective addresses. No additional calls are
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required to map/unmap memory. The AFU memory context will be
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updated as userspace allocates and frees memory. This ioctl
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returns once the AFU context is started.
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Takes a pointer to a struct cxl_ioctl_start_work:
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struct cxl_ioctl_start_work {
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__u64 flags;
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__u64 work_element_descriptor;
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__u64 amr;
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__s16 num_interrupts;
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__s16 reserved1;
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__s32 reserved2;
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__u64 reserved3;
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__u64 reserved4;
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__u64 reserved5;
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__u64 reserved6;
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};
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flags:
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Indicates which optional fields in the structure are
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valid.
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work_element_descriptor:
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The Work Element Descriptor (WED) is a 64-bit argument
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defined by the AFU. Typically this is an effective
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address pointing to an AFU specific structure
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describing what work to perform.
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amr:
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Authority Mask Register (AMR), same as the powerpc
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AMR. This field is only used by the kernel when the
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corresponding CXL_START_WORK_AMR value is specified in
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flags. If not specified the kernel will use a default
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value of 0.
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num_interrupts:
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Number of userspace interrupts to request. This field
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is only used by the kernel when the corresponding
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CXL_START_WORK_NUM_IRQS value is specified in flags.
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If not specified the minimum number required by the
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AFU will be allocated. The min and max number can be
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obtained from sysfs.
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reserved fields:
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For ABI padding and future extensions
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CXL_IOCTL_GET_PROCESS_ELEMENT:
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Get the current context id, also known as the process element.
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The value is returned from the kernel as a __u32.
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mmap
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----
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An AFU may have an MMIO space to facilitate communication with the
|
||||||
|
AFU. If it does, the MMIO space can be accessed via mmap. The size
|
||||||
|
and contents of this area are specific to the particular AFU. The
|
||||||
|
size can be discovered via sysfs.
|
||||||
|
|
||||||
|
In AFU directed mode, master contexts are allowed to map all of
|
||||||
|
the MMIO space and slave contexts are allowed to only map the per
|
||||||
|
process MMIO space associated with the context. In dedicated
|
||||||
|
process mode the entire MMIO space can always be mapped.
|
||||||
|
|
||||||
|
This mmap call must be done after the START_WORK ioctl.
|
||||||
|
|
||||||
|
Care should be taken when accessing MMIO space. Only 32 and 64-bit
|
||||||
|
accesses are supported by POWER8. Also, the AFU will be designed
|
||||||
|
with a specific endianness, so all MMIO accesses should consider
|
||||||
|
endianness (recommend endian(3) variants like: le64toh(),
|
||||||
|
be64toh() etc). These endian issues equally apply to shared memory
|
||||||
|
queues the WED may describe.
|
||||||
|
|
||||||
|
|
||||||
|
read
|
||||||
|
----
|
||||||
|
|
||||||
|
Reads events from the AFU. Blocks if no events are pending
|
||||||
|
(unless O_NONBLOCK is supplied). Returns -EIO in the case of an
|
||||||
|
unrecoverable error or if the card is removed.
|
||||||
|
|
||||||
|
read() will always return an integral number of events.
|
||||||
|
|
||||||
|
The buffer passed to read() must be at least 4K bytes.
|
||||||
|
|
||||||
|
The result of the read will be a buffer of one or more events,
|
||||||
|
each event is of type struct cxl_event, of varying size.
|
||||||
|
|
||||||
|
struct cxl_event {
|
||||||
|
struct cxl_event_header header;
|
||||||
|
union {
|
||||||
|
struct cxl_event_afu_interrupt irq;
|
||||||
|
struct cxl_event_data_storage fault;
|
||||||
|
struct cxl_event_afu_error afu_error;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
The struct cxl_event_header is defined as:
|
||||||
|
|
||||||
|
struct cxl_event_header {
|
||||||
|
__u16 type;
|
||||||
|
__u16 size;
|
||||||
|
__u16 process_element;
|
||||||
|
__u16 reserved1;
|
||||||
|
};
|
||||||
|
|
||||||
|
type:
|
||||||
|
This defines the type of event. The type determines how
|
||||||
|
the rest of the event is structured. These types are
|
||||||
|
described below and defined by enum cxl_event_type.
|
||||||
|
|
||||||
|
size:
|
||||||
|
This is the size of the event in bytes including the
|
||||||
|
struct cxl_event_header. The start of the next event can
|
||||||
|
be found at this offset from the start of the current
|
||||||
|
event.
|
||||||
|
|
||||||
|
process_element:
|
||||||
|
Context ID of the event.
|
||||||
|
|
||||||
|
reserved field:
|
||||||
|
For future extensions and padding.
|
||||||
|
|
||||||
|
If the event type is CXL_EVENT_AFU_INTERRUPT then the event
|
||||||
|
structure is defined as:
|
||||||
|
|
||||||
|
struct cxl_event_afu_interrupt {
|
||||||
|
__u16 flags;
|
||||||
|
__u16 irq; /* Raised AFU interrupt number */
|
||||||
|
__u32 reserved1;
|
||||||
|
};
|
||||||
|
|
||||||
|
flags:
|
||||||
|
These flags indicate which optional fields are present
|
||||||
|
in this struct. Currently all fields are mandatory.
|
||||||
|
|
||||||
|
irq:
|
||||||
|
The IRQ number sent by the AFU.
|
||||||
|
|
||||||
|
reserved field:
|
||||||
|
For future extensions and padding.
|
||||||
|
|
||||||
|
If the event type is CXL_EVENT_DATA_STORAGE then the event
|
||||||
|
structure is defined as:
|
||||||
|
|
||||||
|
struct cxl_event_data_storage {
|
||||||
|
__u16 flags;
|
||||||
|
__u16 reserved1;
|
||||||
|
__u32 reserved2;
|
||||||
|
__u64 addr;
|
||||||
|
__u64 dsisr;
|
||||||
|
__u64 reserved3;
|
||||||
|
};
|
||||||
|
|
||||||
|
flags:
|
||||||
|
These flags indicate which optional fields are present in
|
||||||
|
this struct. Currently all fields are mandatory.
|
||||||
|
|
||||||
|
address:
|
||||||
|
The address that the AFU unsuccessfully attempted to
|
||||||
|
access. Valid accesses will be handled transparently by the
|
||||||
|
kernel but invalid accesses will generate this event.
|
||||||
|
|
||||||
|
dsisr:
|
||||||
|
This field gives information on the type of fault. It is a
|
||||||
|
copy of the DSISR from the PSL hardware when the address
|
||||||
|
fault occurred. The form of the DSISR is as defined in the
|
||||||
|
CAIA.
|
||||||
|
|
||||||
|
reserved fields:
|
||||||
|
For future extensions
|
||||||
|
|
||||||
|
If the event type is CXL_EVENT_AFU_ERROR then the event structure
|
||||||
|
is defined as:
|
||||||
|
|
||||||
|
struct cxl_event_afu_error {
|
||||||
|
__u16 flags;
|
||||||
|
__u16 reserved1;
|
||||||
|
__u32 reserved2;
|
||||||
|
__u64 error;
|
||||||
|
};
|
||||||
|
|
||||||
|
flags:
|
||||||
|
These flags indicate which optional fields are present in
|
||||||
|
this struct. Currently all fields are Mandatory.
|
||||||
|
|
||||||
|
error:
|
||||||
|
Error status from the AFU. Defined by the AFU.
|
||||||
|
|
||||||
|
reserved fields:
|
||||||
|
For future extensions and padding
|
||||||
|
|
||||||
|
Sysfs Class
|
||||||
|
===========
|
||||||
|
|
||||||
|
A cxl sysfs class is added under /sys/class/cxl to facilitate
|
||||||
|
enumeration and tuning of the accelerators. Its layout is
|
||||||
|
described in Documentation/ABI/testing/sysfs-class-cxl
|
||||||
|
|
||||||
|
Udev rules
|
||||||
|
==========
|
||||||
|
|
||||||
|
The following udev rules could be used to create a symlink to the
|
||||||
|
most logical chardev to use in any programming mode (afuX.Yd for
|
||||||
|
dedicated, afuX.Ys for afu directed), since the API is virtually
|
||||||
|
identical for each:
|
||||||
|
|
||||||
|
SUBSYSTEM=="cxl", ATTRS{mode}=="dedicated_process", SYMLINK="cxl/%b"
|
||||||
|
SUBSYSTEM=="cxl", ATTRS{mode}=="afu_directed", \
|
||||||
|
KERNEL=="afu[0-9]*.[0-9]*s", SYMLINK="cxl/%b"
|
12
MAINTAINERS
12
MAINTAINERS
|
@ -2711,6 +2711,18 @@ W: http://www.chelsio.com
|
||||||
S: Supported
|
S: Supported
|
||||||
F: drivers/net/ethernet/chelsio/cxgb4vf/
|
F: drivers/net/ethernet/chelsio/cxgb4vf/
|
||||||
|
|
||||||
|
CXL (IBM Coherent Accelerator Processor Interface CAPI) DRIVER
|
||||||
|
M: Ian Munsie <imunsie@au1.ibm.com>
|
||||||
|
M: Michael Neuling <mikey@neuling.org>
|
||||||
|
L: linuxppc-dev@lists.ozlabs.org
|
||||||
|
S: Supported
|
||||||
|
F: drivers/misc/cxl/
|
||||||
|
F: include/misc/cxl.h
|
||||||
|
F: include/uapi/misc/cxl.h
|
||||||
|
F: Documentation/powerpc/cxl.txt
|
||||||
|
F: Documentation/powerpc/cxl.txt
|
||||||
|
F: Documentation/ABI/testing/sysfs-class-cxl
|
||||||
|
|
||||||
STMMAC ETHERNET DRIVER
|
STMMAC ETHERNET DRIVER
|
||||||
M: Giuseppe Cavallaro <peppe.cavallaro@st.com>
|
M: Giuseppe Cavallaro <peppe.cavallaro@st.com>
|
||||||
L: netdev@vger.kernel.org
|
L: netdev@vger.kernel.org
|
||||||
|
|
|
@ -13,7 +13,7 @@
|
||||||
#include <linux/types.h>
|
#include <linux/types.h>
|
||||||
#include <linux/ioctl.h>
|
#include <linux/ioctl.h>
|
||||||
|
|
||||||
/* Structs for IOCTLS for userspace to talk to the kernel */
|
|
||||||
struct cxl_ioctl_start_work {
|
struct cxl_ioctl_start_work {
|
||||||
__u64 flags;
|
__u64 flags;
|
||||||
__u64 work_element_descriptor;
|
__u64 work_element_descriptor;
|
||||||
|
@ -26,19 +26,20 @@ struct cxl_ioctl_start_work {
|
||||||
__u64 reserved5;
|
__u64 reserved5;
|
||||||
__u64 reserved6;
|
__u64 reserved6;
|
||||||
};
|
};
|
||||||
|
|
||||||
#define CXL_START_WORK_AMR 0x0000000000000001ULL
|
#define CXL_START_WORK_AMR 0x0000000000000001ULL
|
||||||
#define CXL_START_WORK_NUM_IRQS 0x0000000000000002ULL
|
#define CXL_START_WORK_NUM_IRQS 0x0000000000000002ULL
|
||||||
#define CXL_START_WORK_ALL (CXL_START_WORK_AMR |\
|
#define CXL_START_WORK_ALL (CXL_START_WORK_AMR |\
|
||||||
CXL_START_WORK_NUM_IRQS)
|
CXL_START_WORK_NUM_IRQS)
|
||||||
|
|
||||||
/* IOCTL numbers */
|
/* ioctl numbers */
|
||||||
#define CXL_MAGIC 0xCA
|
#define CXL_MAGIC 0xCA
|
||||||
#define CXL_IOCTL_START_WORK _IOW(CXL_MAGIC, 0x00, struct cxl_ioctl_start_work)
|
#define CXL_IOCTL_START_WORK _IOW(CXL_MAGIC, 0x00, struct cxl_ioctl_start_work)
|
||||||
#define CXL_IOCTL_GET_PROCESS_ELEMENT _IOR(CXL_MAGIC, 0x01, __u32)
|
#define CXL_IOCTL_GET_PROCESS_ELEMENT _IOR(CXL_MAGIC, 0x01, __u32)
|
||||||
|
|
||||||
/* Events from read() */
|
|
||||||
#define CXL_READ_MIN_SIZE 0x1000 /* 4K */
|
#define CXL_READ_MIN_SIZE 0x1000 /* 4K */
|
||||||
|
|
||||||
|
/* Events from read() */
|
||||||
enum cxl_event_type {
|
enum cxl_event_type {
|
||||||
CXL_EVENT_RESERVED = 0,
|
CXL_EVENT_RESERVED = 0,
|
||||||
CXL_EVENT_AFU_INTERRUPT = 1,
|
CXL_EVENT_AFU_INTERRUPT = 1,
|
||||||
|
|
Loading…
Add table
Reference in a new issue