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Merge "ARM: dts: msm: Add support for CDSP PIL on msmfalcon"

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Linux Build Service Account 2016-10-19 11:18:13 -07:00 • committed by Gerrit - the friendly Code Review server
commit ab30f41717
2 changed files with 55 additions and 0 deletions
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23
arch/arm/boot/dts/qcom/msmfalcon-smp2p.dtsi
View file

@ -195,4 +195,27 @@
interrupt-controller;
#interrupt-cells = <2>;
};
/* ssr - inbound entry from turing */
smp2pgpio_ssr_smp2p_5_in: qcom,smp2pgpio-ssr-smp2p-5-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "slave-kernel";
qcom,remote-pid = <5>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
/* ssr - outbound entry to turing */
smp2pgpio_ssr_smp2p_5_out: qcom,smp2pgpio-ssr-smp2p-5-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "master-kernel";
qcom,remote-pid = <5>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};

32
arch/arm/boot/dts/qcom/msmfalcon.dtsi
View file

@ -701,6 +701,38 @@
qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;
status = "ok";
};
qcom,turing@1a300000 {
compatible = "qcom,pil-tz-generic";
reg = <0x1a300000 0x00100>;
interrupts = <0 518 1>;
vdd_cx-supply = <&pmfalcon_s3b_level>;
qcom,proxy-reg-names = "vdd_cx";
qcom,vdd_cx-uV-uA = <RPM_SMD_REGULATOR_LEVEL_TURBO 100000>;
clocks = <&clock_rpmcc CXO_PIL_CDSP_CLK>;
clock-names = "xo";
qcom,proxy-clock-names = "xo";
qcom,pas-id = <18>;
qcom,proxy-timeout-ms = <10000>;
qcom,smem-id = <423>;
qcom,sysmon-id = <7>;
qcom,ssctl-instance-id = <0x17>;
qcom,firmware-name = "cdsp";
memory-region = <&cdsp_fw_mem>;
/* GPIO inputs from turing */
qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_5_in 0 0>;
qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_5_in 2 0>;
qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_5_in 1 0>;
qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_5_in 3 0>;
/* GPIO output to turing*/
qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_5_out 0 0>;
status = "ok";
};
};
#include "msmfalcon-ion.dtsi"